Changes since v2:
=================
- v2 can be seen here: https://lore.kernel.org/dmaengine/[email protected]/
- Drop a couple of patches from v1, which tried to address the defered
probing of qce driver in case bam dma driver is not yet probed.
Replace it instead with a single (simpler) patch [PATCH 16/17].
- Convert bam dma and qce crypto dt-bindings to YAML.
- Addressed review comments from Thara, Bjorn, Vinod and Rob.
Changes since v1:
=================
- v1 can be seen here: https://lore.kernel.org/linux-arm-msm/[email protected]/
- v1 did not work well as reported earlier by Dmitry, so v2 contains the following
changes/fixes:
~ Enable the interconnect path b/w BAM DMA and main memory first
before trying to access the BAM DMA registers.
~ Enable the interconnect path b/w qce crytpo and main memory first
before trying to access the qce crypto registers.
~ Make sure to document the required and optional properties for both
BAM DMA and qce crypto drivers.
~ Add a few debug related print messages in case the qce crypto driver
passes or fails to probe.
~ Convert the qce crypto driver probe to a defered one in case the BAM DMA
or the interconnect driver(s) (needed on specific Qualcomm parts) are not
yet probed.
Qualcomm crypto engine is also available on sm8250 SoC.
It supports hardware accelerated algorithms for encryption
and authentication. It also provides support for aes, des, 3des
encryption algorithms and sha1, sha256, hmac(sha1), hmac(sha256)
authentication algorithms.
Tested the enabled crypto algorithms with cryptsetup test utilities
on sm8250-mtp and RB5 board (see [1]) and also with crypto self-tests,
including the fuzz tests (CONFIG_CRYPTO_MANAGER_EXTRA_TESTS=y).
While at it, also make a minor fix in 'sdm845.dtsi', to make
sure it confirms with the other .dtsi files which expose
crypto nodes on qcom SoCs.
Note that this series is rebased on AEAD fixes from Thara (see [2]).
This is required for all of the fuzz tests to work.
[1]. https://linux.die.net/man/8/cryptsetup
[2]. https://lore.kernel.org/linux-crypto/[email protected]/T/
Cc: Thara Gopinath <[email protected]>
Cc: Bjorn Andersson <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Andy Gross <[email protected]>
Cc: Herbert Xu <[email protected]>
Cc: David S. Miller <[email protected]>
Cc: Stephen Boyd <[email protected]>
Cc: Michael Turquette <[email protected]>
Cc: Vinod Koul <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Bhupesh Sharma (14):
dt-bindings: qcom-bam: Convert binding to YAML
dt-bindings: qcom-bam: Add 'interconnects' & 'interconnect-names' to
optional properties
dt-bindings: qcom-bam: Add 'iommus' to required properties
dt-bindings: qcom-qce: Convert bindings to yaml
dt-bindings: qcom-qce: Add 'interconnects' and move 'clocks' to
optional properties
dt-bindings: qcom-qce: Add 'iommus' to required properties
arm64/dts: qcom: sdm845: Use RPMH_CE_CLK macro directly
dt-bindings: crypto : Add new compatible strings for qcom-qce
arm64/dts: qcom: Use new compatibles for crypto nodes
crypto: qce: Add new compatibles for qce crypto driver
crypto: qce: Print a failure msg in case probe() fails
crypto: qce: Convert the device found dev_dbg() to dev_info()
crypto: qce: Defer probing if BAM dma channel is not yet initialized
arm64/dts: qcom: sm8250: Add dt entries to support crypto engine.
Thara Gopinath (3):
dma: qcom: bam_dma: Add support to initialize interconnect path
crypto: qce: core: Add support to initialize interconnect path
crypto: qce: core: Make clocks optional
.../devicetree/bindings/crypto/qcom-qce.txt | 25 ----
.../devicetree/bindings/crypto/qcom-qce.yaml | 92 +++++++++++++++
.../devicetree/bindings/dma/qcom_bam_dma.txt | 50 --------
.../devicetree/bindings/dma/qcom_bam_dma.yaml | 110 ++++++++++++++++++
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +-
arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 +-
arch/arm64/boot/dts/qcom/sm8250.dtsi | 28 +++++
drivers/crypto/qce/core.c | 110 ++++++++++++------
drivers/crypto/qce/core.h | 3 +
drivers/dma/qcom/bam_dma.c | 10 ++
10 files changed, 322 insertions(+), 114 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/crypto/qcom-qce.txt
create mode 100644 Documentation/devicetree/bindings/crypto/qcom-qce.yaml
delete mode 100644 Documentation/devicetree/bindings/dma/qcom_bam_dma.txt
create mode 100644 Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml
--
2.31.1
Add the missing required property - 'iommus' to the
device-tree binding documentation for qcom-bam DMA IP.
This property describes the phandle(s) to apps_smmu node with sid mask.
Cc: Thara Gopinath <[email protected]>
Cc: Bjorn Andersson <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Andy Gross <[email protected]>
Cc: Herbert Xu <[email protected]>
Cc: David S. Miller <[email protected]>
Cc: Stephen Boyd <[email protected]>
Cc: Michael Turquette <[email protected]>
Cc: Vinod Koul <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Bhupesh Sharma <[email protected]>
---
.../devicetree/bindings/dma/qcom_bam_dma.yaml | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml b/Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml
index d2900616006c..2479862a3654 100644
--- a/Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml
+++ b/Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml
@@ -55,6 +55,12 @@ properties:
interconnect-names:
const: memory
+ iommus:
+ minItems: 1
+ maxItems: 8
+ description: |
+ phandle to apps_smmu node with sid mask.
+
qcom,ee:
$ref: /schemas/types.yaml#/definitions/uint8
description:
@@ -81,6 +87,7 @@ required:
- clocks
- clock-names
- "#dma-cells"
+ - iommus
- qcom,ee
additionalProperties: false
@@ -96,4 +103,8 @@ examples:
clock-names = "bam_clk";
#dma-cells = <1>;
qcom,ee = /bits/ 8 <0>;
+ iommus = <&apps_smmu 0x584 0x0011>,
+ <&apps_smmu 0x586 0x0011>,
+ <&apps_smmu 0x594 0x0011>,
+ <&apps_smmu 0x596 0x0011>;
};
--
2.31.1
Hi,
On Wed, May 19, 2021 at 08:06:46PM +0530, Bhupesh Sharma wrote:
> Add the missing required property - 'iommus' to the
> device-tree binding documentation for qcom-bam DMA IP.
>
> This property describes the phandle(s) to apps_smmu node with sid mask.
>
> Cc: Thara Gopinath <[email protected]>
> Cc: Bjorn Andersson <[email protected]>
> Cc: Rob Herring <[email protected]>
> Cc: Andy Gross <[email protected]>
> Cc: Herbert Xu <[email protected]>
> Cc: David S. Miller <[email protected]>
> Cc: Stephen Boyd <[email protected]>
> Cc: Michael Turquette <[email protected]>
> Cc: Vinod Koul <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> Signed-off-by: Bhupesh Sharma <[email protected]>
> ---
> .../devicetree/bindings/dma/qcom_bam_dma.yaml | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml b/Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml
> index d2900616006c..2479862a3654 100644
> --- a/Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml
> +++ b/Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml
> @@ -55,6 +55,12 @@ properties:
> interconnect-names:
> const: memory
>
> + iommus:
> + minItems: 1
> + maxItems: 8
> + description: |
> + phandle to apps_smmu node with sid mask.
> +
> qcom,ee:
> $ref: /schemas/types.yaml#/definitions/uint8
> description:
> @@ -81,6 +87,7 @@ required:
> - clocks
> - clock-names
> - "#dma-cells"
> + - iommus
I don't think we can make this required, older SoCs don't use "iommus"
for bam_dma.
arch/arm64/boot/dts/qcom/apq8016-sbc.dt.yaml: dma-controller@7884000: 'iommus' is a required property
From schema: Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml
Stephan
Hi Stephen,
On Wed, 2 Jun 2021 at 12:54, Stephen Boyd <[email protected]> wrote:
>
> Quoting Bhupesh Sharma (2021-05-19 07:36:43)
> >
> > Cc: Thara Gopinath <[email protected]>
> > Cc: Bjorn Andersson <[email protected]>
> > Cc: Rob Herring <[email protected]>
> > Cc: Andy Gross <[email protected]>
> > Cc: Herbert Xu <[email protected]>
> > Cc: David S. Miller <[email protected]>
> > Cc: Stephen Boyd <[email protected]>
> > Cc: Michael Turquette <[email protected]>
> > Cc: Vinod Koul <[email protected]>
> > Cc: [email protected]
> > Cc: [email protected]
>
> Can you stop Cc-ing the clk list? It puts it into my review queue when
> as far as I can tell there isn't anything really clk related to review
> here. Or do you need an ack on something?
Sure, I will drop the clk-list from Cc-list of future patchset versions.
Since I had a couple of clk driver changes in v1 which were dropped
starting from v2, I thought it would be good to Cc clk-list for v2
(and so on..)
Thanks,
Bhupesh