From: Tom Rix <[email protected]>
The incoming xrt patchset has a toplevel subdir xrt/
The current fpga/ uses a single dir with filename prefixes to subdivide owners
For consistency, there should be only one way to organize the fpga/ dir.
Because the subdir model scales better, refactor to use it.
The discussion wrt xrt is here:
https://lore.kernel.org/linux-fpga/[email protected]/
Follow drivers/net/ethernet/ which has control configs
NET_VENDOR_BLA that map to drivers/net/ethernet/bla
Since fpgas do not have many vendors, drop the 'VENDOR' and use
FPGA_BLA.
There are several new subdirs
altera/
dfl/
lattice/
xilinx/
Each subdir has a Kconfig that has a new/reused
if FPGA_BLA
... existing configs ...
endif FPGA_BLA
Which is sourced into the main fpga/Kconfig
Each subdir has a Makefile whose transversal is controlled in the
fpga/Makefile by
obj-$(CONFIG_FPGA_BLA) += bla/
Some cleanup to arrange thing alphabetically and make fpga/Makefile's
whitespace look more like net/'s
Changes from
v1
Drop renaming files
Cleanup makefiles
v2
Expand commit messages
Add SPDX to Kconfig
Expand new Kconfig variable help messages
v3
Update Documentation/fpga/dfl.rst for fpga/dfl/
Tom Rix (4):
fpga: dfl: reorganize to subdir layout
fpga: xilinx: reorganize to subdir layout
fpga: altera: reorganize to subdir layout
fpga: lattice: reorganize to subdir layout
Documentation/fpga/dfl.rst | 4 +-
MAINTAINERS | 2 +-
drivers/fpga/Kconfig | 204 +-----------------
drivers/fpga/Makefile | 47 +---
drivers/fpga/altera/Kconfig | 85 ++++++++
drivers/fpga/altera/Makefile | 12 ++
drivers/fpga/{ => altera}/altera-cvp.c | 0
drivers/fpga/{ => altera}/altera-fpga2sdram.c | 0
.../fpga/{ => altera}/altera-freeze-bridge.c | 0
drivers/fpga/{ => altera}/altera-hps2fpga.c | 0
.../{ => altera}/altera-pr-ip-core-plat.c | 0
drivers/fpga/{ => altera}/altera-pr-ip-core.c | 0
drivers/fpga/{ => altera}/altera-ps-spi.c | 0
drivers/fpga/{ => altera}/socfpga-a10.c | 0
drivers/fpga/{ => altera}/socfpga.c | 0
drivers/fpga/{ => altera}/stratix10-soc.c | 0
drivers/fpga/{ => altera}/ts73xx-fpga.c | 0
drivers/fpga/dfl/Kconfig | 83 +++++++
drivers/fpga/dfl/Makefile | 16 ++
drivers/fpga/{ => dfl}/dfl-afu-dma-region.c | 0
drivers/fpga/{ => dfl}/dfl-afu-error.c | 0
drivers/fpga/{ => dfl}/dfl-afu-main.c | 0
drivers/fpga/{ => dfl}/dfl-afu-region.c | 0
drivers/fpga/{ => dfl}/dfl-afu.h | 0
drivers/fpga/{ => dfl}/dfl-fme-br.c | 0
drivers/fpga/{ => dfl}/dfl-fme-error.c | 0
drivers/fpga/{ => dfl}/dfl-fme-main.c | 0
drivers/fpga/{ => dfl}/dfl-fme-mgr.c | 0
drivers/fpga/{ => dfl}/dfl-fme-perf.c | 0
drivers/fpga/{ => dfl}/dfl-fme-pr.c | 0
drivers/fpga/{ => dfl}/dfl-fme-pr.h | 0
drivers/fpga/{ => dfl}/dfl-fme-region.c | 0
drivers/fpga/{ => dfl}/dfl-fme.h | 0
drivers/fpga/{ => dfl}/dfl-n3000-nios.c | 0
drivers/fpga/{ => dfl}/dfl-pci.c | 0
drivers/fpga/{ => dfl}/dfl.c | 0
drivers/fpga/{ => dfl}/dfl.h | 0
drivers/fpga/lattice/Kconfig | 29 +++
drivers/fpga/lattice/Makefile | 4 +
drivers/fpga/{ => lattice}/ice40-spi.c | 0
drivers/fpga/{ => lattice}/machxo2-spi.c | 0
drivers/fpga/xilinx/Kconfig | 55 +++++
drivers/fpga/xilinx/Makefile | 6 +
.../fpga/{ => xilinx}/xilinx-pr-decoupler.c | 0
drivers/fpga/{ => xilinx}/xilinx-spi.c | 0
drivers/fpga/{ => xilinx}/zynq-fpga.c | 0
drivers/fpga/{ => xilinx}/zynqmp-fpga.c | 0
47 files changed, 305 insertions(+), 242 deletions(-)
create mode 100644 drivers/fpga/altera/Kconfig
create mode 100644 drivers/fpga/altera/Makefile
rename drivers/fpga/{ => altera}/altera-cvp.c (100%)
rename drivers/fpga/{ => altera}/altera-fpga2sdram.c (100%)
rename drivers/fpga/{ => altera}/altera-freeze-bridge.c (100%)
rename drivers/fpga/{ => altera}/altera-hps2fpga.c (100%)
rename drivers/fpga/{ => altera}/altera-pr-ip-core-plat.c (100%)
rename drivers/fpga/{ => altera}/altera-pr-ip-core.c (100%)
rename drivers/fpga/{ => altera}/altera-ps-spi.c (100%)
rename drivers/fpga/{ => altera}/socfpga-a10.c (100%)
rename drivers/fpga/{ => altera}/socfpga.c (100%)
rename drivers/fpga/{ => altera}/stratix10-soc.c (100%)
rename drivers/fpga/{ => altera}/ts73xx-fpga.c (100%)
create mode 100644 drivers/fpga/dfl/Kconfig
create mode 100644 drivers/fpga/dfl/Makefile
rename drivers/fpga/{ => dfl}/dfl-afu-dma-region.c (100%)
rename drivers/fpga/{ => dfl}/dfl-afu-error.c (100%)
rename drivers/fpga/{ => dfl}/dfl-afu-main.c (100%)
rename drivers/fpga/{ => dfl}/dfl-afu-region.c (100%)
rename drivers/fpga/{ => dfl}/dfl-afu.h (100%)
rename drivers/fpga/{ => dfl}/dfl-fme-br.c (100%)
rename drivers/fpga/{ => dfl}/dfl-fme-error.c (100%)
rename drivers/fpga/{ => dfl}/dfl-fme-main.c (100%)
rename drivers/fpga/{ => dfl}/dfl-fme-mgr.c (100%)
rename drivers/fpga/{ => dfl}/dfl-fme-perf.c (100%)
rename drivers/fpga/{ => dfl}/dfl-fme-pr.c (100%)
rename drivers/fpga/{ => dfl}/dfl-fme-pr.h (100%)
rename drivers/fpga/{ => dfl}/dfl-fme-region.c (100%)
rename drivers/fpga/{ => dfl}/dfl-fme.h (100%)
rename drivers/fpga/{ => dfl}/dfl-n3000-nios.c (100%)
rename drivers/fpga/{ => dfl}/dfl-pci.c (100%)
rename drivers/fpga/{ => dfl}/dfl.c (100%)
rename drivers/fpga/{ => dfl}/dfl.h (100%)
create mode 100644 drivers/fpga/lattice/Kconfig
create mode 100644 drivers/fpga/lattice/Makefile
rename drivers/fpga/{ => lattice}/ice40-spi.c (100%)
rename drivers/fpga/{ => lattice}/machxo2-spi.c (100%)
create mode 100644 drivers/fpga/xilinx/Kconfig
create mode 100644 drivers/fpga/xilinx/Makefile
rename drivers/fpga/{ => xilinx}/xilinx-pr-decoupler.c (100%)
rename drivers/fpga/{ => xilinx}/xilinx-spi.c (100%)
rename drivers/fpga/{ => xilinx}/zynq-fpga.c (100%)
rename drivers/fpga/{ => xilinx}/zynqmp-fpga.c (100%)
--
2.26.3
From: Tom Rix <[email protected]>
Follow drivers/net/ethernet/ which has control configs
NET_VENDOR_BLA that map to drivers/net/ethernet/bla
Since fpgas do not have many vendors, drop the 'VENDOR' and use
FPGA_BLA.
There are several new subdirs
altera/
dfl/
lattice/
xilinx/
Each subdir has a Kconfig that has a new/reused
if FPGA_BLA
... existing configs ...
endif FPGA_BLA
Which is sourced into the main fpga/Kconfig
Each subdir has a Makefile whose transversal is controlled in the
fpga/Makefile by
obj-$(CONFIG_FPGA_BLA) += bla/
This is the dfl/ subdir part.
Create a dfl/ subdir
Move dfl-* files to it.
Add a Kconfig and Makefile
Because FPGA_DFL is now used in dfl/Kconfig in a if/endif
block, all the other configs in dfl/Kconfig implicitly depend
on FPGA_DFL. So the explicit dependence can be removed. Also
since FPGA_DFL depends on HAS_IOMEM, it can be removed from the
other configs.
Signed-off-by: Tom Rix <[email protected]>
---
Documentation/fpga/dfl.rst | 4 +-
MAINTAINERS | 2 +-
drivers/fpga/Kconfig | 80 +-------------------
drivers/fpga/Makefile | 18 +----
drivers/fpga/dfl/Kconfig | 83 +++++++++++++++++++++
drivers/fpga/dfl/Makefile | 16 ++++
drivers/fpga/{ => dfl}/dfl-afu-dma-region.c | 0
drivers/fpga/{ => dfl}/dfl-afu-error.c | 0
drivers/fpga/{ => dfl}/dfl-afu-main.c | 0
drivers/fpga/{ => dfl}/dfl-afu-region.c | 0
drivers/fpga/{ => dfl}/dfl-afu.h | 0
drivers/fpga/{ => dfl}/dfl-fme-br.c | 0
drivers/fpga/{ => dfl}/dfl-fme-error.c | 0
drivers/fpga/{ => dfl}/dfl-fme-main.c | 0
drivers/fpga/{ => dfl}/dfl-fme-mgr.c | 0
drivers/fpga/{ => dfl}/dfl-fme-perf.c | 0
drivers/fpga/{ => dfl}/dfl-fme-pr.c | 0
drivers/fpga/{ => dfl}/dfl-fme-pr.h | 0
drivers/fpga/{ => dfl}/dfl-fme-region.c | 0
drivers/fpga/{ => dfl}/dfl-fme.h | 0
drivers/fpga/{ => dfl}/dfl-n3000-nios.c | 0
drivers/fpga/{ => dfl}/dfl-pci.c | 0
drivers/fpga/{ => dfl}/dfl.c | 0
drivers/fpga/{ => dfl}/dfl.h | 0
24 files changed, 104 insertions(+), 99 deletions(-)
create mode 100644 drivers/fpga/dfl/Kconfig
create mode 100644 drivers/fpga/dfl/Makefile
rename drivers/fpga/{ => dfl}/dfl-afu-dma-region.c (100%)
rename drivers/fpga/{ => dfl}/dfl-afu-error.c (100%)
rename drivers/fpga/{ => dfl}/dfl-afu-main.c (100%)
rename drivers/fpga/{ => dfl}/dfl-afu-region.c (100%)
rename drivers/fpga/{ => dfl}/dfl-afu.h (100%)
rename drivers/fpga/{ => dfl}/dfl-fme-br.c (100%)
rename drivers/fpga/{ => dfl}/dfl-fme-error.c (100%)
rename drivers/fpga/{ => dfl}/dfl-fme-main.c (100%)
rename drivers/fpga/{ => dfl}/dfl-fme-mgr.c (100%)
rename drivers/fpga/{ => dfl}/dfl-fme-perf.c (100%)
rename drivers/fpga/{ => dfl}/dfl-fme-pr.c (100%)
rename drivers/fpga/{ => dfl}/dfl-fme-pr.h (100%)
rename drivers/fpga/{ => dfl}/dfl-fme-region.c (100%)
rename drivers/fpga/{ => dfl}/dfl-fme.h (100%)
rename drivers/fpga/{ => dfl}/dfl-n3000-nios.c (100%)
rename drivers/fpga/{ => dfl}/dfl-pci.c (100%)
rename drivers/fpga/{ => dfl}/dfl.c (100%)
rename drivers/fpga/{ => dfl}/dfl.h (100%)
diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst
index ef9eec71f6f3a..532fdc2e7d623 100644
--- a/Documentation/fpga/dfl.rst
+++ b/Documentation/fpga/dfl.rst
@@ -210,7 +210,7 @@ device and etc. Its driver module is always loaded first once the device is
created by the system. This driver plays an infrastructural role in the
driver architecture. It locates the DFLs in the device memory, handles them
and related resources to common interfaces from DFL framework for enumeration.
-(Please refer to drivers/fpga/dfl.c for detailed enumeration APIs).
+(Please refer to drivers/fpga/dfl/dfl.c for detailed enumeration APIs).
The FPGA Management Engine (FME) driver is a platform driver which is loaded
automatically after FME platform device creation from the DFL device module. It
@@ -499,7 +499,7 @@ In some cases, we may need to add some new private features to existing FIUs
framework, as each private feature will be parsed automatically and related
mmio resources can be found under FIU platform device created by DFL framework.
Developer only needs to provide a sub feature driver with matched feature id.
-FME Partial Reconfiguration Sub Feature driver (see drivers/fpga/dfl-fme-pr.c)
+FME Partial Reconfiguration Sub Feature driver (see drivers/fpga/dfl/dfl-fme-pr.c)
could be a reference.
Location of DFLs on a PCI Device
diff --git a/MAINTAINERS b/MAINTAINERS
index c6cdd550cd3ad..50b0e470f5f09 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7229,7 +7229,7 @@ L: [email protected]
S: Maintained
F: Documentation/ABI/testing/sysfs-bus-dfl*
F: Documentation/fpga/dfl.rst
-F: drivers/fpga/dfl*
+F: drivers/fpga/dfl/
F: drivers/uio/uio_dfl.c
F: include/linux/dfl.h
F: include/uapi/linux/fpga-dfl.h
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index 8cd454ee20c0c..7a290b2234576 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -145,85 +145,7 @@ config OF_FPGA_REGION
Support for loading FPGA images by applying a Device Tree
overlay.
-config FPGA_DFL
- tristate "FPGA Device Feature List (DFL) support"
- select FPGA_BRIDGE
- select FPGA_REGION
- depends on HAS_IOMEM
- help
- Device Feature List (DFL) defines a feature list structure that
- creates a linked list of feature headers within the MMIO space
- to provide an extensible way of adding features for FPGA.
- Driver can walk through the feature headers to enumerate feature
- devices (e.g. FPGA Management Engine, Port and Accelerator
- Function Unit) and their private features for target FPGA devices.
-
- Select this option to enable common support for Field-Programmable
- Gate Array (FPGA) solutions which implement Device Feature List.
- It provides enumeration APIs and feature device infrastructure.
-
-config FPGA_DFL_FME
- tristate "FPGA DFL FME Driver"
- depends on FPGA_DFL && HWMON && PERF_EVENTS
- help
- The FPGA Management Engine (FME) is a feature device implemented
- under Device Feature List (DFL) framework. Select this option to
- enable the platform device driver for FME which implements all
- FPGA platform level management features. There shall be one FME
- per DFL based FPGA device.
-
-config FPGA_DFL_FME_MGR
- tristate "FPGA DFL FME Manager Driver"
- depends on FPGA_DFL_FME && HAS_IOMEM
- help
- Say Y to enable FPGA Manager driver for FPGA Management Engine.
-
-config FPGA_DFL_FME_BRIDGE
- tristate "FPGA DFL FME Bridge Driver"
- depends on FPGA_DFL_FME && HAS_IOMEM
- help
- Say Y to enable FPGA Bridge driver for FPGA Management Engine.
-
-config FPGA_DFL_FME_REGION
- tristate "FPGA DFL FME Region Driver"
- depends on FPGA_DFL_FME && HAS_IOMEM
- help
- Say Y to enable FPGA Region driver for FPGA Management Engine.
-
-config FPGA_DFL_AFU
- tristate "FPGA DFL AFU Driver"
- depends on FPGA_DFL
- help
- This is the driver for FPGA Accelerated Function Unit (AFU) which
- implements AFU and Port management features. A User AFU connects
- to the FPGA infrastructure via a Port. There may be more than one
- Port/AFU per DFL based FPGA device.
-
-config FPGA_DFL_NIOS_INTEL_PAC_N3000
- tristate "FPGA DFL NIOS Driver for Intel PAC N3000"
- depends on FPGA_DFL
- select REGMAP
- help
- This is the driver for the N3000 Nios private feature on Intel
- PAC (Programmable Acceleration Card) N3000. It communicates
- with the embedded Nios processor to configure the retimers on
- the card. It also instantiates the SPI master (spi-altera) for
- the card's BMC (Board Management Controller).
-
-config FPGA_DFL_PCI
- tristate "FPGA DFL PCIe Device Driver"
- depends on PCI && FPGA_DFL
- help
- Select this option to enable PCIe driver for PCIe-based
- Field-Programmable Gate Array (FPGA) solutions which implement
- the Device Feature List (DFL). This driver provides interfaces
- for userspace applications to configure, enumerate, open and access
- FPGA accelerators on the FPGA DFL devices, enables system level
- management functions such as FPGA partial reconfiguration, power
- management and virtualization with DFL framework and DFL feature
- device drivers.
-
- To compile this as a module, choose M here.
+source "drivers/fpga/dfl/Kconfig"
config FPGA_MGR_ZYNQMP_FPGA
tristate "Xilinx ZynqMP FPGA"
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index 18dc9885883a2..bda74e54ce390 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -31,20 +31,4 @@ obj-$(CONFIG_XILINX_PR_DECOUPLER) += xilinx-pr-decoupler.o
obj-$(CONFIG_FPGA_REGION) += fpga-region.o
obj-$(CONFIG_OF_FPGA_REGION) += of-fpga-region.o
-# FPGA Device Feature List Support
-obj-$(CONFIG_FPGA_DFL) += dfl.o
-obj-$(CONFIG_FPGA_DFL_FME) += dfl-fme.o
-obj-$(CONFIG_FPGA_DFL_FME_MGR) += dfl-fme-mgr.o
-obj-$(CONFIG_FPGA_DFL_FME_BRIDGE) += dfl-fme-br.o
-obj-$(CONFIG_FPGA_DFL_FME_REGION) += dfl-fme-region.o
-obj-$(CONFIG_FPGA_DFL_AFU) += dfl-afu.o
-
-dfl-fme-objs := dfl-fme-main.o dfl-fme-pr.o dfl-fme-error.o
-dfl-fme-objs += dfl-fme-perf.o
-dfl-afu-objs := dfl-afu-main.o dfl-afu-region.o dfl-afu-dma-region.o
-dfl-afu-objs += dfl-afu-error.o
-
-obj-$(CONFIG_FPGA_DFL_NIOS_INTEL_PAC_N3000) += dfl-n3000-nios.o
-
-# Drivers for FPGAs which implement DFL
-obj-$(CONFIG_FPGA_DFL_PCI) += dfl-pci.o
+obj-$(CONFIG_FPGA_DFL) += dfl/
diff --git a/drivers/fpga/dfl/Kconfig b/drivers/fpga/dfl/Kconfig
new file mode 100644
index 0000000000000..f765b0ec63d5c
--- /dev/null
+++ b/drivers/fpga/dfl/Kconfig
@@ -0,0 +1,83 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+config FPGA_DFL
+ tristate "FPGA Device Feature List (DFL) support"
+ select FPGA_BRIDGE
+ select FPGA_REGION
+ depends on HAS_IOMEM
+ help
+ Device Feature List (DFL) defines a feature list structure that
+ creates a linked list of feature headers within the MMIO space
+ to provide an extensible way of adding features for FPGA.
+ Driver can walk through the feature headers to enumerate feature
+ devices (e.g. FPGA Management Engine, Port and Accelerator
+ Function Unit) and their private features for target FPGA devices.
+
+ Select this option to enable common support for Field-Programmable
+ Gate Array (FPGA) solutions which implement Device Feature List.
+ It provides enumeration APIs and feature device infrastructure.
+
+if FPGA_DFL
+
+config FPGA_DFL_FME
+ tristate "FPGA DFL FME Driver"
+ depends on HWMON && PERF_EVENTS
+ help
+ The FPGA Management Engine (FME) is a feature device implemented
+ under Device Feature List (DFL) framework. Select this option to
+ enable the platform device driver for FME which implements all
+ FPGA platform level management features. There shall be one FME
+ per DFL based FPGA device.
+
+config FPGA_DFL_FME_MGR
+ tristate "FPGA DFL FME Manager Driver"
+ depends on FPGA_DFL_FME
+ help
+ Say Y to enable FPGA Manager driver for FPGA Management Engine.
+
+config FPGA_DFL_FME_BRIDGE
+ tristate "FPGA DFL FME Bridge Driver"
+ depends on FPGA_DFL_FME
+ help
+ Say Y to enable FPGA Bridge driver for FPGA Management Engine.
+
+config FPGA_DFL_FME_REGION
+ tristate "FPGA DFL FME Region Driver"
+ depends on FPGA_DFL_FME
+ help
+ Say Y to enable FPGA Region driver for FPGA Management Engine.
+
+config FPGA_DFL_AFU
+ tristate "FPGA DFL AFU Driver"
+ help
+ This is the driver for FPGA Accelerated Function Unit (AFU) which
+ implements AFU and Port management features. A User AFU connects
+ to the FPGA infrastructure via a Port. There may be more than one
+ Port/AFU per DFL based FPGA device.
+
+config FPGA_DFL_NIOS_INTEL_PAC_N3000
+ tristate "FPGA DFL NIOS Driver for Intel PAC N3000"
+ select REGMAP
+ help
+ This is the driver for the N3000 Nios private feature on Intel
+ PAC (Programmable Acceleration Card) N3000. It communicates
+ with the embedded Nios processor to configure the retimers on
+ the card. It also instantiates the SPI master (spi-altera) for
+ the card's BMC (Board Management Controller).
+
+config FPGA_DFL_PCI
+ tristate "FPGA DFL PCIe Device Driver"
+ depends on PCI
+ help
+ Select this option to enable PCIe driver for PCIe-based
+ Field-Programmable Gate Array (FPGA) solutions which implement
+ the Device Feature List (DFL). This driver provides interfaces
+ for userspace applications to configure, enumerate, open and access
+ FPGA accelerators on the FPGA DFL devices, enables system level
+ management functions such as FPGA partial reconfiguration, power
+ management and virtualization with DFL framework and DFL feature
+ device drivers.
+
+ To compile this as a module, choose M here.
+
+endif #FPGA_DFL
diff --git a/drivers/fpga/dfl/Makefile b/drivers/fpga/dfl/Makefile
new file mode 100644
index 0000000000000..1c22507c60aa0
--- /dev/null
+++ b/drivers/fpga/dfl/Makefile
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# FPGA Device Feature List (DFL) Support
+obj-$(CONFIG_FPGA_DFL) += dfl.o
+obj-$(CONFIG_FPGA_DFL_AFU) += dfl-afu.o
+obj-$(CONFIG_FPGA_DFL_FME) += dfl-fme.o
+obj-$(CONFIG_FPGA_DFL_FME_BRIDGE) += dfl-fme-br.o
+obj-$(CONFIG_FPGA_DFL_FME_MGR) += dfl-fme-mgr.o
+obj-$(CONFIG_FPGA_DFL_FME_REGION) += dfl-fme-region.o
+obj-$(CONFIG_FPGA_DFL_NIOS_INTEL_PAC_N3000) += dfl-n3000-nios.o
+obj-$(CONFIG_FPGA_DFL_PCI) += dfl-pci.o
+
+dfl-fme-objs := dfl-fme-main.o dfl-fme-pr.o dfl-fme-error.o \
+ dfl-fme-perf.o
+dfl-afu-objs := dfl-afu-main.o dfl-afu-region.o dfl-afu-dma-region.o \
+ dfl-afu-error.o
diff --git a/drivers/fpga/dfl-afu-dma-region.c b/drivers/fpga/dfl/dfl-afu-dma-region.c
similarity index 100%
rename from drivers/fpga/dfl-afu-dma-region.c
rename to drivers/fpga/dfl/dfl-afu-dma-region.c
diff --git a/drivers/fpga/dfl-afu-error.c b/drivers/fpga/dfl/dfl-afu-error.c
similarity index 100%
rename from drivers/fpga/dfl-afu-error.c
rename to drivers/fpga/dfl/dfl-afu-error.c
diff --git a/drivers/fpga/dfl-afu-main.c b/drivers/fpga/dfl/dfl-afu-main.c
similarity index 100%
rename from drivers/fpga/dfl-afu-main.c
rename to drivers/fpga/dfl/dfl-afu-main.c
diff --git a/drivers/fpga/dfl-afu-region.c b/drivers/fpga/dfl/dfl-afu-region.c
similarity index 100%
rename from drivers/fpga/dfl-afu-region.c
rename to drivers/fpga/dfl/dfl-afu-region.c
diff --git a/drivers/fpga/dfl-afu.h b/drivers/fpga/dfl/dfl-afu.h
similarity index 100%
rename from drivers/fpga/dfl-afu.h
rename to drivers/fpga/dfl/dfl-afu.h
diff --git a/drivers/fpga/dfl-fme-br.c b/drivers/fpga/dfl/dfl-fme-br.c
similarity index 100%
rename from drivers/fpga/dfl-fme-br.c
rename to drivers/fpga/dfl/dfl-fme-br.c
diff --git a/drivers/fpga/dfl-fme-error.c b/drivers/fpga/dfl/dfl-fme-error.c
similarity index 100%
rename from drivers/fpga/dfl-fme-error.c
rename to drivers/fpga/dfl/dfl-fme-error.c
diff --git a/drivers/fpga/dfl-fme-main.c b/drivers/fpga/dfl/dfl-fme-main.c
similarity index 100%
rename from drivers/fpga/dfl-fme-main.c
rename to drivers/fpga/dfl/dfl-fme-main.c
diff --git a/drivers/fpga/dfl-fme-mgr.c b/drivers/fpga/dfl/dfl-fme-mgr.c
similarity index 100%
rename from drivers/fpga/dfl-fme-mgr.c
rename to drivers/fpga/dfl/dfl-fme-mgr.c
diff --git a/drivers/fpga/dfl-fme-perf.c b/drivers/fpga/dfl/dfl-fme-perf.c
similarity index 100%
rename from drivers/fpga/dfl-fme-perf.c
rename to drivers/fpga/dfl/dfl-fme-perf.c
diff --git a/drivers/fpga/dfl-fme-pr.c b/drivers/fpga/dfl/dfl-fme-pr.c
similarity index 100%
rename from drivers/fpga/dfl-fme-pr.c
rename to drivers/fpga/dfl/dfl-fme-pr.c
diff --git a/drivers/fpga/dfl-fme-pr.h b/drivers/fpga/dfl/dfl-fme-pr.h
similarity index 100%
rename from drivers/fpga/dfl-fme-pr.h
rename to drivers/fpga/dfl/dfl-fme-pr.h
diff --git a/drivers/fpga/dfl-fme-region.c b/drivers/fpga/dfl/dfl-fme-region.c
similarity index 100%
rename from drivers/fpga/dfl-fme-region.c
rename to drivers/fpga/dfl/dfl-fme-region.c
diff --git a/drivers/fpga/dfl-fme.h b/drivers/fpga/dfl/dfl-fme.h
similarity index 100%
rename from drivers/fpga/dfl-fme.h
rename to drivers/fpga/dfl/dfl-fme.h
diff --git a/drivers/fpga/dfl-n3000-nios.c b/drivers/fpga/dfl/dfl-n3000-nios.c
similarity index 100%
rename from drivers/fpga/dfl-n3000-nios.c
rename to drivers/fpga/dfl/dfl-n3000-nios.c
diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl/dfl-pci.c
similarity index 100%
rename from drivers/fpga/dfl-pci.c
rename to drivers/fpga/dfl/dfl-pci.c
diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl/dfl.c
similarity index 100%
rename from drivers/fpga/dfl.c
rename to drivers/fpga/dfl/dfl.c
diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl/dfl.h
similarity index 100%
rename from drivers/fpga/dfl.h
rename to drivers/fpga/dfl/dfl.h
--
2.26.3
> Subject: [PATCH v4 1/4] fpga: dfl: reorganize to subdir layout
>
> From: Tom Rix <[email protected]>
>
> Follow drivers/net/ethernet/ which has control configs
> NET_VENDOR_BLA that map to drivers/net/ethernet/bla
> Since fpgas do not have many vendors, drop the 'VENDOR' and use
> FPGA_BLA.
Hi Tom,
Thanks for this patch. : )
DFL is not a vendor, but something can be shared/reused. It's possible that
other vendors reuse the same concepts and the drivers of DFL. If vendor
drivers need to be moved inside sub folders, then maybe it's better to
leave DFL in the parent folder?
>
> There are several new subdirs
> altera/
> dfl/
> lattice/
> xilinx/
>
> Each subdir has a Kconfig that has a new/reused
>
> if FPGA_BLA
> ... existing configs ...
> endif FPGA_BLA
>
> Which is sourced into the main fpga/Kconfig
>
> Each subdir has a Makefile whose transversal is controlled in the
> fpga/Makefile by
>
> obj-$(CONFIG_FPGA_BLA) += bla/
>
> This is the dfl/ subdir part.
>
> Create a dfl/ subdir
> Move dfl-* files to it.
> Add a Kconfig and Makefile
>
> Because FPGA_DFL is now used in dfl/Kconfig in a if/endif
> block, all the other configs in dfl/Kconfig implicitly depend
> on FPGA_DFL. So the explicit dependence can be removed. Also
> since FPGA_DFL depends on HAS_IOMEM, it can be removed from the
> other configs.
Hm.. sounds like this change (remove HAS_IOMEM) is better to be split
into another patch. How do you think?
Thanks
Hao
On 6/15/21 1:08 AM, Wu, Hao wrote:
>> Subject: [PATCH v4 1/4] fpga: dfl: reorganize to subdir layout
>>
>> From: Tom Rix <[email protected]>
>>
>> Follow drivers/net/ethernet/ which has control configs
>> NET_VENDOR_BLA that map to drivers/net/ethernet/bla
>> Since fpgas do not have many vendors, drop the 'VENDOR' and use
>> FPGA_BLA.
> Hi Tom,
>
> Thanks for this patch. : )
>
> DFL is not a vendor, but something can be shared/reused. It's possible that
> other vendors reuse the same concepts and the drivers of DFL. If vendor
> drivers need to be moved inside sub folders, then maybe it's better to
> leave DFL in the parent folder?
xrt is also not a vendor, more a subdevice framework like dfl.
I am not sure what you mean by other dfl vendors can you give an example ?
>> There are several new subdirs
>> altera/
>> dfl/
>> lattice/
>> xilinx/
>>
>> Each subdir has a Kconfig that has a new/reused
>>
>> if FPGA_BLA
>> ... existing configs ...
>> endif FPGA_BLA
>>
>> Which is sourced into the main fpga/Kconfig
>>
>> Each subdir has a Makefile whose transversal is controlled in the
>> fpga/Makefile by
>>
>> obj-$(CONFIG_FPGA_BLA) += bla/
>>
>> This is the dfl/ subdir part.
>>
>> Create a dfl/ subdir
>> Move dfl-* files to it.
>> Add a Kconfig and Makefile
>>
>> Because FPGA_DFL is now used in dfl/Kconfig in a if/endif
>> block, all the other configs in dfl/Kconfig implicitly depend
>> on FPGA_DFL. So the explicit dependence can be removed. Also
>> since FPGA_DFL depends on HAS_IOMEM, it can be removed from the
>> other configs.
> Hm.. sounds like this change (remove HAS_IOMEM) is better to be split
> into another patch. How do you think?
I'll drop this from the patchset so this so patchset does the one thing
of moving stuff around and do the HAS_IOMEM change after stuff settles.
Tom
>
> Thanks
> Hao
>
> On 6/15/21 1:08 AM, Wu, Hao wrote:
> >> Subject: [PATCH v4 1/4] fpga: dfl: reorganize to subdir layout
> >>
> >> From: Tom Rix <[email protected]>
> >>
> >> Follow drivers/net/ethernet/ which has control configs
> >> NET_VENDOR_BLA that map to drivers/net/ethernet/bla
> >> Since fpgas do not have many vendors, drop the 'VENDOR' and use
> >> FPGA_BLA.
> > Hi Tom,
> >
> > Thanks for this patch. : )
> >
> > DFL is not a vendor, but something can be shared/reused. It's possible that
> > other vendors reuse the same concepts and the drivers of DFL. If vendor
> > drivers need to be moved inside sub folders, then maybe it's better to
> > leave DFL in the parent folder?
>
> xrt is also not a vendor, more a subdevice framework like dfl.
>
> I am not sure what you mean by other dfl vendors can you give an example ?
It's fine, but the description here is a little confusing on vendor/framework
handling. No other vendor so far, but it's possible, DFL can be used in
non-intel device, and related drivers can be reused as well. Then a fpga
mgr driver depends on DFL, should be put inside dfl folder or new
vendor's subfolder?
Hao
On Wed, Jun 16, 2021 at 01:05:36AM +0000, Wu, Hao wrote:
> > On 6/15/21 1:08 AM, Wu, Hao wrote:
> > >> Subject: [PATCH v4 1/4] fpga: dfl: reorganize to subdir layout
> > >>
> > >> From: Tom Rix <[email protected]>
> > >>
> > >> Follow drivers/net/ethernet/ which has control configs
> > >> NET_VENDOR_BLA that map to drivers/net/ethernet/bla
> > >> Since fpgas do not have many vendors, drop the 'VENDOR' and use
> > >> FPGA_BLA.
> > > Hi Tom,
> > >
> > > Thanks for this patch. : )
> > >
> > > DFL is not a vendor, but something can be shared/reused. It's possible that
> > > other vendors reuse the same concepts and the drivers of DFL. If vendor
> > > drivers need to be moved inside sub folders, then maybe it's better to
> > > leave DFL in the parent folder?
> >
> > xrt is also not a vendor, more a subdevice framework like dfl.
> >
> > I am not sure what you mean by other dfl vendors can you give an example ?
>
> It's fine, but the description here is a little confusing on vendor/framework
> handling. No other vendor so far, but it's possible, DFL can be used in
> non-intel device, and related drivers can be reused as well. Then a fpga
> mgr driver depends on DFL, should be put inside dfl folder or new
> vendor's subfolder?
>
> Hao
>
I'm somewhat neutral on this. If someone non-intel starts using DFL we could also
move the common parts back ...
That being said, I'm not super convinced we have to move stuff in the
first place.
- Moritz
> On Wed, Jun 16, 2021 at 01:05:36AM +0000, Wu, Hao wrote:
> > > On 6/15/21 1:08 AM, Wu, Hao wrote:
> > > >> Subject: [PATCH v4 1/4] fpga: dfl: reorganize to subdir layout
> > > >>
> > > >> From: Tom Rix <[email protected]>
> > > >>
> > > >> Follow drivers/net/ethernet/ which has control configs
> > > >> NET_VENDOR_BLA that map to drivers/net/ethernet/bla
> > > >> Since fpgas do not have many vendors, drop the 'VENDOR' and use
> > > >> FPGA_BLA.
> > > > Hi Tom,
> > > >
> > > > Thanks for this patch. : )
> > > >
> > > > DFL is not a vendor, but something can be shared/reused. It's possible that
> > > > other vendors reuse the same concepts and the drivers of DFL. If vendor
> > > > drivers need to be moved inside sub folders, then maybe it's better to
> > > > leave DFL in the parent folder?
> > >
> > > xrt is also not a vendor, more a subdevice framework like dfl.
> > >
> > > I am not sure what you mean by other dfl vendors can you give an example ?
> >
> > It's fine, but the description here is a little confusing on vendor/framework
> > handling. No other vendor so far, but it's possible, DFL can be used in
> > non-intel device, and related drivers can be reused as well. Then a fpga
> > mgr driver depends on DFL, should be put inside dfl folder or new
> > vendor's subfolder?
> >
> > Hao
> >
>
> I'm somewhat neutral on this. If someone non-intel starts using DFL we could
> also
> move the common parts back ...
That's fine.
>
> That being said, I'm not super convinced we have to move stuff in the
> first place.
I remember that the first submission of our code is having everything inside a sub
folder, but was suggested that to have everything moved out, this is why we have
dfl files here now. To be honest, I have the similar feeling as you, I didn't see any
strong reason to make this something we must do, but both solutions should be
fine. : )
Thanks
Hao
>
> - Moritz
On 6/17/21 1:34 AM, Wu, Hao wrote:
>> On Wed, Jun 16, 2021 at 01:05:36AM +0000, Wu, Hao wrote:
>>>> On 6/15/21 1:08 AM, Wu, Hao wrote:
>>>>>> Subject: [PATCH v4 1/4] fpga: dfl: reorganize to subdir layout
>>>>>>
>>>>>> From: Tom Rix <[email protected]>
>>>>>>
>>>>>> Follow drivers/net/ethernet/ which has control configs
>>>>>> NET_VENDOR_BLA that map to drivers/net/ethernet/bla
>>>>>> Since fpgas do not have many vendors, drop the 'VENDOR' and use
>>>>>> FPGA_BLA.
>>>>> Hi Tom,
>>>>>
>>>>> Thanks for this patch. : )
>>>>>
>>>>> DFL is not a vendor, but something can be shared/reused. It's possible that
>>>>> other vendors reuse the same concepts and the drivers of DFL. If vendor
>>>>> drivers need to be moved inside sub folders, then maybe it's better to
>>>>> leave DFL in the parent folder?
>>>> xrt is also not a vendor, more a subdevice framework like dfl.
>>>>
>>>> I am not sure what you mean by other dfl vendors can you give an example ?
>>> It's fine, but the description here is a little confusing on vendor/framework
>>> handling. No other vendor so far, but it's possible, DFL can be used in
>>> non-intel device, and related drivers can be reused as well. Then a fpga
>>> mgr driver depends on DFL, should be put inside dfl folder or new
>>> vendor's subfolder?
>>>
>>> Hao
>>>
>> I'm somewhat neutral on this. If someone non-intel starts using DFL we could
>> also
>> move the common parts back ...
> That's fine.
>
>> That being said, I'm not super convinced we have to move stuff in the
>> first place.
> I remember that the first submission of our code is having everything inside a sub
> folder, but was suggested that to have everything moved out, this is why we have
> dfl files here now. To be honest, I have the similar feeling as you, I didn't see any
> strong reason to make this something we must do, but both solutions should be
> fine. : )
xrt is bringing in the subdir xrt/
Even after the likely move of xrt subdevices to other subsystems, there
will be about as many files in fpga/xrt/ as in fpga/
If both of you are fine with a mixed files and subdir organization, then
I'll drop this patchset.
If you want only files, then xrt needs to refactor, so let them know.
Tom
> Thanks
> Hao
>
>> - Moritz
On Thu, Jun 17, 2021 at 06:21:07AM -0700, Tom Rix wrote:
> xrt is bringing in the subdir xrt/
That alone I don't mind too much.
> Even after the likely move of xrt subdevices to other subsystems, there will
> be about as many files in fpga/xrt/ as in fpga/
>
> If both of you are fine with a mixed files and subdir organization, then
> I'll drop this patchset.
You've done most of the work for this already, so we might as well
finish what you started :)
Thanks,
Moritz