2021-07-25 04:28:05

by Michał Mirosław

[permalink] [raw]
Subject: [PATCH v3 4/5] mmc: sdhci: move SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN frequency limit

Push handling of clock frequency dependence for
SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN quirk to the drivers that use it.

Signed-off-by: Michał Mirosław <[email protected]>
---
v3: rebased on v5.14-rc2 and reworded commitmsg
v2: reworded commitmsg
---
drivers/mmc/host/sdhci-of-arasan.c | 11 ++++-------
drivers/mmc/host/sdhci-of-dwcmshc.c | 9 ++++++---
drivers/mmc/host/sdhci.c | 3 +--
3 files changed, 11 insertions(+), 12 deletions(-)

diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c
index 737e2bfdedc2..f2a6441ab540 100644
--- a/drivers/mmc/host/sdhci-of-arasan.c
+++ b/drivers/mmc/host/sdhci-of-arasan.c
@@ -452,8 +452,7 @@ static const struct sdhci_ops sdhci_arasan_cqe_ops = {
static const struct sdhci_pltfm_data sdhci_arasan_cqe_pdata = {
.ops = &sdhci_arasan_cqe_ops,
.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
- .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
- SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
+ .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
};

#ifdef CONFIG_PM_SLEEP
@@ -1118,7 +1117,6 @@ static const struct sdhci_pltfm_data sdhci_arasan_pdata = {
.ops = &sdhci_arasan_ops,
.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
- SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN |
SDHCI_QUIRK2_STOP_WITH_TC,
};

@@ -1141,7 +1139,6 @@ static const struct sdhci_pltfm_data sdhci_keembay_emmc_pdata = {
SDHCI_QUIRK_32BIT_DMA_SIZE |
SDHCI_QUIRK_32BIT_ADMA_SIZE,
.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
- SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN |
SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 |
SDHCI_QUIRK2_STOP_WITH_TC |
SDHCI_QUIRK2_BROKEN_64_BIT_DMA,
@@ -1156,7 +1153,6 @@ static const struct sdhci_pltfm_data sdhci_keembay_sd_pdata = {
SDHCI_QUIRK_32BIT_DMA_SIZE |
SDHCI_QUIRK_32BIT_ADMA_SIZE,
.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
- SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN |
SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
SDHCI_QUIRK2_STOP_WITH_TC |
SDHCI_QUIRK2_BROKEN_64_BIT_DMA,
@@ -1171,7 +1167,6 @@ static const struct sdhci_pltfm_data sdhci_keembay_sdio_pdata = {
SDHCI_QUIRK_32BIT_DMA_SIZE |
SDHCI_QUIRK_32BIT_ADMA_SIZE,
.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
- SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN |
SDHCI_QUIRK2_HOST_OFF_CARD_ON |
SDHCI_QUIRK2_BROKEN_64_BIT_DMA,
};
@@ -1197,7 +1192,6 @@ static struct sdhci_arasan_of_data intel_lgm_sdxc_data = {
static const struct sdhci_pltfm_data sdhci_arasan_zynqmp_pdata = {
.ops = &sdhci_arasan_ops,
.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
- SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN |
SDHCI_QUIRK2_STOP_WITH_TC,
};

@@ -1502,6 +1496,9 @@ static int sdhci_arasan_add_host(struct sdhci_arasan_data *sdhci_arasan)
bool dma64;
int ret;

+ if (sdhci_pltfm_clk_get_max_clock(host) <= 25000000)
+ host->quirks2 |= SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN;
+
if (!sdhci_arasan->has_cqe)
return sdhci_add_host(host);

diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
index bac874ab0b33..9bca7cf1d1da 100644
--- a/drivers/mmc/host/sdhci-of-dwcmshc.c
+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
@@ -283,14 +283,14 @@ static const struct sdhci_pltfm_data sdhci_dwcmshc_rk3568_pdata = {
.ops = &sdhci_dwcmshc_rk3568_ops,
.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
- .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
- SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
+ .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
};

static int dwcmshc_rk3568_init(struct sdhci_host *host, struct dwcmshc_priv *dwc_priv)
{
- int err;
+ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct rk3568_priv *priv = dwc_priv->priv;
+ int err;

priv->rockchip_clks[0].id = "axi";
priv->rockchip_clks[1].id = "block";
@@ -318,6 +318,9 @@ static int dwcmshc_rk3568_init(struct sdhci_host *host, struct dwcmshc_priv *dwc
sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK);
sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_STRBIN);

+ if (sdhci_pltfm_clk_get_max_clock(pltfm_host) <= 25000000)
+ host->quirks2 |= SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN;
+
return 0;
}

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 0993f7d0ce8e..cfa314e659bc 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1905,8 +1905,7 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock,
/* Version 3.00 divisors must be a multiple of 2. */
if (host->max_clk <= clock) {
div = 1;
- if ((host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN)
- && host->max_clk <= 25000000)
+ if (host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN)
div = 2;
} else {
for (div = 2; div < SDHCI_MAX_DIV_SPEC_300;
--
2.30.2


2021-07-25 09:07:53

by kernel test robot

[permalink] [raw]
Subject: Re: [PATCH v3 4/5] mmc: sdhci: move SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN frequency limit

Hi "Michał,

I love your patch! Yet something to improve:

[auto build test ERROR on linus/master]
[also build test ERROR on v5.14-rc2 next-20210723]
[cannot apply to xlnx/master]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url: https://github.com/0day-ci/linux/commits/Micha-Miros-aw/mmc-sdhci-fix-base-clock-usage-in-preset-value/20210725-132527
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git d8079fac168168b25677dc16c00ffaf9fb7df723
config: arm64-randconfig-r036-20210725 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project c63dbd850182797bc4b76124d08e1c320ab2365d)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm64 cross compiling tool for clang build
# apt-get install binutils-aarch64-linux-gnu
# https://github.com/0day-ci/linux/commit/bf08b4b0109a3163b61d8731f021a3421d6ffd08
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Micha-Miros-aw/mmc-sdhci-fix-base-clock-usage-in-preset-value/20210725-132527
git checkout bf08b4b0109a3163b61d8731f021a3421d6ffd08
# save the attached .config to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross O=build_dir ARCH=arm64 SHELL=/bin/bash drivers/mmc/host/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <[email protected]>

All errors (new ones prefixed by >>):

>> drivers/mmc/host/sdhci-of-dwcmshc.c:286:45: error: unexpected ';' before '}'
.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
^
>> drivers/mmc/host/sdhci-of-dwcmshc.c:321:36: error: incompatible pointer types passing 'struct sdhci_pltfm_host *' to parameter of type 'struct sdhci_host *' [-Werror,-Wincompatible-pointer-types]
if (sdhci_pltfm_clk_get_max_clock(pltfm_host) <= 25000000)
^~~~~~~~~~
drivers/mmc/host/sdhci-pltfm.h:107:70: note: passing argument to parameter 'host' here
extern unsigned int sdhci_pltfm_clk_get_max_clock(struct sdhci_host *host);
^
2 errors generated.


vim +286 drivers/mmc/host/sdhci-of-dwcmshc.c

281
282 static const struct sdhci_pltfm_data sdhci_dwcmshc_rk3568_pdata = {
283 .ops = &sdhci_dwcmshc_rk3568_ops,
284 .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
285 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
> 286 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
287 };
288
289 static int dwcmshc_rk3568_init(struct sdhci_host *host, struct dwcmshc_priv *dwc_priv)
290 {
291 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
292 struct rk3568_priv *priv = dwc_priv->priv;
293 int err;
294
295 priv->rockchip_clks[0].id = "axi";
296 priv->rockchip_clks[1].id = "block";
297 priv->rockchip_clks[2].id = "timer";
298 err = devm_clk_bulk_get_optional(mmc_dev(host->mmc), RK3568_MAX_CLKS,
299 priv->rockchip_clks);
300 if (err) {
301 dev_err(mmc_dev(host->mmc), "failed to get clocks %d\n", err);
302 return err;
303 }
304
305 err = clk_bulk_prepare_enable(RK3568_MAX_CLKS, priv->rockchip_clks);
306 if (err) {
307 dev_err(mmc_dev(host->mmc), "failed to enable clocks %d\n", err);
308 return err;
309 }
310
311 if (of_property_read_u8(mmc_dev(host->mmc)->of_node, "rockchip,txclk-tapnum",
312 &priv->txclk_tapnum))
313 priv->txclk_tapnum = DLL_TXCLK_TAPNUM_DEFAULT;
314
315 /* Disable cmd conflict check */
316 sdhci_writel(host, 0x0, dwc_priv->vendor_specific_area1 + DWCMSHC_HOST_CTRL3);
317 /* Reset previous settings */
318 sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK);
319 sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_STRBIN);
320
> 321 if (sdhci_pltfm_clk_get_max_clock(pltfm_host) <= 25000000)
322 host->quirks2 |= SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN;
323
324 return 0;
325 }
326

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/[email protected]


Attachments:
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2021-07-25 19:21:59

by kernel test robot

[permalink] [raw]
Subject: Re: [PATCH v3 4/5] mmc: sdhci: move SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN frequency limit

Hi "Michał,

I love your patch! Yet something to improve:

[auto build test ERROR on linus/master]
[also build test ERROR on v5.14-rc2 next-20210723]
[cannot apply to xlnx/master]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url: https://github.com/0day-ci/linux/commits/Micha-Miros-aw/mmc-sdhci-fix-base-clock-usage-in-preset-value/20210725-132527
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git d8079fac168168b25677dc16c00ffaf9fb7df723
config: riscv-randconfig-c003-20210725 (attached as .config)
compiler: riscv32-linux-gcc (GCC) 10.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/bf08b4b0109a3163b61d8731f021a3421d6ffd08
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Micha-Miros-aw/mmc-sdhci-fix-base-clock-usage-in-preset-value/20210725-132527
git checkout bf08b4b0109a3163b61d8731f021a3421d6ffd08
# save the attached .config to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-10.3.0 make.cross O=build_dir ARCH=riscv SHELL=/bin/bash drivers/mmc/host/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <[email protected]>

All errors (new ones prefixed by >>):

>> drivers/mmc/host/sdhci-of-dwcmshc.c:286:45: error: expected '}' before ';' token
286 | .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
| ^
drivers/mmc/host/sdhci-of-dwcmshc.c:282:67: note: to match this '{'
282 | static const struct sdhci_pltfm_data sdhci_dwcmshc_rk3568_pdata = {
| ^
drivers/mmc/host/sdhci-of-dwcmshc.c: In function 'dwcmshc_rk3568_init':
>> drivers/mmc/host/sdhci-of-dwcmshc.c:321:36: error: passing argument 1 of 'sdhci_pltfm_clk_get_max_clock' from incompatible pointer type [-Werror=incompatible-pointer-types]
321 | if (sdhci_pltfm_clk_get_max_clock(pltfm_host) <= 25000000)
| ^~~~~~~~~~
| |
| struct sdhci_pltfm_host *
In file included from drivers/mmc/host/sdhci-of-dwcmshc.c:20:
drivers/mmc/host/sdhci-pltfm.h:107:70: note: expected 'struct sdhci_host *' but argument is of type 'struct sdhci_pltfm_host *'
107 | extern unsigned int sdhci_pltfm_clk_get_max_clock(struct sdhci_host *host);
| ~~~~~~~~~~~~~~~~~~~^~~~
cc1: some warnings being treated as errors


vim +286 drivers/mmc/host/sdhci-of-dwcmshc.c

281
282 static const struct sdhci_pltfm_data sdhci_dwcmshc_rk3568_pdata = {
283 .ops = &sdhci_dwcmshc_rk3568_ops,
284 .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
285 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
> 286 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
287 };
288
289 static int dwcmshc_rk3568_init(struct sdhci_host *host, struct dwcmshc_priv *dwc_priv)
290 {
291 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
292 struct rk3568_priv *priv = dwc_priv->priv;
293 int err;
294
295 priv->rockchip_clks[0].id = "axi";
296 priv->rockchip_clks[1].id = "block";
297 priv->rockchip_clks[2].id = "timer";
298 err = devm_clk_bulk_get_optional(mmc_dev(host->mmc), RK3568_MAX_CLKS,
299 priv->rockchip_clks);
300 if (err) {
301 dev_err(mmc_dev(host->mmc), "failed to get clocks %d\n", err);
302 return err;
303 }
304
305 err = clk_bulk_prepare_enable(RK3568_MAX_CLKS, priv->rockchip_clks);
306 if (err) {
307 dev_err(mmc_dev(host->mmc), "failed to enable clocks %d\n", err);
308 return err;
309 }
310
311 if (of_property_read_u8(mmc_dev(host->mmc)->of_node, "rockchip,txclk-tapnum",
312 &priv->txclk_tapnum))
313 priv->txclk_tapnum = DLL_TXCLK_TAPNUM_DEFAULT;
314
315 /* Disable cmd conflict check */
316 sdhci_writel(host, 0x0, dwc_priv->vendor_specific_area1 + DWCMSHC_HOST_CTRL3);
317 /* Reset previous settings */
318 sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK);
319 sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_STRBIN);
320
> 321 if (sdhci_pltfm_clk_get_max_clock(pltfm_host) <= 25000000)
322 host->quirks2 |= SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN;
323
324 return 0;
325 }
326

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/[email protected]


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