Add the dt-bindings and the driver for ADXL355 3-axis MEMS Accelerometer.
Changes since v3:
1. Fix errors in yaml DT doc.
2. Change SPDX-License-Identifier to GPL-2.0-only OR BSD-2-Clause
Changes since v2:
1. Add separate DT binding doc in yaml.
2. Use ____cacheline_aligned buffer for regmap_bulk_read/write calls.
3. Make code consistent by using same style in switch case.
4. Use FIELD_PREP in place of custom macros.
5. Make Kconfig description more informative.
Changes since v1:
1. Remove the declarations for static regmap structures from adxl355.h.
This was missed in the v1 and caused errors.
2. Make switch case statements consistent by directly returning from
each case rather than saving the return in a variable.
3. Some coding style changes.
Changes since v0:
1. Move adxl355_hpf_3db_table to adxl355_data structure. This is done to make
sure that each device gets its own table.
2. Make local regmap definitions private to adxl355_core.c.
3. Other minor coding style changes.
Puranjay Mohan (2):
dt-bindings: iio: accel: Add DT binding doc for ADXL355
iio: accel: Add driver support for ADXL355
.../bindings/iio/accel/adi,adxl355.yaml | 76 +++
MAINTAINERS | 7 +
drivers/iio/accel/Kconfig | 29 +
drivers/iio/accel/Makefile | 3 +
drivers/iio/accel/adxl355.h | 77 +++
drivers/iio/accel/adxl355_core.c | 545 ++++++++++++++++++
drivers/iio/accel/adxl355_i2c.c | 63 ++
drivers/iio/accel/adxl355_spi.c | 66 +++
8 files changed, 866 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml
create mode 100644 drivers/iio/accel/adxl355.h
create mode 100644 drivers/iio/accel/adxl355_core.c
create mode 100644 drivers/iio/accel/adxl355_i2c.c
create mode 100644 drivers/iio/accel/adxl355_spi.c
--
2.30.1
Add devicetree binding document for ADXL355, a 3-Axis MEMS Accelerometer.
Signed-off-by: Puranjay Mohan <[email protected]>
---
.../bindings/iio/accel/adi,adxl355.yaml | 76 +++++++++++++++++++
1 file changed, 76 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml
diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml
new file mode 100644
index 000000000..6e0652ce8
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml
@@ -0,0 +1,76 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/accel/adi,adxl355.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Analog Devices ADXL355 3-Axis, Low noise MEMS Accelerometer
+
+maintainers:
+ - Puranjay Mohan <[email protected]>
+
+description: |
+ Analog Devices ADXL355 3-Axis, Low noise MEMS Accelerometer that supports
+ both I2C & SPI interfaces
+ https://www.analog.com/en/products/adxl355.html
+
+properties:
+ compatible:
+ enum:
+ - adi,adxl355
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ minItems: 1
+ items:
+ - description: DRDY PIN
+ - description: INT1 PIN
+ - description: INT2 PIN
+
+ vdd-supply:
+ description: Regulator that provides power to the sensor
+
+ vddio-supply:
+ description: Regulator that provides power to the bus
+
+ spi-max-frequency: true
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ i2c0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* Example for a I2C device node */
+ accelerometer@1d {
+ compatible = "adi,adxl355";
+ reg = <0x1d>;
+ interrupt-parent = <&gpio>;
+ interrupts = <25 IRQ_TYPE_EDGE_RISING>;
+ };
+ };
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ spi0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ accelerometer@0 {
+ compatible = "adi,adxl355";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ interrupt-parent = <&gpio>;
+ interrupts = <25 IRQ_TYPE_EDGE_RISING>;
+ };
+ };
--
2.30.1
ADXL355 is 3-axis MEMS Accelerometer. It offers low noise density,
low 0g offset drift, low power with selectable measurement ranges.
It also features programmable high-pass and low-pass filters.
Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/adxl354_adxl355.pdf
Signed-off-by: Puranjay Mohan <[email protected]>
---
MAINTAINERS | 7 +
drivers/iio/accel/Kconfig | 29 ++
drivers/iio/accel/Makefile | 3 +
drivers/iio/accel/adxl355.h | 77 +++++
drivers/iio/accel/adxl355_core.c | 545 +++++++++++++++++++++++++++++++
drivers/iio/accel/adxl355_i2c.c | 63 ++++
drivers/iio/accel/adxl355_spi.c | 66 ++++
7 files changed, 790 insertions(+)
create mode 100644 drivers/iio/accel/adxl355.h
create mode 100644 drivers/iio/accel/adxl355_core.c
create mode 100644 drivers/iio/accel/adxl355_i2c.c
create mode 100644 drivers/iio/accel/adxl355_spi.c
diff --git a/MAINTAINERS b/MAINTAINERS
index bd7aff0c1..461f2a192 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -586,6 +586,13 @@ W: http://ez.analog.com/community/linux-device-drivers
F: Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml
F: drivers/input/misc/adxl34x.c
+ADXL355 THREE-AXIS DIGITAL ACCELEROMETER DRIVER
+M: Puranjay Mohan <[email protected]>
+L: [email protected]
+S: Supported
+F: drivers/iio/accel/adxl34x.c
+F: Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml
+
ADXL372 THREE-AXIS DIGITAL ACCELEROMETER DRIVER
M: Michael Hennerich <[email protected]>
S: Supported
diff --git a/drivers/iio/accel/Kconfig b/drivers/iio/accel/Kconfig
index cceda3cec..d0c45c809 100644
--- a/drivers/iio/accel/Kconfig
+++ b/drivers/iio/accel/Kconfig
@@ -61,6 +61,35 @@ config ADXL345_SPI
will be called adxl345_spi and you will also get adxl345_core
for the core module.
+config ADXL355
+ tristate
+
+config ADXL355_I2C
+ tristate "Analog Devices ADXL355 3-Axis Digital Accelerometer I2C Driver"
+ depends on I2C
+ select ADXL355
+ select REGMAP_I2C
+ help
+ Say Y here if you want to build i2c support for the Analog Devices
+ ADXL355 3-axis digital accelerometer.
+
+ To compile this driver as a module, choose M here: the module
+ will be called adxl355_i2c and you will also get adxl355_core
+ for the core module.
+
+config ADXL355_SPI
+ tristate "Analog Devices ADXL355 3-Axis Digital Accelerometer SPI Driver"
+ depends on SPI
+ select ADXL355
+ select REGMAP_SPI
+ help
+ Say Y here if you want to build spi support for the Analog Devices
+ ADXL355 3-axis digital accelerometer.
+
+ To compile this driver as a module, choose M here: the module
+ will be called adxl355_spi and you will also get adxl355_core
+ for the core module.
+
config ADXL372
tristate
select IIO_BUFFER
diff --git a/drivers/iio/accel/Makefile b/drivers/iio/accel/Makefile
index 32cd1342a..0e4721d2d 100644
--- a/drivers/iio/accel/Makefile
+++ b/drivers/iio/accel/Makefile
@@ -9,6 +9,9 @@ obj-$(CONFIG_ADIS16209) += adis16209.o
obj-$(CONFIG_ADXL345) += adxl345_core.o
obj-$(CONFIG_ADXL345_I2C) += adxl345_i2c.o
obj-$(CONFIG_ADXL345_SPI) += adxl345_spi.o
+obj-$(CONFIG_ADXL355) += adxl355_core.o
+obj-$(CONFIG_ADXL355_I2C) += adxl355_i2c.o
+obj-$(CONFIG_ADXL355_SPI) += adxl355_spi.o
obj-$(CONFIG_ADXL372) += adxl372.o
obj-$(CONFIG_ADXL372_I2C) += adxl372_i2c.o
obj-$(CONFIG_ADXL372_SPI) += adxl372_spi.o
diff --git a/drivers/iio/accel/adxl355.h b/drivers/iio/accel/adxl355.h
new file mode 100644
index 000000000..77d0d0a28
--- /dev/null
+++ b/drivers/iio/accel/adxl355.h
@@ -0,0 +1,77 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * ADXL355 3-Axis Digital Accelerometer
+ *
+ * Copyright (c) 2021 Puranjay Mohan <[email protected]>
+ */
+
+#ifndef _ADXL355_H_
+#define _ADXL355_H_
+
+#include <linux/regmap.h>
+
+/* ADXL355 Register Definitions */
+#define ADXL355_DEVID_AD 0x00
+#define ADXL355_DEVID_MST 0x01
+#define ADXL355_PARTID 0x02
+#define ADXL355_REVID 0x03
+#define ADXL355_STATUS 0x04
+#define ADXL355_FIFO_ENTRIES 0x05
+#define ADXL355_TEMP2 0x06
+#define ADXL355_XDATA3 0x08
+#define ADXL355_YDATA3 0x0B
+#define ADXL355_ZDATA3 0x0E
+#define ADXL355_FIFO_DATA 0x11
+#define ADXL355_OFFSET_X_H 0x1E
+#define ADXL355_OFFSET_Y_H 0x20
+#define ADXL355_OFFSET_Z_H 0x22
+#define ADXL355_ACT_EN 0x24
+#define ADXL355_ACT_THRESH_H 0x25
+#define ADXL355_ACT_THRESH_L 0x26
+#define ADXL355_ACT_COUNT 0x27
+#define ADXL355_FILTER 0x28
+#define ADXL355_FIFO_SAMPLES 0x29
+#define ADXL355_INT_MAP 0x2A
+#define ADXL355_SYNC 0x2B
+#define ADXL355_RANGE 0x2C
+#define ADXL355_POWER_CTL 0x2D
+#define ADXL355_SELF_TEST 0x2E
+#define ADXL355_RESET 0x2F
+
+#define ADXL355_DEVID_AD_VAL 0xAD
+#define ADXL355_DEVID_MST_VAL 0x1D
+#define ADXL355_PARTID_VAL 0xED
+#define ADXL355_REVID_VAL 0x01
+#define ADXL355_RESET_CODE 0x52
+
+#define ADXL355_POWER_CTL_MODE_MSK GENMASK(1, 0)
+
+#define ADXL355_FILTER_ODR_MSK GENMASK(3, 0)
+#define ADXL355_FILTER_HPF_MSK GENMASK(6, 4)
+
+/*
+ * The datasheet defines an intercept of 1885 LSB at 25 degC
+ * and a slope of -9.05 LSB/C. The following formula can be used to find the
+ * temperature:
+ * Temp = ((RAW - 1885)/(-9.05)) + 25 but this doesn't follow the format of
+ * the IIO which is Temp = (RAW + OFFSET) * SCALE. Hence using some rearranging
+ * we get the scale as -110.49723 and offset as -2111.25
+ */
+#define TEMP_SCALE_VAL -110
+#define TEMP_SCALE_VAL2 497238
+#define TEMP_OFFSET_VAL -2111
+#define TEMP_OFFSET_VAL2 250000
+
+/*
+ * At +/- 2g with 20-bit resolution, scale is given in datasheet as
+ * 3.9ug/LSB = 0.0000039 * 9.80665 = 0.00003824593 m/s^2
+ */
+#define ADXL355_NSCALE 38245
+
+extern const struct regmap_access_table adxl355_readable_regs_tbl;
+
+extern const struct regmap_access_table adxl355_writeable_regs_tbl;
+
+int adxl355_core_probe(struct device *dev, struct regmap *regmap,
+ const char *name);
+#endif /* _ADXL355_H_ */
diff --git a/drivers/iio/accel/adxl355_core.c b/drivers/iio/accel/adxl355_core.c
new file mode 100644
index 000000000..6250dd5a0
--- /dev/null
+++ b/drivers/iio/accel/adxl355_core.c
@@ -0,0 +1,545 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * ADXL355 3-Axis Digital Accelerometer IIO core driver
+ *
+ * Copyright (c) 2021 Puranjay Mohan <[email protected]>
+ *
+ * Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/adxl354_adxl355.pdf
+ */
+#include <linux/bitfield.h>
+#include <linux/iio/iio.h>
+#include <linux/iio/sysfs.h>
+#include <linux/limits.h>
+#include <linux/math64.h>
+#include <linux/module.h>
+#include <linux/mod_devicetable.h>
+#include <linux/regmap.h>
+
+#include "adxl355.h"
+
+static const struct regmap_range adxl355_read_reg_range[] = {
+ regmap_reg_range(ADXL355_DEVID_AD, ADXL355_FIFO_DATA),
+ regmap_reg_range(ADXL355_OFFSET_X_H, ADXL355_SELF_TEST)
+};
+
+const struct regmap_access_table adxl355_readable_regs_tbl = {
+ .yes_ranges = adxl355_read_reg_range,
+ .n_yes_ranges = ARRAY_SIZE(adxl355_read_reg_range),
+};
+EXPORT_SYMBOL_GPL(adxl355_readable_regs_tbl);
+
+static const struct regmap_range adxl355_write_reg_range[] = {
+ regmap_reg_range(ADXL355_OFFSET_X_H, ADXL355_RESET)
+};
+
+const struct regmap_access_table adxl355_writeable_regs_tbl = {
+ .yes_ranges = adxl355_write_reg_range,
+ .n_yes_ranges = ARRAY_SIZE(adxl355_write_reg_range),
+};
+EXPORT_SYMBOL_GPL(adxl355_writeable_regs_tbl);
+
+enum adxl355_op_mode {
+ ADXL355_MEASUREMENT,
+ ADXL355_STANDBY,
+ ADXL355_TEMP_OFF
+};
+
+enum adxl355_odr {
+ ADXL355_ODR_4000HZ,
+ ADXL355_ODR_2000HZ,
+ ADXL355_ODR_1000HZ,
+ ADXL355_ODR_500HZ,
+ ADXL355_ODR_250HZ,
+ ADXL355_ODR_125HZ,
+ ADXL355_ODR_62_5HZ,
+ ADXL355_ODR_31_25HZ,
+ ADXL355_ODR_15_625HZ,
+ ADXL355_ODR_7_813HZ,
+ ADXL355_ODR_3_906HZ
+};
+
+enum adxl355_hpf_3db {
+ ADXL355_HPF_OFF,
+ ADXL355_HPF_24_7,
+ ADXL355_HPF_6_2084,
+ ADXL355_HPF_1_5545,
+ ADXL355_HPF_0_3862,
+ ADXL355_HPF_0_0954,
+ ADXL355_HPF_0_0238
+};
+
+static const int adxl355_odr_table[][2] = {
+ [0] = {4000, 0},
+ [1] = {2000, 0},
+ [2] = {1000, 0},
+ [3] = {500, 0},
+ [4] = {250, 0},
+ [5] = {125, 0},
+ [6] = {62, 500000},
+ [7] = {31, 250000},
+ [8] = {15, 625000},
+ [9] = {7, 813000},
+ [10] = {3, 906000}
+};
+
+static const int adxl355_hpf_3db_multipliers[] = {
+ 0,
+ 247000,
+ 62084,
+ 15545,
+ 3862,
+ 954,
+ 238
+};
+
+struct adxl355_data {
+ struct regmap *regmap;
+ struct device *dev;
+ struct mutex lock; /* lock to protect op_mode */
+ enum adxl355_op_mode op_mode;
+ enum adxl355_odr odr;
+ enum adxl355_hpf_3db hpf_3db;
+ int x_calibbias;
+ int y_calibbias;
+ int z_calibbias;
+ int adxl355_hpf_3db_table[7][2];
+ u8 transf_buf[3] ____cacheline_aligned;
+};
+
+static int adxl355_set_op_mode(struct adxl355_data *data,
+ enum adxl355_op_mode op_mode)
+{
+ int ret;
+
+ if (data->op_mode == op_mode)
+ return 0;
+
+ ret = regmap_update_bits(data->regmap, ADXL355_POWER_CTL,
+ ADXL355_POWER_CTL_MODE_MSK, op_mode);
+ if (ret < 0)
+ return ret;
+
+ data->op_mode = op_mode;
+
+ return ret;
+}
+
+static void adxl355_fill_3db_frequency_table(struct adxl355_data *data)
+{
+ int i;
+ u64 rem;
+ u64 div;
+ u32 multiplier;
+ u64 odr = mul_u64_u32_shr(adxl355_odr_table[data->odr][0], 1000000, 0) +
+ adxl355_odr_table[data->odr][1];
+
+ for (i = 0; i < ARRAY_SIZE(adxl355_hpf_3db_multipliers); i++) {
+ multiplier = adxl355_hpf_3db_multipliers[i];
+ div = div64_u64_rem(mul_u64_u32_shr(odr, multiplier, 0),
+ 100000000000000UL, &rem);
+
+ data->adxl355_hpf_3db_table[i][0] = div;
+ data->adxl355_hpf_3db_table[i][1] = div_u64(rem, 100000000);
+ }
+}
+
+static int adxl355_setup(struct adxl355_data *data)
+{
+ unsigned int regval;
+ int ret;
+
+ ret = regmap_read(data->regmap, ADXL355_DEVID_AD, ®val);
+ if (ret)
+ return ret;
+
+ if (regval != ADXL355_DEVID_AD_VAL) {
+ dev_err(data->dev, "Invalid ADI ID 0x%02x\n", regval);
+ return -ENODEV;
+ }
+
+ ret = regmap_read(data->regmap, ADXL355_DEVID_MST, ®val);
+ if (ret)
+ return ret;
+
+ if (regval != ADXL355_DEVID_MST_VAL) {
+ dev_err(data->dev, "Invalid MEMS ID 0x%02x\n", regval);
+ return -ENODEV;
+ }
+
+ ret = regmap_read(data->regmap, ADXL355_PARTID, ®val);
+ if (ret)
+ return ret;
+
+ if (regval != ADXL355_PARTID_VAL) {
+ dev_err(data->dev, "Invalid DEV ID 0x%02x\n", regval);
+ return -ENODEV;
+ }
+
+ /*
+ * Perform a software reset to make sure the device is in a consistent
+ * state after start up.
+ */
+ ret = regmap_write(data->regmap, ADXL355_RESET, ADXL355_RESET_CODE);
+ if (ret)
+ return ret;
+
+ adxl355_fill_3db_frequency_table(data);
+
+ return adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
+}
+
+static int adxl355_get_temp_data(struct adxl355_data *data, u8 addr)
+{
+ return regmap_bulk_read(data->regmap, addr, data->transf_buf, 2);
+}
+
+static int adxl355_read_axis(struct adxl355_data *data, u8 addr)
+{
+ __be32 regval;
+ int ret;
+
+ ret = regmap_bulk_read(data->regmap, addr, data->transf_buf, 3);
+ if (ret < 0)
+ return ret;
+ regval = data->transf_buf[0] + (data->transf_buf[1] << 8)
+ + (data->transf_buf[2] << 16);
+
+ return be32_to_cpu(regval) >> 8;
+}
+
+static int adxl355_find_match(const int (*freq_tbl)[2], const int n,
+ const int val, const int val2)
+{
+ int i;
+
+ for (i = 0; i < n; i++) {
+ if (freq_tbl[i][0] == val && freq_tbl[i][1] == val2)
+ return i;
+ }
+
+ return -EINVAL;
+}
+
+static int adxl355_set_odr(struct adxl355_data *data,
+ enum adxl355_odr odr)
+{
+ int ret = 0;
+
+ mutex_lock(&data->lock);
+
+ if (data->odr == odr)
+ goto out_unlock;
+
+ ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
+ if (ret < 0)
+ goto out_unlock;
+
+ ret = regmap_update_bits(data->regmap, ADXL355_FILTER,
+ ADXL355_FILTER_ODR_MSK,
+ FIELD_PREP(ADXL355_FILTER_ODR_MSK, odr));
+ if (ret < 0)
+ goto out_unlock;
+
+ data->odr = odr;
+ adxl355_fill_3db_frequency_table(data);
+
+out_unlock:
+ ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
+ mutex_unlock(&data->lock);
+ return ret;
+}
+
+static int adxl355_set_hpf_3db(struct adxl355_data *data,
+ enum adxl355_hpf_3db hpf)
+{
+ int ret = 0;
+
+ mutex_lock(&data->lock);
+
+ if (data->hpf_3db == hpf)
+ goto out_unlock;
+
+ ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
+ if (ret < 0)
+ goto out_unlock;
+
+ ret = regmap_update_bits(data->regmap, ADXL355_FILTER,
+ ADXL355_FILTER_HPF_MSK,
+ FIELD_PREP(ADXL355_FILTER_HPF_MSK, hpf));
+ if (!ret)
+ data->hpf_3db = hpf;
+
+out_unlock:
+ ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
+ mutex_unlock(&data->lock);
+ return ret;
+}
+
+static int adxl355_set_calibbias(struct adxl355_data *data,
+ int channel2, int calibbias)
+{
+ int ret = 0;
+
+ data->transf_buf[0] = (calibbias >> 8) & 0xFF;
+ data->transf_buf[1] = calibbias & 0xFF;
+ data->transf_buf[2] = 0;
+
+ mutex_lock(&data->lock);
+
+ ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
+ if (ret < 0)
+ goto out_unlock;
+
+ switch (channel2) {
+ case IIO_MOD_X:
+ ret = regmap_bulk_write(data->regmap, ADXL355_OFFSET_X_H,
+ data->transf_buf, 2);
+ if (ret < 0)
+ goto out_unlock;
+ data->x_calibbias = calibbias;
+ break;
+ case IIO_MOD_Y:
+ ret = regmap_bulk_write(data->regmap, ADXL355_OFFSET_Y_H,
+ data->transf_buf, 2);
+ if (ret < 0)
+ goto out_unlock;
+ data->y_calibbias = calibbias;
+ break;
+ case IIO_MOD_Z:
+ ret = regmap_bulk_write(data->regmap, ADXL355_OFFSET_Z_H,
+ data->transf_buf, 2);
+ if (ret < 0)
+ goto out_unlock;
+ data->z_calibbias = calibbias;
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+
+out_unlock:
+ ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
+ mutex_unlock(&data->lock);
+ return ret;
+}
+
+static int adxl355_read_raw(struct iio_dev *indio_dev,
+ struct iio_chan_spec const *chan,
+ int *val, int *val2, long mask)
+{
+ struct adxl355_data *data = iio_priv(indio_dev);
+ int ret;
+ __be16 out;
+
+ switch (mask) {
+ case IIO_CHAN_INFO_RAW:
+ switch (chan->type) {
+ case IIO_TEMP:
+ ret = adxl355_get_temp_data(data, chan->address);
+ if (ret < 0)
+ return ret;
+ out = (data->transf_buf[1] << 8) + data->transf_buf[0];
+ *val = be16_to_cpu(out);
+
+ return IIO_VAL_INT;
+ case IIO_ACCEL:
+ ret = adxl355_read_axis(data, chan->address);
+ if (ret < 0)
+ return ret;
+ *val = sign_extend32(ret >> (chan->scan_type.shift),
+ chan->scan_type.realbits - 1);
+ return IIO_VAL_INT;
+ default:
+ return -EINVAL;
+ }
+
+ case IIO_CHAN_INFO_SCALE:
+ switch (chan->type) {
+ case IIO_TEMP:
+ *val = TEMP_SCALE_VAL;
+ *val2 = TEMP_SCALE_VAL2;
+ return IIO_VAL_INT_PLUS_MICRO;
+ case IIO_ACCEL:
+ *val = 0;
+ *val2 = ADXL355_NSCALE;
+ return IIO_VAL_INT_PLUS_NANO;
+ default:
+ return -EINVAL;
+ }
+ case IIO_CHAN_INFO_OFFSET:
+ *val = TEMP_OFFSET_VAL;
+ *val2 = TEMP_OFFSET_VAL2;
+ return IIO_VAL_INT_PLUS_MICRO;
+ case IIO_CHAN_INFO_CALIBBIAS:
+ if (chan->channel2 == IIO_MOD_X)
+ *val = data->x_calibbias;
+ else if (chan->channel2 == IIO_MOD_Y)
+ *val = data->y_calibbias;
+ else
+ *val = data->z_calibbias;
+ *val = sign_extend32(*val, 15);
+ return IIO_VAL_INT;
+ case IIO_CHAN_INFO_SAMP_FREQ:
+ *val = adxl355_odr_table[data->odr][0];
+ *val2 = adxl355_odr_table[data->odr][1];
+ return IIO_VAL_INT_PLUS_MICRO;
+ case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
+ *val = data->adxl355_hpf_3db_table[data->hpf_3db][0];
+ *val2 = data->adxl355_hpf_3db_table[data->hpf_3db][1];
+ return IIO_VAL_INT_PLUS_MICRO;
+ default:
+ return -EINVAL;
+ }
+}
+
+static int adxl355_write_raw(struct iio_dev *indio_dev,
+ struct iio_chan_spec const *chan,
+ int val, int val2, long mask)
+{
+ struct adxl355_data *data = iio_priv(indio_dev);
+ int odr_idx, hpf_idx, calibbias;
+
+ switch (mask) {
+ case IIO_CHAN_INFO_SAMP_FREQ:
+ odr_idx = adxl355_find_match(adxl355_odr_table,
+ ARRAY_SIZE(adxl355_odr_table),
+ val, val2);
+ if (odr_idx < 0)
+ return odr_idx;
+
+ return adxl355_set_odr(data, odr_idx);
+ case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
+ hpf_idx = adxl355_find_match(data->adxl355_hpf_3db_table,
+ ARRAY_SIZE(data->adxl355_hpf_3db_table),
+ val, val2);
+ if (hpf_idx < 0)
+ return hpf_idx;
+
+ return adxl355_set_hpf_3db(data, hpf_idx);
+ case IIO_CHAN_INFO_CALIBBIAS:
+ calibbias = clamp_t(int, val, S16_MIN, S16_MAX);
+
+ return adxl355_set_calibbias(data, chan->channel2, calibbias);
+ default:
+ return -EINVAL;
+ }
+}
+
+static int adxl355_read_avail(struct iio_dev *indio_dev,
+ struct iio_chan_spec const *chan,
+ const int **vals, int *type, int *length,
+ long mask)
+{
+ struct adxl355_data *data = iio_priv(indio_dev);
+
+ switch (mask) {
+ case IIO_CHAN_INFO_SAMP_FREQ:
+ *vals = (const int *)adxl355_odr_table;
+ *type = IIO_VAL_INT_PLUS_MICRO;
+ /* Values are stored in a 2D matrix */
+ *length = ARRAY_SIZE(adxl355_odr_table) * 2;
+
+ return IIO_AVAIL_LIST;
+ case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
+ *vals = (const int *)(data->adxl355_hpf_3db_table);
+ *type = IIO_VAL_INT_PLUS_MICRO;
+ /* Values are stored in a 2D matrix */
+ *length = ARRAY_SIZE(data->adxl355_hpf_3db_table) * 2;
+
+ return IIO_AVAIL_LIST;
+ default:
+ return -EINVAL;
+ }
+}
+
+static const unsigned long adxl355_avail_scan_masks[] = {
+ GENMASK(3, 0),
+ 0
+};
+
+static const struct iio_info adxl355_info = {
+ .read_raw = adxl355_read_raw,
+ .write_raw = adxl355_write_raw,
+ .read_avail = &adxl355_read_avail
+};
+
+#define ADXL355_ACCEL_CHANNEL(index, reg, axis) { \
+ .type = IIO_ACCEL, \
+ .address = reg, \
+ .modified = 1, \
+ .channel2 = IIO_MOD_##axis, \
+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
+ BIT(IIO_CHAN_INFO_CALIBBIAS), \
+ .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
+ BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
+ BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY), \
+ .info_mask_shared_by_type_available = \
+ BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
+ BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY), \
+ .scan_index = index, \
+ .scan_type = { \
+ .sign = 's', \
+ .realbits = 20, \
+ .storagebits = 32, \
+ .shift = 4, \
+ .endianness = IIO_BE, \
+ } \
+}
+
+static const struct iio_chan_spec adxl355_channels[] = {
+ ADXL355_ACCEL_CHANNEL(0, ADXL355_XDATA3, X),
+ ADXL355_ACCEL_CHANNEL(1, ADXL355_YDATA3, Y),
+ ADXL355_ACCEL_CHANNEL(2, ADXL355_ZDATA3, Z),
+ {
+ .type = IIO_TEMP,
+ .address = ADXL355_TEMP2,
+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
+ BIT(IIO_CHAN_INFO_SCALE) |
+ BIT(IIO_CHAN_INFO_OFFSET),
+ .scan_index = 3,
+ .scan_type = {
+ .sign = 's',
+ .realbits = 12,
+ .storagebits = 16,
+ .endianness = IIO_BE,
+ },
+ }
+};
+
+int adxl355_core_probe(struct device *dev, struct regmap *regmap,
+ const char *name)
+{
+ struct adxl355_data *data;
+ struct iio_dev *indio_dev;
+ int ret;
+
+ indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
+ if (!indio_dev)
+ return -ENOMEM;
+
+ data = iio_priv(indio_dev);
+ data->regmap = regmap;
+ data->dev = dev;
+ data->op_mode = ADXL355_STANDBY;
+ mutex_init(&data->lock);
+
+ indio_dev->name = name;
+ indio_dev->info = &adxl355_info;
+ indio_dev->modes = INDIO_DIRECT_MODE;
+ indio_dev->channels = adxl355_channels;
+ indio_dev->num_channels = ARRAY_SIZE(adxl355_channels);
+ indio_dev->available_scan_masks = adxl355_avail_scan_masks;
+
+ ret = adxl355_setup(data);
+ if (ret < 0) {
+ dev_err(dev, "ADXL355 setup failed\n");
+ return ret;
+ }
+
+ return devm_iio_device_register(dev, indio_dev);
+}
+EXPORT_SYMBOL_GPL(adxl355_core_probe);
+
+MODULE_AUTHOR("Puranjay Mohan <[email protected]>");
+MODULE_DESCRIPTION("ADXL355 3-Axis Digital Accelerometer core driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/accel/adxl355_i2c.c b/drivers/iio/accel/adxl355_i2c.c
new file mode 100644
index 000000000..6b84d8df2
--- /dev/null
+++ b/drivers/iio/accel/adxl355_i2c.c
@@ -0,0 +1,63 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * ADXL355 3-Axis Digital Accelerometer I2C driver
+ *
+ * Copyright (c) 2021 Puranjay Mohan <[email protected]>
+ */
+
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/regmap.h>
+
+#include "adxl355.h"
+
+static const struct regmap_config adxl355_i2c_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+ .max_register = 0x2F,
+ .rd_table = &adxl355_readable_regs_tbl,
+ .wr_table = &adxl355_writeable_regs_tbl
+};
+
+static int adxl355_i2c_probe(struct i2c_client *client)
+{
+ struct regmap *regmap;
+
+ regmap = devm_regmap_init_i2c(client, &adxl355_i2c_regmap_config);
+ if (IS_ERR(regmap)) {
+ dev_err(&client->dev, "Error initializing i2c regmap: %ld\n",
+ PTR_ERR(regmap));
+ return PTR_ERR(regmap);
+ }
+
+ return adxl355_core_probe(&client->dev, regmap, client->name);
+}
+
+static const struct i2c_device_id adxl355_i2c_id[] = {
+ { "adxl355", 0 },
+ { }
+};
+
+MODULE_DEVICE_TABLE(i2c, adxl355_i2c_id);
+
+static const struct of_device_id adxl355_of_match[] = {
+ { .compatible = "adi,adxl355" },
+ { }
+};
+
+MODULE_DEVICE_TABLE(of, adxl355_of_match);
+
+static struct i2c_driver adxl355_i2c_driver = {
+ .driver = {
+ .name = "adxl355_i2c",
+ .of_match_table = adxl355_of_match,
+ },
+ .probe_new = adxl355_i2c_probe,
+ .id_table = adxl355_i2c_id,
+};
+
+module_i2c_driver(adxl355_i2c_driver);
+
+MODULE_AUTHOR("Puranjay Mohan <[email protected]>");
+MODULE_DESCRIPTION("ADXL355 3-Axis Digital Accelerometer I2C driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/accel/adxl355_spi.c b/drivers/iio/accel/adxl355_spi.c
new file mode 100644
index 000000000..108d1b308
--- /dev/null
+++ b/drivers/iio/accel/adxl355_spi.c
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * ADXL355 3-Axis Digital Accelerometer SPI driver
+ *
+ * Copyright (c) 2021 Puranjay Mohan <[email protected]>
+ */
+
+#include <linux/module.h>
+#include <linux/regmap.h>
+#include <linux/spi/spi.h>
+
+#include "adxl355.h"
+
+static const struct regmap_config adxl355_spi_regmap_config = {
+ .reg_bits = 7,
+ .pad_bits = 1,
+ .val_bits = 8,
+ .read_flag_mask = BIT(0),
+ .max_register = 0x2F,
+ .rd_table = &adxl355_readable_regs_tbl,
+ .wr_table = &adxl355_writeable_regs_tbl
+};
+
+static int adxl355_spi_probe(struct spi_device *spi)
+{
+ const struct spi_device_id *id = spi_get_device_id(spi);
+ struct regmap *regmap;
+
+ regmap = devm_regmap_init_spi(spi, &adxl355_spi_regmap_config);
+ if (IS_ERR(regmap)) {
+ dev_err(&spi->dev, "Error initializing spi regmap: %ld\n",
+ PTR_ERR(regmap));
+ return PTR_ERR(regmap);
+ }
+
+ return adxl355_core_probe(&spi->dev, regmap, id->name);
+}
+
+static const struct spi_device_id adxl355_spi_id[] = {
+ { "adxl355", 0 },
+ { }
+};
+
+MODULE_DEVICE_TABLE(spi, adxl355_spi_id);
+
+static const struct of_device_id adxl355_of_match[] = {
+ { .compatible = "adi,adxl355" },
+ { }
+};
+
+MODULE_DEVICE_TABLE(of, adxl355_of_match);
+
+static struct spi_driver adxl355_spi_driver = {
+ .driver = {
+ .name = "adxl355_spi",
+ .of_match_table = adxl355_of_match,
+ },
+ .probe = adxl355_spi_probe,
+ .id_table = adxl355_spi_id,
+};
+
+module_spi_driver(adxl355_spi_driver);
+
+MODULE_AUTHOR("Puranjay Mohan <[email protected]>");
+MODULE_DESCRIPTION("ADXL355 3-Axis Digital Accelerometer SPI driver");
+MODULE_LICENSE("GPL v2");
--
2.30.1
Hi Puranjay,
I love your patch! Perhaps something to improve:
[auto build test WARNING on iio/togreg]
[also build test WARNING on linus/master v5.14-rc3 next-20210726]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Puranjay-Mohan/iio-accel-add-support-for-ADXL355/20210727-131822
base: https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio.git togreg
config: openrisc-randconfig-s031-20210727 (attached as .config)
compiler: or1k-linux-gcc (GCC) 10.3.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.3-341-g8af24329-dirty
# https://github.com/0day-ci/linux/commit/a0ad8ce87d3d3357c64f98bec48b75d07b961da8
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Puranjay-Mohan/iio-accel-add-support-for-ADXL355/20210727-131822
git checkout a0ad8ce87d3d3357c64f98bec48b75d07b961da8
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-10.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=openrisc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <[email protected]>
sparse warnings: (new ones prefixed by >>)
>> drivers/iio/accel/adxl355_core.c:204:16: sparse: sparse: incorrect type in assignment (different base types) @@ expected restricted __be32 [usertype] regval @@ got int @@
drivers/iio/accel/adxl355_core.c:204:16: sparse: expected restricted __be32 [usertype] regval
drivers/iio/accel/adxl355_core.c:204:16: sparse: got int
>> drivers/iio/accel/adxl355_core.c:341:29: sparse: sparse: incorrect type in assignment (different base types) @@ expected restricted __be16 [usertype] out @@ got int @@
drivers/iio/accel/adxl355_core.c:341:29: sparse: expected restricted __be16 [usertype] out
drivers/iio/accel/adxl355_core.c:341:29: sparse: got int
vim +204 drivers/iio/accel/adxl355_core.c
195
196 static int adxl355_read_axis(struct adxl355_data *data, u8 addr)
197 {
198 __be32 regval;
199 int ret;
200
201 ret = regmap_bulk_read(data->regmap, addr, data->transf_buf, 3);
202 if (ret < 0)
203 return ret;
> 204 regval = data->transf_buf[0] + (data->transf_buf[1] << 8)
205 + (data->transf_buf[2] << 16);
206
207 return be32_to_cpu(regval) >> 8;
208 }
209
210 static int adxl355_find_match(const int (*freq_tbl)[2], const int n,
211 const int val, const int val2)
212 {
213 int i;
214
215 for (i = 0; i < n; i++) {
216 if (freq_tbl[i][0] == val && freq_tbl[i][1] == val2)
217 return i;
218 }
219
220 return -EINVAL;
221 }
222
223 static int adxl355_set_odr(struct adxl355_data *data,
224 enum adxl355_odr odr)
225 {
226 int ret = 0;
227
228 mutex_lock(&data->lock);
229
230 if (data->odr == odr)
231 goto out_unlock;
232
233 ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
234 if (ret < 0)
235 goto out_unlock;
236
237 ret = regmap_update_bits(data->regmap, ADXL355_FILTER,
238 ADXL355_FILTER_ODR_MSK,
239 FIELD_PREP(ADXL355_FILTER_ODR_MSK, odr));
240 if (ret < 0)
241 goto out_unlock;
242
243 data->odr = odr;
244 adxl355_fill_3db_frequency_table(data);
245
246 out_unlock:
247 ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
248 mutex_unlock(&data->lock);
249 return ret;
250 }
251
252 static int adxl355_set_hpf_3db(struct adxl355_data *data,
253 enum adxl355_hpf_3db hpf)
254 {
255 int ret = 0;
256
257 mutex_lock(&data->lock);
258
259 if (data->hpf_3db == hpf)
260 goto out_unlock;
261
262 ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
263 if (ret < 0)
264 goto out_unlock;
265
266 ret = regmap_update_bits(data->regmap, ADXL355_FILTER,
267 ADXL355_FILTER_HPF_MSK,
268 FIELD_PREP(ADXL355_FILTER_HPF_MSK, hpf));
269 if (!ret)
270 data->hpf_3db = hpf;
271
272 out_unlock:
273 ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
274 mutex_unlock(&data->lock);
275 return ret;
276 }
277
278 static int adxl355_set_calibbias(struct adxl355_data *data,
279 int channel2, int calibbias)
280 {
281 int ret = 0;
282
283 data->transf_buf[0] = (calibbias >> 8) & 0xFF;
284 data->transf_buf[1] = calibbias & 0xFF;
285 data->transf_buf[2] = 0;
286
287 mutex_lock(&data->lock);
288
289 ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
290 if (ret < 0)
291 goto out_unlock;
292
293 switch (channel2) {
294 case IIO_MOD_X:
295 ret = regmap_bulk_write(data->regmap, ADXL355_OFFSET_X_H,
296 data->transf_buf, 2);
297 if (ret < 0)
298 goto out_unlock;
299 data->x_calibbias = calibbias;
300 break;
301 case IIO_MOD_Y:
302 ret = regmap_bulk_write(data->regmap, ADXL355_OFFSET_Y_H,
303 data->transf_buf, 2);
304 if (ret < 0)
305 goto out_unlock;
306 data->y_calibbias = calibbias;
307 break;
308 case IIO_MOD_Z:
309 ret = regmap_bulk_write(data->regmap, ADXL355_OFFSET_Z_H,
310 data->transf_buf, 2);
311 if (ret < 0)
312 goto out_unlock;
313 data->z_calibbias = calibbias;
314 break;
315 default:
316 ret = -EINVAL;
317 break;
318 }
319
320 out_unlock:
321 ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
322 mutex_unlock(&data->lock);
323 return ret;
324 }
325
326 static int adxl355_read_raw(struct iio_dev *indio_dev,
327 struct iio_chan_spec const *chan,
328 int *val, int *val2, long mask)
329 {
330 struct adxl355_data *data = iio_priv(indio_dev);
331 int ret;
332 __be16 out;
333
334 switch (mask) {
335 case IIO_CHAN_INFO_RAW:
336 switch (chan->type) {
337 case IIO_TEMP:
338 ret = adxl355_get_temp_data(data, chan->address);
339 if (ret < 0)
340 return ret;
> 341 out = (data->transf_buf[1] << 8) + data->transf_buf[0];
342 *val = be16_to_cpu(out);
343
344 return IIO_VAL_INT;
345 case IIO_ACCEL:
346 ret = adxl355_read_axis(data, chan->address);
347 if (ret < 0)
348 return ret;
349 *val = sign_extend32(ret >> (chan->scan_type.shift),
350 chan->scan_type.realbits - 1);
351 return IIO_VAL_INT;
352 default:
353 return -EINVAL;
354 }
355
356 case IIO_CHAN_INFO_SCALE:
357 switch (chan->type) {
358 case IIO_TEMP:
359 *val = TEMP_SCALE_VAL;
360 *val2 = TEMP_SCALE_VAL2;
361 return IIO_VAL_INT_PLUS_MICRO;
362 case IIO_ACCEL:
363 *val = 0;
364 *val2 = ADXL355_NSCALE;
365 return IIO_VAL_INT_PLUS_NANO;
366 default:
367 return -EINVAL;
368 }
369 case IIO_CHAN_INFO_OFFSET:
370 *val = TEMP_OFFSET_VAL;
371 *val2 = TEMP_OFFSET_VAL2;
372 return IIO_VAL_INT_PLUS_MICRO;
373 case IIO_CHAN_INFO_CALIBBIAS:
374 if (chan->channel2 == IIO_MOD_X)
375 *val = data->x_calibbias;
376 else if (chan->channel2 == IIO_MOD_Y)
377 *val = data->y_calibbias;
378 else
379 *val = data->z_calibbias;
380 *val = sign_extend32(*val, 15);
381 return IIO_VAL_INT;
382 case IIO_CHAN_INFO_SAMP_FREQ:
383 *val = adxl355_odr_table[data->odr][0];
384 *val2 = adxl355_odr_table[data->odr][1];
385 return IIO_VAL_INT_PLUS_MICRO;
386 case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
387 *val = data->adxl355_hpf_3db_table[data->hpf_3db][0];
388 *val2 = data->adxl355_hpf_3db_table[data->hpf_3db][1];
389 return IIO_VAL_INT_PLUS_MICRO;
390 default:
391 return -EINVAL;
392 }
393 }
394
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/[email protected]
On Tue, 27 Jul 2021 19:45:46 +0800
kernel test robot <[email protected]> wrote:
> Hi Puranjay,
>
> I love your patch! Perhaps something to improve:
>
> [auto build test WARNING on iio/togreg]
> [also build test WARNING on linus/master v5.14-rc3 next-20210726]
> [If your patch is applied to the wrong git tree, kindly drop us a note.
> And when submitting patch, we suggest to use '--base' as documented in
> https://git-scm.com/docs/git-format-patch]
>
> url: https://github.com/0day-ci/linux/commits/Puranjay-Mohan/iio-accel-add-support-for-ADXL355/20210727-131822
> base: https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio.git togreg
> config: openrisc-randconfig-s031-20210727 (attached as .config)
> compiler: or1k-linux-gcc (GCC) 10.3.0
> reproduce:
> wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # apt-get install sparse
> # sparse version: v0.6.3-341-g8af24329-dirty
> # https://github.com/0day-ci/linux/commit/a0ad8ce87d3d3357c64f98bec48b75d07b961da8
> git remote add linux-review https://github.com/0day-ci/linux
> git fetch --no-tags linux-review Puranjay-Mohan/iio-accel-add-support-for-ADXL355/20210727-131822
> git checkout a0ad8ce87d3d3357c64f98bec48b75d07b961da8
> # save the attached .config to linux build tree
> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-10.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=openrisc
>
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot <[email protected]>
>
>
> sparse warnings: (new ones prefixed by >>)
> >> drivers/iio/accel/adxl355_core.c:204:16: sparse: sparse: incorrect type in assignment (different base types) @@ expected restricted __be32 [usertype] regval @@ got int @@
> drivers/iio/accel/adxl355_core.c:204:16: sparse: expected restricted __be32 [usertype] regval
> drivers/iio/accel/adxl355_core.c:204:16: sparse: got int
> >> drivers/iio/accel/adxl355_core.c:341:29: sparse: sparse: incorrect type in assignment (different base types) @@ expected restricted __be16 [usertype] out @@ got int @@
> drivers/iio/accel/adxl355_core.c:341:29: sparse: expected restricted __be16 [usertype] out
> drivers/iio/accel/adxl355_core.c:341:29: sparse: got int
>
> vim +204 drivers/iio/accel/adxl355_core.c
>
> 195
> 196 static int adxl355_read_axis(struct adxl355_data *data, u8 addr)
> 197 {
> 198 __be32 regval;
> 199 int ret;
> 200
> 201 ret = regmap_bulk_read(data->regmap, addr, data->transf_buf, 3);
> 202 if (ret < 0)
> 203 return ret;
> > 204 regval = data->transf_buf[0] + (data->transf_buf[1] << 8)
> 205 + (data->transf_buf[2] << 16);
Note that you can almost certainly use something like get_unaligned_be24(data->transf_buf)
here, though current code is some mixture of hand unwinding the endianness
and calling a standard function to do it.
> 206
> 207 return be32_to_cpu(regval) >> 8;
> 208 }
> 209
> 210 static int adxl355_find_match(const int (*freq_tbl)[2], const int n,
> 211 const int val, const int val2)
> 212 {
> 213 int i;
> 214
> 215 for (i = 0; i < n; i++) {
> 216 if (freq_tbl[i][0] == val && freq_tbl[i][1] == val2)
> 217 return i;
> 218 }
> 219
> 220 return -EINVAL;
> 221 }
> 222
> 223 static int adxl355_set_odr(struct adxl355_data *data,
> 224 enum adxl355_odr odr)
> 225 {
> 226 int ret = 0;
> 227
> 228 mutex_lock(&data->lock);
> 229
> 230 if (data->odr == odr)
> 231 goto out_unlock;
> 232
> 233 ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
> 234 if (ret < 0)
> 235 goto out_unlock;
> 236
> 237 ret = regmap_update_bits(data->regmap, ADXL355_FILTER,
> 238 ADXL355_FILTER_ODR_MSK,
> 239 FIELD_PREP(ADXL355_FILTER_ODR_MSK, odr));
> 240 if (ret < 0)
> 241 goto out_unlock;
> 242
> 243 data->odr = odr;
> 244 adxl355_fill_3db_frequency_table(data);
> 245
> 246 out_unlock:
> 247 ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
> 248 mutex_unlock(&data->lock);
> 249 return ret;
> 250 }
> 251
> 252 static int adxl355_set_hpf_3db(struct adxl355_data *data,
> 253 enum adxl355_hpf_3db hpf)
> 254 {
> 255 int ret = 0;
> 256
> 257 mutex_lock(&data->lock);
> 258
> 259 if (data->hpf_3db == hpf)
> 260 goto out_unlock;
> 261
> 262 ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
> 263 if (ret < 0)
> 264 goto out_unlock;
> 265
> 266 ret = regmap_update_bits(data->regmap, ADXL355_FILTER,
> 267 ADXL355_FILTER_HPF_MSK,
> 268 FIELD_PREP(ADXL355_FILTER_HPF_MSK, hpf));
> 269 if (!ret)
> 270 data->hpf_3db = hpf;
> 271
> 272 out_unlock:
> 273 ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
> 274 mutex_unlock(&data->lock);
> 275 return ret;
> 276 }
> 277
> 278 static int adxl355_set_calibbias(struct adxl355_data *data,
> 279 int channel2, int calibbias)
> 280 {
> 281 int ret = 0;
> 282
> 283 data->transf_buf[0] = (calibbias >> 8) & 0xFF;
> 284 data->transf_buf[1] = calibbias & 0xFF;
> 285 data->transf_buf[2] = 0;
> 286
> 287 mutex_lock(&data->lock);
> 288
> 289 ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
> 290 if (ret < 0)
> 291 goto out_unlock;
> 292
> 293 switch (channel2) {
> 294 case IIO_MOD_X:
> 295 ret = regmap_bulk_write(data->regmap, ADXL355_OFFSET_X_H,
> 296 data->transf_buf, 2);
> 297 if (ret < 0)
> 298 goto out_unlock;
> 299 data->x_calibbias = calibbias;
> 300 break;
> 301 case IIO_MOD_Y:
> 302 ret = regmap_bulk_write(data->regmap, ADXL355_OFFSET_Y_H,
> 303 data->transf_buf, 2);
> 304 if (ret < 0)
> 305 goto out_unlock;
> 306 data->y_calibbias = calibbias;
> 307 break;
> 308 case IIO_MOD_Z:
> 309 ret = regmap_bulk_write(data->regmap, ADXL355_OFFSET_Z_H,
> 310 data->transf_buf, 2);
> 311 if (ret < 0)
> 312 goto out_unlock;
> 313 data->z_calibbias = calibbias;
> 314 break;
> 315 default:
> 316 ret = -EINVAL;
> 317 break;
> 318 }
> 319
> 320 out_unlock:
> 321 ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
> 322 mutex_unlock(&data->lock);
> 323 return ret;
> 324 }
> 325
> 326 static int adxl355_read_raw(struct iio_dev *indio_dev,
> 327 struct iio_chan_spec const *chan,
> 328 int *val, int *val2, long mask)
> 329 {
> 330 struct adxl355_data *data = iio_priv(indio_dev);
> 331 int ret;
> 332 __be16 out;
> 333
> 334 switch (mask) {
> 335 case IIO_CHAN_INFO_RAW:
> 336 switch (chan->type) {
> 337 case IIO_TEMP:
> 338 ret = adxl355_get_temp_data(data, chan->address);
> 339 if (ret < 0)
> 340 return ret;
> > 341 out = (data->transf_buf[1] << 8) + data->transf_buf[0];
> 342 *val = be16_to_cpu(out);
> 343
> 344 return IIO_VAL_INT;
> 345 case IIO_ACCEL:
> 346 ret = adxl355_read_axis(data, chan->address);
> 347 if (ret < 0)
> 348 return ret;
> 349 *val = sign_extend32(ret >> (chan->scan_type.shift),
> 350 chan->scan_type.realbits - 1);
> 351 return IIO_VAL_INT;
> 352 default:
> 353 return -EINVAL;
> 354 }
> 355
> 356 case IIO_CHAN_INFO_SCALE:
> 357 switch (chan->type) {
> 358 case IIO_TEMP:
> 359 *val = TEMP_SCALE_VAL;
> 360 *val2 = TEMP_SCALE_VAL2;
> 361 return IIO_VAL_INT_PLUS_MICRO;
> 362 case IIO_ACCEL:
> 363 *val = 0;
> 364 *val2 = ADXL355_NSCALE;
> 365 return IIO_VAL_INT_PLUS_NANO;
> 366 default:
> 367 return -EINVAL;
> 368 }
> 369 case IIO_CHAN_INFO_OFFSET:
> 370 *val = TEMP_OFFSET_VAL;
> 371 *val2 = TEMP_OFFSET_VAL2;
> 372 return IIO_VAL_INT_PLUS_MICRO;
> 373 case IIO_CHAN_INFO_CALIBBIAS:
> 374 if (chan->channel2 == IIO_MOD_X)
> 375 *val = data->x_calibbias;
> 376 else if (chan->channel2 == IIO_MOD_Y)
> 377 *val = data->y_calibbias;
> 378 else
> 379 *val = data->z_calibbias;
> 380 *val = sign_extend32(*val, 15);
> 381 return IIO_VAL_INT;
> 382 case IIO_CHAN_INFO_SAMP_FREQ:
> 383 *val = adxl355_odr_table[data->odr][0];
> 384 *val2 = adxl355_odr_table[data->odr][1];
> 385 return IIO_VAL_INT_PLUS_MICRO;
> 386 case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
> 387 *val = data->adxl355_hpf_3db_table[data->hpf_3db][0];
> 388 *val2 = data->adxl355_hpf_3db_table[data->hpf_3db][1];
> 389 return IIO_VAL_INT_PLUS_MICRO;
> 390 default:
> 391 return -EINVAL;
> 392 }
> 393 }
> 394
>
> ---
> 0-DAY CI Kernel Test Service, Intel Corporation
> https://lists.01.org/hyperkitty/list/[email protected]
>
On Tue, Jul 27, 2021 at 7:16 PM Jonathan Cameron
<[email protected]> wrote:
>
> On Tue, 27 Jul 2021 19:45:46 +0800
> kernel test robot <[email protected]> wrote:
>
> > Hi Puranjay,
> >
> > I love your patch! Perhaps something to improve:
> >
> > [auto build test WARNING on iio/togreg]
> > [also build test WARNING on linus/master v5.14-rc3 next-20210726]
> > [If your patch is applied to the wrong git tree, kindly drop us a note.
> > And when submitting patch, we suggest to use '--base' as documented in
> > https://git-scm.com/docs/git-format-patch]
> >
> > url: https://github.com/0day-ci/linux/commits/Puranjay-Mohan/iio-accel-add-support-for-ADXL355/20210727-131822
> > base: https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio.git togreg
> > config: openrisc-randconfig-s031-20210727 (attached as .config)
> > compiler: or1k-linux-gcc (GCC) 10.3.0
> > reproduce:
> > wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
> > chmod +x ~/bin/make.cross
> > # apt-get install sparse
> > # sparse version: v0.6.3-341-g8af24329-dirty
> > # https://github.com/0day-ci/linux/commit/a0ad8ce87d3d3357c64f98bec48b75d07b961da8
> > git remote add linux-review https://github.com/0day-ci/linux
> > git fetch --no-tags linux-review Puranjay-Mohan/iio-accel-add-support-for-ADXL355/20210727-131822
> > git checkout a0ad8ce87d3d3357c64f98bec48b75d07b961da8
> > # save the attached .config to linux build tree
> > COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-10.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=openrisc
> >
> > If you fix the issue, kindly add following tag as appropriate
> > Reported-by: kernel test robot <[email protected]>
> >
> >
> > sparse warnings: (new ones prefixed by >>)
> > >> drivers/iio/accel/adxl355_core.c:204:16: sparse: sparse: incorrect type in assignment (different base types) @@ expected restricted __be32 [usertype] regval @@ got int @@
> > drivers/iio/accel/adxl355_core.c:204:16: sparse: expected restricted __be32 [usertype] regval
> > drivers/iio/accel/adxl355_core.c:204:16: sparse: got int
> > >> drivers/iio/accel/adxl355_core.c:341:29: sparse: sparse: incorrect type in assignment (different base types) @@ expected restricted __be16 [usertype] out @@ got int @@
> > drivers/iio/accel/adxl355_core.c:341:29: sparse: expected restricted __be16 [usertype] out
> > drivers/iio/accel/adxl355_core.c:341:29: sparse: got int
> >
> > vim +204 drivers/iio/accel/adxl355_core.c
> >
> > 195
> > 196 static int adxl355_read_axis(struct adxl355_data *data, u8 addr)
> > 197 {
> > 198 __be32 regval;
> > 199 int ret;
> > 200
> > 201 ret = regmap_bulk_read(data->regmap, addr, data->transf_buf, 3);
> > 202 if (ret < 0)
> > 203 return ret;
> > > 204 regval = data->transf_buf[0] + (data->transf_buf[1] << 8)
> > 205 + (data->transf_buf[2] << 16);
>
> Note that you can almost certainly use something like get_unaligned_be24(data->transf_buf)
> here, though current code is some mixture of hand unwinding the endianness
> and calling a standard function to do it.
I feel doing it fully manually is fine as most other drivers are doing
it that way. I have sent the next version which does this fully
manually.
Also, I ran it through sparse this time before sending it.
>
> > 206
> > 207 return be32_to_cpu(regval) >> 8;
> > 208 }
> > 209
> > 210 static int adxl355_find_match(const int (*freq_tbl)[2], const int n,
> > 211 const int val, const int val2)
> > 212 {
> > 213 int i;
> > 214
> > 215 for (i = 0; i < n; i++) {
> > 216 if (freq_tbl[i][0] == val && freq_tbl[i][1] == val2)
> > 217 return i;
> > 218 }
> > 219
> > 220 return -EINVAL;
> > 221 }
> > 222
> > 223 static int adxl355_set_odr(struct adxl355_data *data,
> > 224 enum adxl355_odr odr)
> > 225 {
> > 226 int ret = 0;
> > 227
> > 228 mutex_lock(&data->lock);
> > 229
> > 230 if (data->odr == odr)
> > 231 goto out_unlock;
> > 232
> > 233 ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
> > 234 if (ret < 0)
> > 235 goto out_unlock;
> > 236
> > 237 ret = regmap_update_bits(data->regmap, ADXL355_FILTER,
> > 238 ADXL355_FILTER_ODR_MSK,
> > 239 FIELD_PREP(ADXL355_FILTER_ODR_MSK, odr));
> > 240 if (ret < 0)
> > 241 goto out_unlock;
> > 242
> > 243 data->odr = odr;
> > 244 adxl355_fill_3db_frequency_table(data);
> > 245
> > 246 out_unlock:
> > 247 ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
> > 248 mutex_unlock(&data->lock);
> > 249 return ret;
> > 250 }
> > 251
> > 252 static int adxl355_set_hpf_3db(struct adxl355_data *data,
> > 253 enum adxl355_hpf_3db hpf)
> > 254 {
> > 255 int ret = 0;
> > 256
> > 257 mutex_lock(&data->lock);
> > 258
> > 259 if (data->hpf_3db == hpf)
> > 260 goto out_unlock;
> > 261
> > 262 ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
> > 263 if (ret < 0)
> > 264 goto out_unlock;
> > 265
> > 266 ret = regmap_update_bits(data->regmap, ADXL355_FILTER,
> > 267 ADXL355_FILTER_HPF_MSK,
> > 268 FIELD_PREP(ADXL355_FILTER_HPF_MSK, hpf));
> > 269 if (!ret)
> > 270 data->hpf_3db = hpf;
> > 271
> > 272 out_unlock:
> > 273 ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
> > 274 mutex_unlock(&data->lock);
> > 275 return ret;
> > 276 }
> > 277
> > 278 static int adxl355_set_calibbias(struct adxl355_data *data,
> > 279 int channel2, int calibbias)
> > 280 {
> > 281 int ret = 0;
> > 282
> > 283 data->transf_buf[0] = (calibbias >> 8) & 0xFF;
> > 284 data->transf_buf[1] = calibbias & 0xFF;
> > 285 data->transf_buf[2] = 0;
> > 286
> > 287 mutex_lock(&data->lock);
> > 288
> > 289 ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
> > 290 if (ret < 0)
> > 291 goto out_unlock;
> > 292
> > 293 switch (channel2) {
> > 294 case IIO_MOD_X:
> > 295 ret = regmap_bulk_write(data->regmap, ADXL355_OFFSET_X_H,
> > 296 data->transf_buf, 2);
> > 297 if (ret < 0)
> > 298 goto out_unlock;
> > 299 data->x_calibbias = calibbias;
> > 300 break;
> > 301 case IIO_MOD_Y:
> > 302 ret = regmap_bulk_write(data->regmap, ADXL355_OFFSET_Y_H,
> > 303 data->transf_buf, 2);
> > 304 if (ret < 0)
> > 305 goto out_unlock;
> > 306 data->y_calibbias = calibbias;
> > 307 break;
> > 308 case IIO_MOD_Z:
> > 309 ret = regmap_bulk_write(data->regmap, ADXL355_OFFSET_Z_H,
> > 310 data->transf_buf, 2);
> > 311 if (ret < 0)
> > 312 goto out_unlock;
> > 313 data->z_calibbias = calibbias;
> > 314 break;
> > 315 default:
> > 316 ret = -EINVAL;
> > 317 break;
> > 318 }
> > 319
> > 320 out_unlock:
> > 321 ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
> > 322 mutex_unlock(&data->lock);
> > 323 return ret;
> > 324 }
> > 325
> > 326 static int adxl355_read_raw(struct iio_dev *indio_dev,
> > 327 struct iio_chan_spec const *chan,
> > 328 int *val, int *val2, long mask)
> > 329 {
> > 330 struct adxl355_data *data = iio_priv(indio_dev);
> > 331 int ret;
> > 332 __be16 out;
> > 333
> > 334 switch (mask) {
> > 335 case IIO_CHAN_INFO_RAW:
> > 336 switch (chan->type) {
> > 337 case IIO_TEMP:
> > 338 ret = adxl355_get_temp_data(data, chan->address);
> > 339 if (ret < 0)
> > 340 return ret;
> > > 341 out = (data->transf_buf[1] << 8) + data->transf_buf[0];
> > 342 *val = be16_to_cpu(out);
> > 343
> > 344 return IIO_VAL_INT;
> > 345 case IIO_ACCEL:
> > 346 ret = adxl355_read_axis(data, chan->address);
> > 347 if (ret < 0)
> > 348 return ret;
> > 349 *val = sign_extend32(ret >> (chan->scan_type.shift),
> > 350 chan->scan_type.realbits - 1);
> > 351 return IIO_VAL_INT;
> > 352 default:
> > 353 return -EINVAL;
> > 354 }
> > 355
> > 356 case IIO_CHAN_INFO_SCALE:
> > 357 switch (chan->type) {
> > 358 case IIO_TEMP:
> > 359 *val = TEMP_SCALE_VAL;
> > 360 *val2 = TEMP_SCALE_VAL2;
> > 361 return IIO_VAL_INT_PLUS_MICRO;
> > 362 case IIO_ACCEL:
> > 363 *val = 0;
> > 364 *val2 = ADXL355_NSCALE;
> > 365 return IIO_VAL_INT_PLUS_NANO;
> > 366 default:
> > 367 return -EINVAL;
> > 368 }
> > 369 case IIO_CHAN_INFO_OFFSET:
> > 370 *val = TEMP_OFFSET_VAL;
> > 371 *val2 = TEMP_OFFSET_VAL2;
> > 372 return IIO_VAL_INT_PLUS_MICRO;
> > 373 case IIO_CHAN_INFO_CALIBBIAS:
> > 374 if (chan->channel2 == IIO_MOD_X)
> > 375 *val = data->x_calibbias;
> > 376 else if (chan->channel2 == IIO_MOD_Y)
> > 377 *val = data->y_calibbias;
> > 378 else
> > 379 *val = data->z_calibbias;
> > 380 *val = sign_extend32(*val, 15);
> > 381 return IIO_VAL_INT;
> > 382 case IIO_CHAN_INFO_SAMP_FREQ:
> > 383 *val = adxl355_odr_table[data->odr][0];
> > 384 *val2 = adxl355_odr_table[data->odr][1];
> > 385 return IIO_VAL_INT_PLUS_MICRO;
> > 386 case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
> > 387 *val = data->adxl355_hpf_3db_table[data->hpf_3db][0];
> > 388 *val2 = data->adxl355_hpf_3db_table[data->hpf_3db][1];
> > 389 return IIO_VAL_INT_PLUS_MICRO;
> > 390 default:
> > 391 return -EINVAL;
> > 392 }
> > 393 }
> > 394
> >
> > ---
> > 0-DAY CI Kernel Test Service, Intel Corporation
> > https://lists.01.org/hyperkitty/list/[email protected]
> >
>
--
Thanks and Regards
Yours Truly,
Puranjay Mohan
On Tue, 27 Jul 2021 19:40:52 +0530
Puranjay Mohan <[email protected]> wrote:
> On Tue, Jul 27, 2021 at 7:16 PM Jonathan Cameron
> <[email protected]> wrote:
> >
> > On Tue, 27 Jul 2021 19:45:46 +0800
> > kernel test robot <[email protected]> wrote:
> >
> > > Hi Puranjay,
> > >
> > > I love your patch! Perhaps something to improve:
> > >
> > > [auto build test WARNING on iio/togreg]
> > > [also build test WARNING on linus/master v5.14-rc3 next-20210726]
> > > [If your patch is applied to the wrong git tree, kindly drop us a note.
> > > And when submitting patch, we suggest to use '--base' as documented in
> > > https://git-scm.com/docs/git-format-patch]
> > >
> > > url: https://github.com/0day-ci/linux/commits/Puranjay-Mohan/iio-accel-add-support-for-ADXL355/20210727-131822
> > > base: https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio.git togreg
> > > config: openrisc-randconfig-s031-20210727 (attached as .config)
> > > compiler: or1k-linux-gcc (GCC) 10.3.0
> > > reproduce:
> > > wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
> > > chmod +x ~/bin/make.cross
> > > # apt-get install sparse
> > > # sparse version: v0.6.3-341-g8af24329-dirty
> > > # https://github.com/0day-ci/linux/commit/a0ad8ce87d3d3357c64f98bec48b75d07b961da8
> > > git remote add linux-review https://github.com/0day-ci/linux
> > > git fetch --no-tags linux-review Puranjay-Mohan/iio-accel-add-support-for-ADXL355/20210727-131822
> > > git checkout a0ad8ce87d3d3357c64f98bec48b75d07b961da8
> > > # save the attached .config to linux build tree
> > > COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-10.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=openrisc
> > >
> > > If you fix the issue, kindly add following tag as appropriate
> > > Reported-by: kernel test robot <[email protected]>
> > >
> > >
> > > sparse warnings: (new ones prefixed by >>)
> > > >> drivers/iio/accel/adxl355_core.c:204:16: sparse: sparse: incorrect type in assignment (different base types) @@ expected restricted __be32 [usertype] regval @@ got int @@
> > > drivers/iio/accel/adxl355_core.c:204:16: sparse: expected restricted __be32 [usertype] regval
> > > drivers/iio/accel/adxl355_core.c:204:16: sparse: got int
> > > >> drivers/iio/accel/adxl355_core.c:341:29: sparse: sparse: incorrect type in assignment (different base types) @@ expected restricted __be16 [usertype] out @@ got int @@
> > > drivers/iio/accel/adxl355_core.c:341:29: sparse: expected restricted __be16 [usertype] out
> > > drivers/iio/accel/adxl355_core.c:341:29: sparse: got int
> > >
> > > vim +204 drivers/iio/accel/adxl355_core.c
> > >
> > > 195
> > > 196 static int adxl355_read_axis(struct adxl355_data *data, u8 addr)
> > > 197 {
> > > 198 __be32 regval;
> > > 199 int ret;
> > > 200
> > > 201 ret = regmap_bulk_read(data->regmap, addr, data->transf_buf, 3);
> > > 202 if (ret < 0)
> > > 203 return ret;
> > > > 204 regval = data->transf_buf[0] + (data->transf_buf[1] << 8)
> > > 205 + (data->transf_buf[2] << 16);
> >
> > Note that you can almost certainly use something like get_unaligned_be24(data->transf_buf)
> > here, though current code is some mixture of hand unwinding the endianness
> > and calling a standard function to do it.
>
> I feel doing it fully manually is fine as most other drivers are doing
> it that way. I have sent the next version which does this fully
> manually.
It's not a good idea to do it that way.
The intent of the get_unaligned_be24() and friends is to make the semantics
of what is going on clear and for those trying to review a lot of code that
is very useful. The new code is doing something entirely different to the
above... (where did >> 4 of the least significant byte come from?)
Agreed, there are still older drivers doing this by hand and work is ongoing
to convert them over to the standard functions.
Whilst we are here it would be good to do other instances such as use
get_unaligned_be16() for the temperature channel. In that case you'll
also give a small performance improvement on a typical big endian platform.
Jonathan
> Also, I ran it through sparse this time before sending it.
> >
> > > 206
> > > 207 return be32_to_cpu(regval) >> 8;
> > > 208 }
> > > 209
> > > 210 static int adxl355_find_match(const int (*freq_tbl)[2], const int n,
> > > 211 const int val, const int val2)
> > > 212 {
> > > 213 int i;
> > > 214
> > > 215 for (i = 0; i < n; i++) {
> > > 216 if (freq_tbl[i][0] == val && freq_tbl[i][1] == val2)
> > > 217 return i;
> > > 218 }
> > > 219
> > > 220 return -EINVAL;
> > > 221 }
> > > 222
> > > 223 static int adxl355_set_odr(struct adxl355_data *data,
> > > 224 enum adxl355_odr odr)
> > > 225 {
> > > 226 int ret = 0;
> > > 227
> > > 228 mutex_lock(&data->lock);
> > > 229
> > > 230 if (data->odr == odr)
> > > 231 goto out_unlock;
> > > 232
> > > 233 ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
> > > 234 if (ret < 0)
> > > 235 goto out_unlock;
> > > 236
> > > 237 ret = regmap_update_bits(data->regmap, ADXL355_FILTER,
> > > 238 ADXL355_FILTER_ODR_MSK,
> > > 239 FIELD_PREP(ADXL355_FILTER_ODR_MSK, odr));
> > > 240 if (ret < 0)
> > > 241 goto out_unlock;
> > > 242
> > > 243 data->odr = odr;
> > > 244 adxl355_fill_3db_frequency_table(data);
> > > 245
> > > 246 out_unlock:
> > > 247 ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
> > > 248 mutex_unlock(&data->lock);
> > > 249 return ret;
> > > 250 }
> > > 251
> > > 252 static int adxl355_set_hpf_3db(struct adxl355_data *data,
> > > 253 enum adxl355_hpf_3db hpf)
> > > 254 {
> > > 255 int ret = 0;
> > > 256
> > > 257 mutex_lock(&data->lock);
> > > 258
> > > 259 if (data->hpf_3db == hpf)
> > > 260 goto out_unlock;
> > > 261
> > > 262 ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
> > > 263 if (ret < 0)
> > > 264 goto out_unlock;
> > > 265
> > > 266 ret = regmap_update_bits(data->regmap, ADXL355_FILTER,
> > > 267 ADXL355_FILTER_HPF_MSK,
> > > 268 FIELD_PREP(ADXL355_FILTER_HPF_MSK, hpf));
> > > 269 if (!ret)
> > > 270 data->hpf_3db = hpf;
> > > 271
> > > 272 out_unlock:
> > > 273 ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
> > > 274 mutex_unlock(&data->lock);
> > > 275 return ret;
> > > 276 }
> > > 277
> > > 278 static int adxl355_set_calibbias(struct adxl355_data *data,
> > > 279 int channel2, int calibbias)
> > > 280 {
> > > 281 int ret = 0;
> > > 282
> > > 283 data->transf_buf[0] = (calibbias >> 8) & 0xFF;
> > > 284 data->transf_buf[1] = calibbias & 0xFF;
> > > 285 data->transf_buf[2] = 0;
> > > 286
> > > 287 mutex_lock(&data->lock);
> > > 288
> > > 289 ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
> > > 290 if (ret < 0)
> > > 291 goto out_unlock;
> > > 292
> > > 293 switch (channel2) {
> > > 294 case IIO_MOD_X:
> > > 295 ret = regmap_bulk_write(data->regmap, ADXL355_OFFSET_X_H,
> > > 296 data->transf_buf, 2);
> > > 297 if (ret < 0)
> > > 298 goto out_unlock;
> > > 299 data->x_calibbias = calibbias;
> > > 300 break;
> > > 301 case IIO_MOD_Y:
> > > 302 ret = regmap_bulk_write(data->regmap, ADXL355_OFFSET_Y_H,
> > > 303 data->transf_buf, 2);
> > > 304 if (ret < 0)
> > > 305 goto out_unlock;
> > > 306 data->y_calibbias = calibbias;
> > > 307 break;
> > > 308 case IIO_MOD_Z:
> > > 309 ret = regmap_bulk_write(data->regmap, ADXL355_OFFSET_Z_H,
> > > 310 data->transf_buf, 2);
> > > 311 if (ret < 0)
> > > 312 goto out_unlock;
> > > 313 data->z_calibbias = calibbias;
> > > 314 break;
> > > 315 default:
> > > 316 ret = -EINVAL;
> > > 317 break;
> > > 318 }
> > > 319
> > > 320 out_unlock:
> > > 321 ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
> > > 322 mutex_unlock(&data->lock);
> > > 323 return ret;
> > > 324 }
> > > 325
> > > 326 static int adxl355_read_raw(struct iio_dev *indio_dev,
> > > 327 struct iio_chan_spec const *chan,
> > > 328 int *val, int *val2, long mask)
> > > 329 {
> > > 330 struct adxl355_data *data = iio_priv(indio_dev);
> > > 331 int ret;
> > > 332 __be16 out;
> > > 333
> > > 334 switch (mask) {
> > > 335 case IIO_CHAN_INFO_RAW:
> > > 336 switch (chan->type) {
> > > 337 case IIO_TEMP:
> > > 338 ret = adxl355_get_temp_data(data, chan->address);
> > > 339 if (ret < 0)
> > > 340 return ret;
> > > > 341 out = (data->transf_buf[1] << 8) + data->transf_buf[0];
> > > 342 *val = be16_to_cpu(out);
> > > 343
> > > 344 return IIO_VAL_INT;
> > > 345 case IIO_ACCEL:
> > > 346 ret = adxl355_read_axis(data, chan->address);
> > > 347 if (ret < 0)
> > > 348 return ret;
> > > 349 *val = sign_extend32(ret >> (chan->scan_type.shift),
> > > 350 chan->scan_type.realbits - 1);
> > > 351 return IIO_VAL_INT;
> > > 352 default:
> > > 353 return -EINVAL;
> > > 354 }
> > > 355
> > > 356 case IIO_CHAN_INFO_SCALE:
> > > 357 switch (chan->type) {
> > > 358 case IIO_TEMP:
> > > 359 *val = TEMP_SCALE_VAL;
> > > 360 *val2 = TEMP_SCALE_VAL2;
> > > 361 return IIO_VAL_INT_PLUS_MICRO;
> > > 362 case IIO_ACCEL:
> > > 363 *val = 0;
> > > 364 *val2 = ADXL355_NSCALE;
> > > 365 return IIO_VAL_INT_PLUS_NANO;
> > > 366 default:
> > > 367 return -EINVAL;
> > > 368 }
> > > 369 case IIO_CHAN_INFO_OFFSET:
> > > 370 *val = TEMP_OFFSET_VAL;
> > > 371 *val2 = TEMP_OFFSET_VAL2;
> > > 372 return IIO_VAL_INT_PLUS_MICRO;
> > > 373 case IIO_CHAN_INFO_CALIBBIAS:
> > > 374 if (chan->channel2 == IIO_MOD_X)
> > > 375 *val = data->x_calibbias;
> > > 376 else if (chan->channel2 == IIO_MOD_Y)
> > > 377 *val = data->y_calibbias;
> > > 378 else
> > > 379 *val = data->z_calibbias;
> > > 380 *val = sign_extend32(*val, 15);
> > > 381 return IIO_VAL_INT;
> > > 382 case IIO_CHAN_INFO_SAMP_FREQ:
> > > 383 *val = adxl355_odr_table[data->odr][0];
> > > 384 *val2 = adxl355_odr_table[data->odr][1];
> > > 385 return IIO_VAL_INT_PLUS_MICRO;
> > > 386 case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
> > > 387 *val = data->adxl355_hpf_3db_table[data->hpf_3db][0];
> > > 388 *val2 = data->adxl355_hpf_3db_table[data->hpf_3db][1];
> > > 389 return IIO_VAL_INT_PLUS_MICRO;
> > > 390 default:
> > > 391 return -EINVAL;
> > > 392 }
> > > 393 }
> > > 394
> > >
> > > ---
> > > 0-DAY CI Kernel Test Service, Intel Corporation
> > > https://lists.01.org/hyperkitty/list/[email protected]
> > >
> >
>
>