Let's use the GIC_SPI macro instead of a plain 0 here to match other
uses of the primary interrupt controller on sc7280.
Suggested-by: Matthias Kaehlcke <[email protected]>
Cc: Alex Elder <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index f70ab3c5d08b..569802536321 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -598,8 +598,8 @@ ipa: ipa@1e40000 {
"ipa-shared",
"gsi";
- interrupts-extended = <&intc 0 654 IRQ_TYPE_EDGE_RISING>,
- <&intc 0 432 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts-extended = <&intc GIC_SPI 654 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH>,
<&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
<&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "ipa",
base-commit: 97ec669dfcfa22f8a595356ceb6ce46e7b4a82e9
--
https://chromeos.dev
On 8/11/21 1:19 PM, Stephen Boyd wrote:
> Let's use the GIC_SPI macro instead of a plain 0 here to match other
> uses of the primary interrupt controller on sc7280.
>
> Suggested-by: Matthias Kaehlcke <[email protected]>
> Cc: Alex Elder <[email protected]>
> Signed-off-by: Stephen Boyd <[email protected]>
Looks good, thanks. It's done that way for IPA on other
platforms too, or at least that's the intention...
Reviewed-by: Alex Elder <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index f70ab3c5d08b..569802536321 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -598,8 +598,8 @@ ipa: ipa@1e40000 {
> "ipa-shared",
> "gsi";
>
> - interrupts-extended = <&intc 0 654 IRQ_TYPE_EDGE_RISING>,
> - <&intc 0 432 IRQ_TYPE_LEVEL_HIGH>,
> + interrupts-extended = <&intc GIC_SPI 654 IRQ_TYPE_EDGE_RISING>,
> + <&intc GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH>,
> <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
> <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>;
> interrupt-names = "ipa",
>
> base-commit: 97ec669dfcfa22f8a595356ceb6ce46e7b4a82e9
>