2021-08-05 13:19:37

by Xin Ji

[permalink] [raw]
Subject: [PATCH v11 0/4] Add MIPI rx DPI support

Hi all, this patch series implement MIPI rx DPI feature. Please help to review.

This is the v11 version, rebase all patches on the latest code.
Any mistakes, please let me know, I'll fix it in the next series.

Change history:
v11: Fix Rob Herring comment
- Move swing register description in property.
- Remove additional property.

v10: Fix Rob Herring and Laurent Pinchart comments
- Add more description about lane swing configuration in commit
message.

v9: Fix Neil Amstrong comment
- use macro define 'V4L2_FWNODE_BUS_TYPE_PARALLEL' instead of fixing
value.

v8: Fix Laurent Pinchart comment
- Expand the commit message.

v7:
- Rebase DT on the latest branch 'drm-misc-next'.
- Remove HDCP patch.

v6: Fix kernel robot compile warning

v5: Fix Rob Herring, Hsin-Yi, Robert Foss comments
- Rebase code on the branch 'drm-misc-next', refer video-interfaces.yaml
- Seprate HDCP function to a new patch
- Fix driver not correctly get 'bus-type' 'data-lanes'
- Add audio HDMI codec function support

v4: Fix Rob Herring comment
- Rebase code on the branch 'drm-misc-next'
- Change 'analogix,hdcp-support' type to boolean

v3: Fix Rob Herring, Dan Carpenter, Nicolas comment
- Split the patch, fix not correct return data
- Fix several coding format
- Split DP tx swing register setting to two property
- Add HDCP support vender flag
- remove 'analogix,swing-setting' and 'analogix,mipi-dpi-in' property

v2: Fix Rob Herring comment
- Fix yamllint warnings/errors in analogix,anx7625.yaml
- Fix kernel robot compile warning

v1: initial MIPI rx DPI feature support

Xin Ji (4):
dt-bindings:drm/bridge:anx7625:add vendor define
drm/bridge: anx7625: fix not correct return value
drm/bridge: anx7625: add MIPI DPI input feature
drm/bridge: anx7625: add HDMI audio function

.../display/bridge/analogix,anx7625.yaml | 65 ++-
drivers/gpu/drm/bridge/analogix/anx7625.c | 458 ++++++++++++++++--
drivers/gpu/drm/bridge/analogix/anx7625.h | 23 +-
3 files changed, 491 insertions(+), 55 deletions(-)

--
2.25.1


2021-08-05 16:44:26

by Xin Ji

[permalink] [raw]
Subject: [PATCH v11 1/4] dt-bindings:drm/bridge:anx7625:add vendor define

Add 'bus-type' and 'data-lanes' define for port0. Add DP tx lane0,
lane1 swing register setting array, and audio enable flag.

The device which cannot pass DP tx PHY CTS caused by long PCB trace or
embedded MUX, adjusting ANX7625 PHY parameters can pass the CTS test. The
adjusting type include Pre-emphasis, Vp-p, Rterm(Resistor Termination)
and Rsel(Driven Strength). Each lane has maximum 20 registers for
these settings.

Signed-off-by: Xin Ji <[email protected]>
---
.../display/bridge/analogix,anx7625.yaml | 65 ++++++++++++++++++-
1 file changed, 63 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
index ab48ab2f4240..1d3e88daca04 100644
--- a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
@@ -43,14 +43,70 @@ properties:
vdd33-supply:
description: Regulator that provides the supply 3.3V power.

+ analogix,lane0-swing:
+ $ref: /schemas/types.yaml#/definitions/uint8-array
+ minItems: 1
+ maxItems: 20
+ description:
+ an array of swing register setting for DP tx lane0 PHY.
+ Registers 0~9 are Swing0_Pre0, Swing1_Pre0, Swing2_Pre0,
+ Swing3_Pre0, Swing0_Pre1, Swing1_Pre1, Swing2_Pre1, Swing0_Pre2,
+ Swing1_Pre2, Swing0_Pre3, they are for [Boost control] and
+ [Swing control] setting.
+ Registers 0~9, bit 3:0 is [Boost control], these bits control
+ post cursor manual, increase the [Boost control] to increase
+ Pre-emphasis value.
+ Registers 0~9, bit 6:4 is [Swing control], these bits control
+ swing manual, increase [Swing control] setting to add Vp-p value
+ for each Swing, Pre.
+ Registers 10~19 are Swing0_Pre0, Swing1_Pre0, Swing2_Pre0,
+ Swing3_Pre0, Swing0_Pre1, Swing1_Pre1, Swing2_Pre1, Swing0_Pre2,
+ Swing1_Pre2, Swing0_Pre3, they are for [R select control] and
+ [R Termination control] setting.
+ Registers 10~19, bit 4:0 is [R select control], these bits are
+ compensation manual, increase it can enhance IO driven strength
+ and Vp-p.
+ Registers 10~19, bit 5:6 is [R termination control], these bits
+ adjust 50ohm impedance of DP tx termination. 00:55 ohm,
+ 01:50 ohm(default), 10:45 ohm, 11:40 ohm.
+
+ analogix,lane1-swing:
+ $ref: /schemas/types.yaml#/definitions/uint8-array
+ minItems: 1
+ maxItems: 20
+ description:
+ an array of swing register setting for DP tx lane1 PHY.
+ DP TX lane1 swing register setting same with lane0
+ swing, please refer lane0-swing property description.
+
+ analogix,audio-enable:
+ type: boolean
+ description: let the driver enable audio HDMI codec function or not.
+
ports:
$ref: /schemas/graph.yaml#/properties/ports

properties:
port@0:
- $ref: /schemas/graph.yaml#/properties/port
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ unevaluatedProperties: false
description:
- Video port for MIPI DSI input.
+ MIPI DSI/DPI input.
+
+ properties:
+ endpoint:
+ $ref: /schemas/media/video-interfaces.yaml#
+ type: object
+ additionalProperties: false
+
+ properties:
+ remote-endpoint: true
+
+ bus-type:
+ enum: [1, 5]
+ default: 1
+
+ data-lanes: true

port@1:
$ref: /schemas/graph.yaml#/properties/port
@@ -87,6 +143,9 @@ examples:
vdd10-supply = <&pp1000_mipibrdg>;
vdd18-supply = <&pp1800_mipibrdg>;
vdd33-supply = <&pp3300_mipibrdg>;
+ analogix,audio-enable;
+ analogix,lane0-swing = /bits/ 8 <0x14 0x54 0x64 0x74>;
+ analogix,lane1-swing = /bits/ 8 <0x14 0x54 0x64 0x74>;

ports {
#address-cells = <1>;
@@ -96,6 +155,8 @@ examples:
reg = <0>;
anx7625_in: endpoint {
remote-endpoint = <&mipi_dsi>;
+ bus-type = <5>;
+ data-lanes = <0 1 2 3>;
};
};

--
2.25.1

2021-10-18 03:49:24

by Xin Ji

[permalink] [raw]
Subject: [PATCH v11 0/4] Add MIPI rx DPI support

Hi all, this patch series implement MIPI rx DPI feature. Please help to review.

This is the v11 version, rebase all patches on the latest code.
Any mistakes, please let me know, I'll fix it in the next series.

Change history:
v11: Fix Rob Herring comment
- Move swing register description in property.
- Remove additional property.

v10: Fix Rob Herring and Laurent Pinchart comments
- Add more description about lane swing configuration in commit
message.

v9: Fix Neil Amstrong comment
- use macro define 'V4L2_FWNODE_BUS_TYPE_PARALLEL' instead of fixing
value.

v8: Fix Laurent Pinchart comment
- Expand the commit message.

v7:
- Rebase DT on the latest branch 'drm-misc-next'.
- Remove HDCP patch.

v6: Fix kernel robot compile warning

v5: Fix Rob Herring, Hsin-Yi, Robert Foss comments
- Rebase code on the branch 'drm-misc-next', refer video-interfaces.yaml
- Seprate HDCP function to a new patch
- Fix driver not correctly get 'bus-type' 'data-lanes'
- Add audio HDMI codec function support

v4: Fix Rob Herring comment
- Rebase code on the branch 'drm-misc-next'
- Change 'analogix,hdcp-support' type to boolean

v3: Fix Rob Herring, Dan Carpenter, Nicolas comment
- Split the patch, fix not correct return data
- Fix several coding format
- Split DP tx swing register setting to two property
- Add HDCP support vender flag
- remove 'analogix,swing-setting' and 'analogix,mipi-dpi-in' property

v2: Fix Rob Herring comment
- Fix yamllint warnings/errors in analogix,anx7625.yaml
- Fix kernel robot compile warning

v1: initial MIPI rx DPI feature support

Xin Ji (4):
dt-bindings:drm/bridge:anx7625:add vendor define
drm/bridge: anx7625: fix not correct return value
drm/bridge: anx7625: add MIPI DPI input feature
drm/bridge: anx7625: add HDMI audio function

.../display/bridge/analogix,anx7625.yaml | 65 ++-
drivers/gpu/drm/bridge/analogix/anx7625.c | 458 ++++++++++++++++--
drivers/gpu/drm/bridge/analogix/anx7625.h | 23 +-
3 files changed, 491 insertions(+), 55 deletions(-)

--
2.25.1

2021-10-18 03:50:29

by Xin Ji

[permalink] [raw]
Subject: [PATCH v11 1/4] dt-bindings:drm/bridge:anx7625:add vendor define

Add 'bus-type' and 'data-lanes' define for port0. Add DP tx lane0,
lane1 swing register setting array, and audio enable flag.

The device which cannot pass DP tx PHY CTS caused by long PCB trace or
embedded MUX, adjusting ANX7625 PHY parameters can pass the CTS test. The
adjusting type include Pre-emphasis, Vp-p, Rterm(Resistor Termination)
and Rsel(Driven Strength). Each lane has maximum 20 registers for
these settings.

Signed-off-by: Xin Ji <[email protected]>
---
.../display/bridge/analogix,anx7625.yaml | 65 ++++++++++++++++++-
1 file changed, 63 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
index ab48ab2f4240..1d3e88daca04 100644
--- a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
@@ -43,14 +43,70 @@ properties:
vdd33-supply:
description: Regulator that provides the supply 3.3V power.

+ analogix,lane0-swing:
+ $ref: /schemas/types.yaml#/definitions/uint8-array
+ minItems: 1
+ maxItems: 20
+ description:
+ an array of swing register setting for DP tx lane0 PHY.
+ Registers 0~9 are Swing0_Pre0, Swing1_Pre0, Swing2_Pre0,
+ Swing3_Pre0, Swing0_Pre1, Swing1_Pre1, Swing2_Pre1, Swing0_Pre2,
+ Swing1_Pre2, Swing0_Pre3, they are for [Boost control] and
+ [Swing control] setting.
+ Registers 0~9, bit 3:0 is [Boost control], these bits control
+ post cursor manual, increase the [Boost control] to increase
+ Pre-emphasis value.
+ Registers 0~9, bit 6:4 is [Swing control], these bits control
+ swing manual, increase [Swing control] setting to add Vp-p value
+ for each Swing, Pre.
+ Registers 10~19 are Swing0_Pre0, Swing1_Pre0, Swing2_Pre0,
+ Swing3_Pre0, Swing0_Pre1, Swing1_Pre1, Swing2_Pre1, Swing0_Pre2,
+ Swing1_Pre2, Swing0_Pre3, they are for [R select control] and
+ [R Termination control] setting.
+ Registers 10~19, bit 4:0 is [R select control], these bits are
+ compensation manual, increase it can enhance IO driven strength
+ and Vp-p.
+ Registers 10~19, bit 5:6 is [R termination control], these bits
+ adjust 50ohm impedance of DP tx termination. 00:55 ohm,
+ 01:50 ohm(default), 10:45 ohm, 11:40 ohm.
+
+ analogix,lane1-swing:
+ $ref: /schemas/types.yaml#/definitions/uint8-array
+ minItems: 1
+ maxItems: 20
+ description:
+ an array of swing register setting for DP tx lane1 PHY.
+ DP TX lane1 swing register setting same with lane0
+ swing, please refer lane0-swing property description.
+
+ analogix,audio-enable:
+ type: boolean
+ description: let the driver enable audio HDMI codec function or not.
+
ports:
$ref: /schemas/graph.yaml#/properties/ports

properties:
port@0:
- $ref: /schemas/graph.yaml#/properties/port
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ unevaluatedProperties: false
description:
- Video port for MIPI DSI input.
+ MIPI DSI/DPI input.
+
+ properties:
+ endpoint:
+ $ref: /schemas/media/video-interfaces.yaml#
+ type: object
+ additionalProperties: false
+
+ properties:
+ remote-endpoint: true
+
+ bus-type:
+ enum: [1, 5]
+ default: 1
+
+ data-lanes: true

port@1:
$ref: /schemas/graph.yaml#/properties/port
@@ -87,6 +143,9 @@ examples:
vdd10-supply = <&pp1000_mipibrdg>;
vdd18-supply = <&pp1800_mipibrdg>;
vdd33-supply = <&pp3300_mipibrdg>;
+ analogix,audio-enable;
+ analogix,lane0-swing = /bits/ 8 <0x14 0x54 0x64 0x74>;
+ analogix,lane1-swing = /bits/ 8 <0x14 0x54 0x64 0x74>;

ports {
#address-cells = <1>;
@@ -96,6 +155,8 @@ examples:
reg = <0>;
anx7625_in: endpoint {
remote-endpoint = <&mipi_dsi>;
+ bus-type = <5>;
+ data-lanes = <0 1 2 3>;
};
};

--
2.25.1

2021-10-27 12:45:37

by Rob Herring (Arm)

[permalink] [raw]
Subject: Re: [PATCH v11 1/4] dt-bindings:drm/bridge:anx7625:add vendor define

On Mon, 18 Oct 2021 11:03:23 +0800, Xin Ji wrote:
> Add 'bus-type' and 'data-lanes' define for port0. Add DP tx lane0,
> lane1 swing register setting array, and audio enable flag.
>
> The device which cannot pass DP tx PHY CTS caused by long PCB trace or
> embedded MUX, adjusting ANX7625 PHY parameters can pass the CTS test. The
> adjusting type include Pre-emphasis, Vp-p, Rterm(Resistor Termination)
> and Rsel(Driven Strength). Each lane has maximum 20 registers for
> these settings.
>
> Signed-off-by: Xin Ji <[email protected]>
> ---
> .../display/bridge/analogix,anx7625.yaml | 65 ++++++++++++++++++-
> 1 file changed, 63 insertions(+), 2 deletions(-)
>

Reviewed-by: Rob Herring <[email protected]>