2021-11-15 09:04:44

by Alexander Antonov

[permalink] [raw]
Subject: [RESEND PATCH v2 0/3] Several fixes for event constraints on SKX and SNR platforms

From: Alexander Antonov <[email protected]>

Changes in this revision are:
v1 -> v2:
- Addressed comment from Peter Zijlstra:
- Fix coding style issue in skx_cha_hw_config()

This series contains the following fixes:
- Fix filter_tid mask for CHA events on Skylake Server
- Fix IIO event constraints for Skylake Server
- Fix IIO event constraints for Snowridge

Alexander Antonov (3):
Fix filter_tid mask for CHA events on Skylake Server
Fix IIO event constraints for Skylake Server
Fix IIO event constraints for Snowridge

arch/x86/events/intel/uncore_snbep.c | 12 ++++++++++++
1 file changed, 12 insertions(+)


base-commit: 8ab774587903771821b59471cc723bba6d893942
--
2.21.3



2021-11-15 09:04:47

by Alexander Antonov

[permalink] [raw]
Subject: [RESEND PATCH v2 3/3] Fix IIO event constraints for Snowridge

From: Alexander Antonov <[email protected]>

According to the latest uncore document, DATA_REQ_OF_CPU (0x83),
DATA_REQ_BY_CPU (0xc0) and COMP_BUF_OCCUPANCY (0xd5) events have
constraints. Add uncore IIO constraints for Snowridge.

Fixes: 210cc5f9db7a ("perf/x86/intel/uncore: Add uncore support for Snow Ridge server")
Reviewed-by: Kan Liang <[email protected]>
Signed-off-by: Alexander Antonov <[email protected]>
---
arch/x86/events/intel/uncore_snbep.c | 8 ++++++++
1 file changed, 8 insertions(+)

diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
index 9aba4ef77b13..3660f698fb2a 100644
--- a/arch/x86/events/intel/uncore_snbep.c
+++ b/arch/x86/events/intel/uncore_snbep.c
@@ -4529,6 +4529,13 @@ static void snr_iio_cleanup_mapping(struct intel_uncore_type *type)
pmu_iio_cleanup_mapping(type, &snr_iio_mapping_group);
}

+static struct event_constraint snr_uncore_iio_constraints[] = {
+ UNCORE_EVENT_CONSTRAINT(0x83, 0x3),
+ UNCORE_EVENT_CONSTRAINT(0xc0, 0xc),
+ UNCORE_EVENT_CONSTRAINT(0xd5, 0xc),
+ EVENT_CONSTRAINT_END
+};
+
static struct intel_uncore_type snr_uncore_iio = {
.name = "iio",
.num_counters = 4,
@@ -4540,6 +4547,7 @@ static struct intel_uncore_type snr_uncore_iio = {
.event_mask_ext = SNR_IIO_PMON_RAW_EVENT_MASK_EXT,
.box_ctl = SNR_IIO_MSR_PMON_BOX_CTL,
.msr_offset = SNR_IIO_MSR_OFFSET,
+ .constraints = snr_uncore_iio_constraints,
.ops = &ivbep_uncore_msr_ops,
.format_group = &snr_uncore_iio_format_group,
.attr_update = snr_iio_attr_update,
--
2.21.3


Subject: [tip: perf/urgent] perf/x86/intel/uncore: Fix IIO event constraints for Snowridge

The following commit has been merged into the perf/urgent branch of tip:

Commit-ID: bdc0feee05174418dec1fa68de2af19e1750b99f
Gitweb: https://git.kernel.org/tip/bdc0feee05174418dec1fa68de2af19e1750b99f
Author: Alexander Antonov <[email protected]>
AuthorDate: Mon, 15 Nov 2021 12:03:34 +03:00
Committer: Peter Zijlstra <[email protected]>
CommitterDate: Wed, 17 Nov 2021 14:48:43 +01:00

perf/x86/intel/uncore: Fix IIO event constraints for Snowridge

According to the latest uncore document, DATA_REQ_OF_CPU (0x83),
DATA_REQ_BY_CPU (0xc0) and COMP_BUF_OCCUPANCY (0xd5) events have
constraints. Add uncore IIO constraints for Snowridge.

Fixes: 210cc5f9db7a ("perf/x86/intel/uncore: Add uncore support for Snow Ridge server")
Signed-off-by: Alexander Antonov <[email protected]>
Signed-off-by: Peter Zijlstra (Intel) <[email protected]>
Reviewed-by: Kan Liang <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
---
arch/x86/events/intel/uncore_snbep.c | 8 ++++++++
1 file changed, 8 insertions(+)

diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
index 9aba4ef..3660f69 100644
--- a/arch/x86/events/intel/uncore_snbep.c
+++ b/arch/x86/events/intel/uncore_snbep.c
@@ -4529,6 +4529,13 @@ static void snr_iio_cleanup_mapping(struct intel_uncore_type *type)
pmu_iio_cleanup_mapping(type, &snr_iio_mapping_group);
}

+static struct event_constraint snr_uncore_iio_constraints[] = {
+ UNCORE_EVENT_CONSTRAINT(0x83, 0x3),
+ UNCORE_EVENT_CONSTRAINT(0xc0, 0xc),
+ UNCORE_EVENT_CONSTRAINT(0xd5, 0xc),
+ EVENT_CONSTRAINT_END
+};
+
static struct intel_uncore_type snr_uncore_iio = {
.name = "iio",
.num_counters = 4,
@@ -4540,6 +4547,7 @@ static struct intel_uncore_type snr_uncore_iio = {
.event_mask_ext = SNR_IIO_PMON_RAW_EVENT_MASK_EXT,
.box_ctl = SNR_IIO_MSR_PMON_BOX_CTL,
.msr_offset = SNR_IIO_MSR_OFFSET,
+ .constraints = snr_uncore_iio_constraints,
.ops = &ivbep_uncore_msr_ops,
.format_group = &snr_uncore_iio_format_group,
.attr_update = snr_iio_attr_update,