Changes since v1:
-----------------
- v1 can be seen here: https://lore.kernel.org/linux-arm-msm/[email protected]/
- Fixed the IOMMU sid value, to ensure that no ADMA error is observed
when the microSD card is detected on the board.
This patchset enables the microSD card support for SA8155p-ADP board
via the SDHC2 controller found on the SoC.
Cc: Bjorn Andersson <[email protected]>
Cc: Rob Herring <[email protected]>
Bhupesh Sharma (2):
arm64: dts: qcom: sm8150: Add support for SDC2
arm64: dts: qcom: sa8155p-adp: Add support for uSD card
arch/arm64/boot/dts/qcom/sa8155p-adp.dts | 68 ++++++++++++++++++++++++
arch/arm64/boot/dts/qcom/sm8150.dtsi | 45 ++++++++++++++++
2 files changed, 113 insertions(+)
--
2.35.1
Add support for SDC2 which can be used to interface uSD card.
Cc: Bjorn Andersson <[email protected]>
Cc: Rob Herring <[email protected]>
Signed-off-by: Bhupesh Sharma <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 45 ++++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 15f3bf2e7ea0..0fecebf0a473 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -3270,6 +3270,51 @@ usb_2_ssphy: phy@88eb200 {
};
};
+ sdhc_2: sdhci@8804000 {
+ compatible = "qcom,sm8150-sdhci", "qcom,sdhci-msm-v5";
+ reg = <0 0x08804000 0 0x1000>;
+
+ interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "hc_irq", "pwr_irq";
+
+ clocks = <&gcc GCC_SDCC2_AHB_CLK>,
+ <&gcc GCC_SDCC2_APPS_CLK>,
+ <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "iface", "core", "xo";
+ iommus = <&apps_smmu 0x6a0 0x0>;
+ qcom,dll-config = <0x0007642c>;
+ qcom,ddr-config = <0x80040868>;
+ power-domains = <&rpmhpd 0>;
+ operating-points-v2 = <&sdhc2_opp_table>;
+
+ status = "disabled";
+
+ sdhc2_opp_table: sdhc2-opp-table {
+ compatible = "operating-points-v2";
+
+ opp-19200000 {
+ opp-hz = /bits/ 64 <19200000>;
+ required-opps = <&rpmhpd_opp_min_svs>;
+ };
+
+ opp-50000000 {
+ opp-hz = /bits/ 64 <50000000>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ };
+
+ opp-100000000 {
+ opp-hz = /bits/ 64 <100000000>;
+ required-opps = <&rpmhpd_opp_svs>;
+ };
+
+ opp-202000000 {
+ opp-hz = /bits/ 64 <202000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>;
+ };
+ };
+ };
+
dc_noc: interconnect@9160000 {
compatible = "qcom,sm8150-dc-noc";
reg = <0 0x09160000 0 0x3200>;
--
2.35.1
Add support for uSD card on SA8155p-ADP board using the SDHC2
interface.
Cc: Bjorn Andersson <[email protected]>
Cc: Rob Herring <[email protected]>
Signed-off-by: Bhupesh Sharma <[email protected]>
---
arch/arm64/boot/dts/qcom/sa8155p-adp.dts | 68 ++++++++++++++++++++++++
1 file changed, 68 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sa8155p-adp.dts b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts
index 8756c2b25c7e..b561a8139cb9 100644
--- a/arch/arm64/boot/dts/qcom/sa8155p-adp.dts
+++ b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts
@@ -317,6 +317,20 @@ &remoteproc_cdsp {
firmware-name = "qcom/sa8155p/cdsp.mdt";
};
+&sdhc_2 {
+ status = "okay";
+
+ cd-gpios = <&tlmm 4 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&sdc2_on>;
+ pinctrl-1 = <&sdc2_off>;
+ vqmmc-supply = <&vreg_l13c_2p96>; /* IO line power */
+ vmmc-supply = <&vreg_l17a_2p96>; /* Card power line */
+ bus-width = <4>;
+ no-sdio;
+ no-emmc;
+};
+
&uart2 {
status = "okay";
};
@@ -390,6 +404,60 @@ &usb_2_qmpphy {
&tlmm {
gpio-reserved-ranges = <0 4>;
+ sdc2_on: sdc2_on {
+ clk {
+ pins = "sdc2_clk";
+ bias-disable; /* No pull */
+ drive-strength = <16>; /* 16 MA */
+ };
+
+ cmd {
+ pins = "sdc2_cmd";
+ bias-pull-up; /* pull up */
+ drive-strength = <16>; /* 16 MA */
+ };
+
+ data {
+ pins = "sdc2_data";
+ bias-pull-up; /* pull up */
+ drive-strength = <16>; /* 16 MA */
+ };
+
+ sd-cd {
+ pins = "gpio96";
+ function = "gpio";
+ bias-pull-up; /* pull up */
+ drive-strength = <2>; /* 2 MA */
+ };
+ };
+
+ sdc2_off: sdc2_off {
+ clk {
+ pins = "sdc2_clk";
+ bias-disable; /* No pull */
+ drive-strength = <2>; /* 2 MA */
+ };
+
+ cmd {
+ pins = "sdc2_cmd";
+ bias-pull-up; /* pull up */
+ drive-strength = <2>; /* 2 MA */
+ };
+
+ data {
+ pins = "sdc2_data";
+ bias-pull-up; /* pull up */
+ drive-strength = <2>; /* 2 MA */
+ };
+
+ sd-cd {
+ pins = "gpio96";
+ function = "gpio";
+ bias-pull-up; /* pull up */
+ drive-strength = <2>; /* 2 MA */
+ };
+ };
+
usb2phy_ac_en1_default: usb2phy_ac_en1_default {
mux {
pins = "gpio113";
--
2.35.1
Hi Bjorn,
On Wed, 20 Apr 2022 at 08:26, Bjorn Andersson
<[email protected]> wrote:
>
> On Thu 14 Apr 16:31 CDT 2022, Bhupesh Sharma wrote:
>
> > Add support for SDC2 which can be used to interface uSD card.
> >
> > Cc: Bjorn Andersson <[email protected]>
> > Cc: Rob Herring <[email protected]>
> > Signed-off-by: Bhupesh Sharma <[email protected]>
>
> Thanks for the patch Bhupesh. I have already applied v1 though. Can you
> please double check linux-next to confirm that things are in order?
Sure, I will send a minor iommu sid related fix shortly as a separate
patch, which
is required to fix a ADMA error while using the microSD card on the ADP board
(after rebasing it to linux-next/master tip).
Regards,
Bhupesh
> > ---
> > arch/arm64/boot/dts/qcom/sm8150.dtsi | 45 ++++++++++++++++++++++++++++
> > 1 file changed, 45 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > index 15f3bf2e7ea0..0fecebf0a473 100644
> > --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > @@ -3270,6 +3270,51 @@ usb_2_ssphy: phy@88eb200 {
> > };
> > };
> >
> > + sdhc_2: sdhci@8804000 {
> > + compatible = "qcom,sm8150-sdhci", "qcom,sdhci-msm-v5";
> > + reg = <0 0x08804000 0 0x1000>;
> > +
> > + interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-names = "hc_irq", "pwr_irq";
> > +
> > + clocks = <&gcc GCC_SDCC2_AHB_CLK>,
> > + <&gcc GCC_SDCC2_APPS_CLK>,
> > + <&rpmhcc RPMH_CXO_CLK>;
> > + clock-names = "iface", "core", "xo";
> > + iommus = <&apps_smmu 0x6a0 0x0>;
> > + qcom,dll-config = <0x0007642c>;
> > + qcom,ddr-config = <0x80040868>;
> > + power-domains = <&rpmhpd 0>;
> > + operating-points-v2 = <&sdhc2_opp_table>;
> > +
> > + status = "disabled";
> > +
> > + sdhc2_opp_table: sdhc2-opp-table {
> > + compatible = "operating-points-v2";
> > +
> > + opp-19200000 {
> > + opp-hz = /bits/ 64 <19200000>;
> > + required-opps = <&rpmhpd_opp_min_svs>;
> > + };
> > +
> > + opp-50000000 {
> > + opp-hz = /bits/ 64 <50000000>;
> > + required-opps = <&rpmhpd_opp_low_svs>;
> > + };
> > +
> > + opp-100000000 {
> > + opp-hz = /bits/ 64 <100000000>;
> > + required-opps = <&rpmhpd_opp_svs>;
> > + };
> > +
> > + opp-202000000 {
> > + opp-hz = /bits/ 64 <202000000>;
> > + required-opps = <&rpmhpd_opp_svs_l1>;
> > + };
> > + };
> > + };
> > +
> > dc_noc: interconnect@9160000 {
> > compatible = "qcom,sm8150-dc-noc";
> > reg = <0 0x09160000 0 0x3200>;
> > --
> > 2.35.1
> >
On Thu 14 Apr 16:31 CDT 2022, Bhupesh Sharma wrote:
> Add support for SDC2 which can be used to interface uSD card.
>
> Cc: Bjorn Andersson <[email protected]>
> Cc: Rob Herring <[email protected]>
> Signed-off-by: Bhupesh Sharma <[email protected]>
Thanks for the patch Bhupesh. I have already applied v1 though. Can you
please double check linux-next to confirm that things are in order?
Thanks,
Bjorn
> ---
> arch/arm64/boot/dts/qcom/sm8150.dtsi | 45 ++++++++++++++++++++++++++++
> 1 file changed, 45 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index 15f3bf2e7ea0..0fecebf0a473 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -3270,6 +3270,51 @@ usb_2_ssphy: phy@88eb200 {
> };
> };
>
> + sdhc_2: sdhci@8804000 {
> + compatible = "qcom,sm8150-sdhci", "qcom,sdhci-msm-v5";
> + reg = <0 0x08804000 0 0x1000>;
> +
> + interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "hc_irq", "pwr_irq";
> +
> + clocks = <&gcc GCC_SDCC2_AHB_CLK>,
> + <&gcc GCC_SDCC2_APPS_CLK>,
> + <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "iface", "core", "xo";
> + iommus = <&apps_smmu 0x6a0 0x0>;
> + qcom,dll-config = <0x0007642c>;
> + qcom,ddr-config = <0x80040868>;
> + power-domains = <&rpmhpd 0>;
> + operating-points-v2 = <&sdhc2_opp_table>;
> +
> + status = "disabled";
> +
> + sdhc2_opp_table: sdhc2-opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-19200000 {
> + opp-hz = /bits/ 64 <19200000>;
> + required-opps = <&rpmhpd_opp_min_svs>;
> + };
> +
> + opp-50000000 {
> + opp-hz = /bits/ 64 <50000000>;
> + required-opps = <&rpmhpd_opp_low_svs>;
> + };
> +
> + opp-100000000 {
> + opp-hz = /bits/ 64 <100000000>;
> + required-opps = <&rpmhpd_opp_svs>;
> + };
> +
> + opp-202000000 {
> + opp-hz = /bits/ 64 <202000000>;
> + required-opps = <&rpmhpd_opp_svs_l1>;
> + };
> + };
> + };
> +
> dc_noc: interconnect@9160000 {
> compatible = "qcom,sm8150-dc-noc";
> reg = <0 0x09160000 0 0x3200>;
> --
> 2.35.1
>