2022-05-01 13:53:26

by Christian Marangi

[permalink] [raw]
Subject: [PATCH v2 3/3] clk: qcom: clk-krait: add apq/ipq8064 errata workaround

Add apq/ipq8064 errata workaround where the sec_src clock gating needs to
be disabled during switching. krait-cc compatible is not enough to
handle this and limit this workaround to apq/ipq8064. We check machine
compatible to handle this.

Signed-off-by: Ansuel Smith <[email protected]>
---
drivers/clk/qcom/clk-krait.c | 16 ++++++++++++++++
drivers/clk/qcom/clk-krait.h | 1 +
drivers/clk/qcom/krait-cc.c | 8 ++++++++
3 files changed, 25 insertions(+)

diff --git a/drivers/clk/qcom/clk-krait.c b/drivers/clk/qcom/clk-krait.c
index 90046428693c..45da736bd5f4 100644
--- a/drivers/clk/qcom/clk-krait.c
+++ b/drivers/clk/qcom/clk-krait.c
@@ -18,13 +18,23 @@
static DEFINE_SPINLOCK(krait_clock_reg_lock);

#define LPL_SHIFT 8
+#define SECCLKAGD BIT(4)
+
static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel)
{
unsigned long flags;
u32 regval;

spin_lock_irqsave(&krait_clock_reg_lock, flags);
+
regval = krait_get_l2_indirect_reg(mux->offset);
+
+ /* apq/ipq8064 Errata: disable sec_src clock gating during switch. */
+ if (mux->disable_sec_src_gating) {
+ regval |= SECCLKAGD;
+ krait_set_l2_indirect_reg(mux->offset, regval);
+ }
+
regval &= ~(mux->mask << mux->shift);
regval |= (sel & mux->mask) << mux->shift;
if (mux->lpl) {
@@ -33,6 +43,12 @@ static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel)
}
krait_set_l2_indirect_reg(mux->offset, regval);

+ /* apq/ipq8064 Errata: re-enabled sec_src clock gating. */
+ if (mux->disable_sec_src_gating) {
+ regval &= ~SECCLKAGD;
+ krait_set_l2_indirect_reg(mux->offset, regval);
+ }
+
/* Wait for switch to complete. */
mb();
udelay(1);
diff --git a/drivers/clk/qcom/clk-krait.h b/drivers/clk/qcom/clk-krait.h
index 9120bd2f5297..f930538c539e 100644
--- a/drivers/clk/qcom/clk-krait.h
+++ b/drivers/clk/qcom/clk-krait.h
@@ -15,6 +15,7 @@ struct krait_mux_clk {
u8 safe_sel;
u8 old_index;
bool reparent;
+ bool disable_sec_src_gating;

struct clk_hw hw;
struct notifier_block clk_nb;
diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c
index 4d4b657d33c3..cfd961d5cc45 100644
--- a/drivers/clk/qcom/krait-cc.c
+++ b/drivers/clk/qcom/krait-cc.c
@@ -139,6 +139,14 @@ krait_add_sec_mux(struct device *dev, int id, const char *s,
mux->hw.init = &init;
mux->safe_sel = 0;

+ /* Checking for qcom,krait-cc-v1 or qcom,krait-cc-v2 is not
+ * enough to limit this to apq/ipq8064. Directly check machine
+ * compatible to correctly handle this errata.
+ */
+ if (of_machine_is_compatible("qcom,ipq8064") ||
+ of_machine_is_compatible("qcom,apq8064"))
+ mux->disable_sec_src_gating = true;
+
init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s);
if (!init.name)
return -ENOMEM;
--
2.34.1


2022-05-02 23:24:53

by Dmitry Baryshkov

[permalink] [raw]
Subject: Re: [PATCH v2 3/3] clk: qcom: clk-krait: add apq/ipq8064 errata workaround

On Sat, 30 Apr 2022 at 15:53, Ansuel Smith <[email protected]> wrote:
>
> Add apq/ipq8064 errata workaround where the sec_src clock gating needs to
> be disabled during switching. krait-cc compatible is not enough to
> handle this and limit this workaround to apq/ipq8064. We check machine
> compatible to handle this.
>
> Signed-off-by: Ansuel Smith <[email protected]>

Reviewed-by: Dmitry Baryshkov <[email protected]>

> ---
> drivers/clk/qcom/clk-krait.c | 16 ++++++++++++++++
> drivers/clk/qcom/clk-krait.h | 1 +
> drivers/clk/qcom/krait-cc.c | 8 ++++++++
> 3 files changed, 25 insertions(+)
>
> diff --git a/drivers/clk/qcom/clk-krait.c b/drivers/clk/qcom/clk-krait.c
> index 90046428693c..45da736bd5f4 100644
> --- a/drivers/clk/qcom/clk-krait.c
> +++ b/drivers/clk/qcom/clk-krait.c
> @@ -18,13 +18,23 @@
> static DEFINE_SPINLOCK(krait_clock_reg_lock);
>
> #define LPL_SHIFT 8
> +#define SECCLKAGD BIT(4)
> +
> static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel)
> {
> unsigned long flags;
> u32 regval;
>
> spin_lock_irqsave(&krait_clock_reg_lock, flags);
> +
> regval = krait_get_l2_indirect_reg(mux->offset);
> +
> + /* apq/ipq8064 Errata: disable sec_src clock gating during switch. */
> + if (mux->disable_sec_src_gating) {
> + regval |= SECCLKAGD;
> + krait_set_l2_indirect_reg(mux->offset, regval);
> + }
> +
> regval &= ~(mux->mask << mux->shift);
> regval |= (sel & mux->mask) << mux->shift;
> if (mux->lpl) {
> @@ -33,6 +43,12 @@ static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel)
> }
> krait_set_l2_indirect_reg(mux->offset, regval);
>
> + /* apq/ipq8064 Errata: re-enabled sec_src clock gating. */
> + if (mux->disable_sec_src_gating) {
> + regval &= ~SECCLKAGD;
> + krait_set_l2_indirect_reg(mux->offset, regval);
> + }
> +
> /* Wait for switch to complete. */
> mb();
> udelay(1);
> diff --git a/drivers/clk/qcom/clk-krait.h b/drivers/clk/qcom/clk-krait.h
> index 9120bd2f5297..f930538c539e 100644
> --- a/drivers/clk/qcom/clk-krait.h
> +++ b/drivers/clk/qcom/clk-krait.h
> @@ -15,6 +15,7 @@ struct krait_mux_clk {
> u8 safe_sel;
> u8 old_index;
> bool reparent;
> + bool disable_sec_src_gating;
>
> struct clk_hw hw;
> struct notifier_block clk_nb;
> diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c
> index 4d4b657d33c3..cfd961d5cc45 100644
> --- a/drivers/clk/qcom/krait-cc.c
> +++ b/drivers/clk/qcom/krait-cc.c
> @@ -139,6 +139,14 @@ krait_add_sec_mux(struct device *dev, int id, const char *s,
> mux->hw.init = &init;
> mux->safe_sel = 0;
>
> + /* Checking for qcom,krait-cc-v1 or qcom,krait-cc-v2 is not
> + * enough to limit this to apq/ipq8064. Directly check machine
> + * compatible to correctly handle this errata.
> + */
> + if (of_machine_is_compatible("qcom,ipq8064") ||
> + of_machine_is_compatible("qcom,apq8064"))
> + mux->disable_sec_src_gating = true;
> +
> init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s);
> if (!init.name)
> return -ENOMEM;
> --
> 2.34.1
>


--
With best wishes
Dmitry