From: Matthew Gerlach <[email protected]>
This patch set adds a device tree for the Hard Processor System (HPS)
on an Agilex based Intel n6000 board.
Patch 1 defines the device tree binding for the HPS Copy Engine IP
used to copy a bootable image from host memory to HPS DDR.
Patch 2 defines the binding for the Intel n6000 board itself.
Patch 3 adds the device tree for the n6000 board.
Changelog v1 -> v2:
- add dt binding for copy enging
- add dt binding for n6000 board
- fix copy engine node name
- fix compatible field for copy engine
- remove redundant status field
- add compatibility field for the board
- fix SPDX
- fix how osc1 clock frequency is set
Matthew Gerlach (3):
dt-bindings: misc: add bindings for Intel HPS Copy Engine
dt-bindings: intel: add binding for Intel n6000
arm64: dts: intel: add device tree for n6000
.../bindings/arm/intel,socfpga.yaml | 1 +
.../bindings/misc/intel,hps-copy-engine.yaml | 48 ++++++++++++
arch/arm64/boot/dts/intel/Makefile | 3 +-
.../boot/dts/intel/socfpga_agilex_n6000.dts | 76 +++++++++++++++++++
4 files changed, 127 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/misc/intel,hps-copy-engine.yaml
create mode 100644 arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts
--
2.25.1
From: Matthew Gerlach <[email protected]>
Add the binding string for the Agilex based Intel n6000 board.
Signed-off-by: Matthew Gerlach <[email protected]>
---
Documentation/devicetree/bindings/arm/intel,socfpga.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml
index 6e043459fcd5..61a454a40e87 100644
--- a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml
+++ b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml
@@ -18,6 +18,7 @@ properties:
items:
- enum:
- intel,n5x-socdk
+ - intel,socfpga-agilex-n6000
- intel,socfpga-agilex-socdk
- const: intel,socfpga-agilex
--
2.25.1