From: Marcel Ziswiler <[email protected]>
This is a general update of the Colibri iMX7 device tree files.
The Toradex Colibri family is composed of a SoM that can be plugged on
various carrier boards, with carrier boards allowing multiple optional
accessories (e.g. display, camera, ...).
The device tree sources are structured into a SoM dtsi and a carrier dts
which then includes the SoM dtsi. The SoM dtsi defines and enables the
functionality self-contained on the SoM and prepares for the
functionality provided by the carrier HW or accessories so that the
carrier dts then can enable or amend nodes provided. Accessories are
enabled in overlays depending on HW configuration.
Please find the following colibri-imx7 device trees improvements:
- Display/Touch Functionality Overhaul
Rename display interface to match other modules to make it easier to
use device tree overlays.
The parallel RGB interface (lcdif) and all related stuff turn on in a
device tree overlay. Keep them disabled in the main devicetree.
As these subsystems are provided by module and not a part of boards,
move their definitions into the module-level devicetree.
Disable ad7879 touchscreen which turns on in a devic tree overlay.
Remains it disabled in the main devicetree.
The Toradex 7" Capacitive and 10" LVDS touch screens are Atmel MXT
peripherals available on the I2C bus for touchscreen events. Add
atmel_mxt_ts node to the module-level device tree. Also, provide pinmux
configuration for the INT/RST inputs from SODIMM pins 106/107 for most
carrier boards or an external touchscreen adapter inputs configured to
SODIMM pins 28/30.
- Ethernet Improvements
Add the MDIO bus with the respective PHY.
Add Ethernet aliases which is required to properly pass MAC address
from bootloader.
Add delay for on-module phy supply.
- USB Device/Host Switching
Add usb dual-role switching using extcon.
- MMC/SD
The original Colibri specification only defined 3.3 volt TTL signaling
and relied on external on-carrier pull-ups for the SD_DATA[0..3] lines.
The latest carrier boards like Iris V2 on the other hand are now UHS-I
compliant by leaving such external on-carrier pull-ups away relying on
module- or even SoC-level ones which pull up to resp. signaling voltage.
In such cases, the carrier board-level device tree may explicitly delete
the no-1-8-v property to enable full UHS-I support.
Also, fix SD/MMC regulator for the carrier boards using UHS-I modes.
- Add Iris and Iris V2 Carrier Board Device Trees
Add support for Toradex Iris carrier boards.
Marcel Ziswiler (18):
ARM: dts: imx7-colibri: overhaul display/touch functionality
ARM: dts: imx7-colibri: add mdio phy node
ARM: dts: imx7-colibri: move aliases, chosen, extcon and gpio-keys
ARM: dts: imx7-colibri: move regulators
ARM: dts: imx7-colibri: clean-up usdhc1 and add sleep config
ARM: dts: imx7-colibri: move rtc node
ARM: dts: imx7d-colibri-emmc: add cpu1 supply
ARM: dts: imx7-colibri-eval-v3: correct can controller comment
ARM: dts: imx7-colibri: disable adc2
ARM: dts: imx7-colibri-aster: add ssp aka spi cs aka ss pins
ARM: dts: imx7-colibri: add clarifying comments
ARM: dts: imx7-colibri: alphabetical re-order
ARM: dts: imx7-colibri: clean-up device enabling/disabling
ARM: dts: imx7-colibri: remove leading zero from reg address
ARM: dts: imx7-colibri: set regulator-name properties
ARM: dts: imx7-colibri: clean-up iomuxc pinctrl group naming
dt-bindings: arm: fsl: add toradex,colibri-imx7s/d/d-emmc-iris/-v2
ARM: dts: imx7-colibri: add support for Toradex Iris carrier boards
Max Krummenacher (1):
ARM: dts: imx7-colibri: add ethernet aliases
Oleksandr Suvorov (3):
ARM: dts: imx7-colibri: improve licensing and compatible strings
ARM: dts: imx7-colibri: improve wake-up with gpio key
ARM: dts: imx7-colibri: add delay for on-module phy supply
Philippe Schenker (1):
ARM: dts: imx7-colibri: add usb dual-role switching using extcon
Stefan Agner (1):
ARM: dts: imx7-colibri: set lcdif clock source to video pll
.../devicetree/bindings/arm/fsl.yaml | 6 +
arch/arm/boot/dts/Makefile | 6 +
arch/arm/boot/dts/imx6dl-colibri-iris.dts | 9 +-
arch/arm/boot/dts/imx7-colibri-aster.dtsi | 142 +--
arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 156 +---
arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi | 112 +++
arch/arm/boot/dts/imx7-colibri-iris.dtsi | 108 +++
arch/arm/boot/dts/imx7-colibri.dtsi | 830 +++++++++++-------
arch/arm/boot/dts/imx7d-colibri-aster.dts | 30 +-
.../arm/boot/dts/imx7d-colibri-emmc-aster.dts | 10 +-
.../boot/dts/imx7d-colibri-emmc-eval-v3.dts | 10 +-
.../boot/dts/imx7d-colibri-emmc-iris-v2.dts | 21 +
arch/arm/boot/dts/imx7d-colibri-emmc-iris.dts | 21 +
arch/arm/boot/dts/imx7d-colibri-emmc.dtsi | 17 +-
arch/arm/boot/dts/imx7d-colibri-eval-v3.dts | 45 +-
arch/arm/boot/dts/imx7d-colibri-iris-v2.dts | 83 ++
arch/arm/boot/dts/imx7d-colibri-iris.dts | 56 ++
arch/arm/boot/dts/imx7d-colibri.dtsi | 13 +-
arch/arm/boot/dts/imx7s-colibri-aster.dts | 27 +-
arch/arm/boot/dts/imx7s-colibri-eval-v3.dts | 43 +-
arch/arm/boot/dts/imx7s-colibri-iris-v2.dts | 78 ++
arch/arm/boot/dts/imx7s-colibri-iris.dts | 51 ++
arch/arm/boot/dts/imx7s-colibri.dtsi | 5 +-
23 files changed, 1295 insertions(+), 584 deletions(-)
create mode 100644 arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi
create mode 100644 arch/arm/boot/dts/imx7-colibri-iris.dtsi
create mode 100644 arch/arm/boot/dts/imx7d-colibri-emmc-iris-v2.dts
create mode 100644 arch/arm/boot/dts/imx7d-colibri-emmc-iris.dts
create mode 100644 arch/arm/boot/dts/imx7d-colibri-iris-v2.dts
create mode 100644 arch/arm/boot/dts/imx7d-colibri-iris.dts
create mode 100644 arch/arm/boot/dts/imx7s-colibri-iris-v2.dts
create mode 100644 arch/arm/boot/dts/imx7s-colibri-iris.dts
--
2.35.1
From: Oleksandr Suvorov <[email protected]>
Migrate to the latest SPDX license identifier, update copyright period
and improve compatible strings.
Signed-off-by: Oleksandr Suvorov <[email protected]>
Signed-off-by: Marcel Ziswiler <[email protected]>
---
arch/arm/boot/dts/imx7-colibri-aster.dtsi | 5 ++---
arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 4 ++--
arch/arm/boot/dts/imx7-colibri.dtsi | 4 ++--
arch/arm/boot/dts/imx7d-colibri-aster.dts | 7 ++++---
arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts | 8 +++++---
arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts | 8 +++++---
arch/arm/boot/dts/imx7d-colibri-emmc.dtsi | 4 ++--
arch/arm/boot/dts/imx7d-colibri-eval-v3.dts | 7 ++++---
arch/arm/boot/dts/imx7d-colibri.dtsi | 4 ++--
arch/arm/boot/dts/imx7s-colibri-aster.dts | 7 ++++---
arch/arm/boot/dts/imx7s-colibri-eval-v3.dts | 7 ++++---
arch/arm/boot/dts/imx7s-colibri.dtsi | 4 ++--
12 files changed, 38 insertions(+), 31 deletions(-)
diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi
index 950b4e5f6cf4..bfadb3a3124a 100644
--- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi
@@ -1,7 +1,6 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
- * Copyright 2017-2020 Toradex AG
- *
+ * Copyright 2017-2022 Toradex
*/
/ {
diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
index 17ad9065646d..074c96f09191 100644
--- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
@@ -1,6 +1,6 @@
-// SPDX-License-Identifier: GPL-2.0+ OR MIT
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
- * Copyright 2016-2020 Toradex
+ * Copyright 2016-2022 Toradex
*/
/ {
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index 6df82a67953a..fa615379a117 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -1,6 +1,6 @@
-// SPDX-License-Identifier: GPL-2.0+ OR MIT
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
- * Copyright 2016-2020 Toradex
+ * Copyright 2016-2022 Toradex
*/
#include <dt-bindings/pwm/pwm.h>
diff --git a/arch/arm/boot/dts/imx7d-colibri-aster.dts b/arch/arm/boot/dts/imx7d-colibri-aster.dts
index ce0e6bb7db37..2ed1823c4805 100644
--- a/arch/arm/boot/dts/imx7d-colibri-aster.dts
+++ b/arch/arm/boot/dts/imx7d-colibri-aster.dts
@@ -1,6 +1,6 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
- * Copyright 2017-2020 Toradex AG
+ * Copyright 2017-2022 Toradex
*
*/
@@ -10,7 +10,8 @@
/ {
model = "Toradex Colibri iMX7D on Aster Carrier Board";
- compatible = "toradex,colibri-imx7d-aster", "toradex,colibri-imx7d",
+ compatible = "toradex,colibri-imx7d-aster",
+ "toradex,colibri-imx7d",
"fsl,imx7d";
};
diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts
index 20480276cb0e..33e1034b75a4 100644
--- a/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts
+++ b/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts
@@ -1,6 +1,6 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
- * Copyright 2017-2020 Toradex AG
+ * Copyright 2017-2022 Toradex
*
*/
@@ -11,7 +11,9 @@
/ {
model = "Toradex Colibri iMX7D 1GB (eMMC) on Aster Carrier Board";
compatible = "toradex,colibri-imx7d-emmc-aster",
- "toradex,colibri-imx7d-emmc", "fsl,imx7d";
+ "toradex,colibri-imx7d-emmc",
+ "toradex,colibri-imx7d",
+ "fsl,imx7d";
};
&usbotg2 {
diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts
index 8ee73c870b12..25d8d4583289 100644
--- a/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts
+++ b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts
@@ -1,6 +1,6 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
- * Copyright 2017 Toradex AG
+ * Copyright 2017-2022 Toradex
*/
/dts-v1/;
@@ -10,7 +10,9 @@
/ {
model = "Toradex Colibri iMX7D 1GB (eMMC) on Colibri Evaluation Board V3";
compatible = "toradex,colibri-imx7d-emmc-eval-v3",
- "toradex,colibri-imx7d-emmc", "fsl,imx7d";
+ "toradex,colibri-imx7d-emmc",
+ "toradex,colibri-imx7d",
+ "fsl,imx7d";
};
&usbotg2 {
diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi
index af39e5370fa1..198e08409d59 100644
--- a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi
+++ b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi
@@ -1,6 +1,6 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
- * Copyright 2017 Toradex AG
+ * Copyright 2017-2022 Toradex
*/
#include "imx7d.dtsi"
diff --git a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts
index c610c50c003a..51561388fac5 100644
--- a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts
@@ -1,6 +1,6 @@
-// SPDX-License-Identifier: GPL-2.0+ OR MIT
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
- * Copyright 2016-2020 Toradex
+ * Copyright 2016-2022 Toradex
*/
/dts-v1/;
@@ -9,7 +9,8 @@
/ {
model = "Toradex Colibri iMX7D on Colibri Evaluation Board V3";
- compatible = "toradex,colibri-imx7d-eval-v3", "toradex,colibri-imx7d",
+ compatible = "toradex,colibri-imx7d-eval-v3",
+ "toradex,colibri-imx7d",
"fsl,imx7d";
};
diff --git a/arch/arm/boot/dts/imx7d-colibri.dtsi b/arch/arm/boot/dts/imx7d-colibri.dtsi
index 219a0404a058..90d25c604de2 100644
--- a/arch/arm/boot/dts/imx7d-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7d-colibri.dtsi
@@ -1,6 +1,6 @@
-// SPDX-License-Identifier: GPL-2.0+ OR MIT
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
- * Copyright 2016-2020 Toradex
+ * Copyright 2016-2022 Toradex
*/
#include "imx7d.dtsi"
diff --git a/arch/arm/boot/dts/imx7s-colibri-aster.dts b/arch/arm/boot/dts/imx7s-colibri-aster.dts
index 87f9e0e079a8..58ebb02d948a 100644
--- a/arch/arm/boot/dts/imx7s-colibri-aster.dts
+++ b/arch/arm/boot/dts/imx7s-colibri-aster.dts
@@ -1,6 +1,6 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
- * Copyright 2017-2020 Toradex AG
+ * Copyright 2017-2022 Toradex
*
*/
@@ -10,7 +10,8 @@
/ {
model = "Toradex Colibri iMX7S on Aster Carrier Board";
- compatible = "toradex,colibri-imx7s-aster", "toradex,colibri-imx7s",
+ compatible = "toradex,colibri-imx7s-aster",
+ "toradex,colibri-imx7s",
"fsl,imx7s";
};
diff --git a/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts
index 81956c16b95b..6589c4179177 100644
--- a/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts
@@ -1,6 +1,6 @@
-// SPDX-License-Identifier: GPL-2.0+ OR MIT
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
- * Copyright 2016-2020 Toradex
+ * Copyright 2016-2022 Toradex
*/
/dts-v1/;
@@ -9,7 +9,8 @@
/ {
model = "Toradex Colibri iMX7S on Colibri Evaluation Board V3";
- compatible = "toradex,colibri-imx7s-eval-v3", "toradex,colibri-imx7s",
+ compatible = "toradex,colibri-imx7s-eval-v3",
+ "toradex,colibri-imx7s",
"fsl,imx7s";
};
diff --git a/arch/arm/boot/dts/imx7s-colibri.dtsi b/arch/arm/boot/dts/imx7s-colibri.dtsi
index 94de220a5965..2ce102b7f5d4 100644
--- a/arch/arm/boot/dts/imx7s-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7s-colibri.dtsi
@@ -1,6 +1,6 @@
-// SPDX-License-Identifier: GPL-2.0+ OR MIT
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
- * Copyright 2016-2020 Toradex
+ * Copyright 2016-2022 Toradex
*/
#include "imx7s.dtsi"
--
2.35.1
From: Oleksandr Suvorov <[email protected]>
There is a significant time required for PHY Micrel KSZ8041 to power up.
Add a delay on start-up/wake-up before the FEC starts communicating with
the PHY.
LDO1 takes 6 ms, R39 + C44 takes ~100ms, the KSZ8041 datasheet asks for
~11 ms before starting any programming on the MIIM.
Counting that, add a 200 ms delay to be sure the PHY is ready for
programming. Also, add the same off delay time to give the capacitor
time to discharge in order to properly reset.
Signed-off-by: Oleksandr Suvorov <[email protected]>
Signed-off-by: Marcel Ziswiler <[email protected]>
---
arch/arm/boot/dts/imx7-colibri.dtsi | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index 329638985db6..09dbd262dad1 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -94,6 +94,17 @@ reg_module_3v3_avdd: regulator-module-3v3-avdd {
regulator-name = "+V3.3_AVDD_AUDIO";
};
+ reg_module_3v3_eth: regulator-module-3v3-eth {
+ compatible = "regulator-fixed";
+ off-on-delay-us = <200000>;
+ regulator-name = "+V3.3_ETH";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ startup-delay-us = <200000>;
+ vin-supply = <®_LDO1>;
+ };
+
reg_usbh_vbus: regulator-usbh-vbus {
compatible = "regulator-fixed";
gpio = <&gpio4 7 GPIO_ACTIVE_LOW>; /* SODIMM 129 / USBH_PEN */
@@ -153,7 +164,7 @@ &fec1 {
fsl,magic-packet;
phy-handle = <ðphy0>;
phy-mode = "rmii";
- phy-supply = <®_LDO1>;
+ phy-supply = <®_module_3v3_eth>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pinctrl_enet1>;
pinctrl-1 = <&pinctrl_enet1_sleep>;
@@ -440,7 +451,7 @@ reg_DCDC4: DCDC4 { /* V1.35_DRAM */
};
reg_LDO1: LDO1 { /* PWR_EN_+V3.3_ETH */
- regulator-min-microvolt = <1800000>;
+ regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
--
2.35.1
From: Marcel Ziswiler <[email protected]>
Each cpu-core is supposed to list its supply separately, add supply for
cpu1.
Fixes: 2d7401f8632f ("ARM: dts: imx7d: Add cpu1 supply")
Signed-off-by: Marcel Ziswiler <[email protected]>
---
arch/arm/boot/dts/imx7d-colibri-emmc.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi
index 45b12b0d8710..2b4be7646631 100644
--- a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi
+++ b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi
@@ -19,6 +19,10 @@ memory@80000000 {
};
};
+&cpu1 {
+ cpu-supply = <®_DCDC2>;
+};
+
&gpio6 {
gpio-line-names = "",
"",
--
2.35.1
From: Marcel Ziswiler <[email protected]>
Disable most nodes on module-level to be enabled on carrier board-level.
Signed-off-by: Marcel Ziswiler <[email protected]>
---
arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 1 -
arch/arm/boot/dts/imx7-colibri.dtsi | 5 -----
2 files changed, 6 deletions(-)
diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
index fea6e4c0d4d6..826f13da5b81 100644
--- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
@@ -44,7 +44,6 @@ mcp2515: can@0 {
spi-max-frequency = <10000000>;
vdd-supply = <®_3v3>;
xceiver-supply = <®_5v0>;
- status = "okay";
};
};
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index f29096fca54d..065d8f55f326 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -140,9 +140,6 @@ &adc1 {
};
/* ADC2 is not available as it conflicts with AD7879 resistive touchscreen. */
-&adc2 {
- status = "disabled";
-};
&cpu0 {
cpu-supply = <®_DCDC2>;
@@ -191,13 +188,11 @@ ethphy0: ethernet-phy@0 {
&flexcan1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan1>;
- status = "disabled";
};
&flexcan2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan2>;
- status = "disabled";
};
&gpio1 {
--
2.35.1
From: Marcel Ziswiler <[email protected]>
Based on toradex,colibri-imx7s, toradex,colibri-imx7d and
toradex,colibri-imx7d-emmc module device trees add iris and iris-v2 for
carrier board dts.
Signed-off-by: Marcel Ziswiler <[email protected]>
---
Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index 08bdd30e511c..3494a3f2a587 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -687,6 +687,8 @@ properties:
- enum:
- toradex,colibri-imx7s-aster # Module on Aster Carrier Board
- toradex,colibri-imx7s-eval-v3 # Module on Colibri Evaluation Board V3
+ - toradex,colibri-imx7s-iris # Module on Iris Carrier Board
+ - toradex,colibri-imx7s-iris-v2 # Module on Iris Carrier Board V2
- const: toradex,colibri-imx7s
- const: fsl,imx7s
@@ -739,6 +741,8 @@ properties:
- enum:
- toradex,colibri-imx7d-aster # Colibri iMX7D Module on Aster Carrier Board
- toradex,colibri-imx7d-eval-v3 # Colibri iMX7D Module on Colibri Evaluation Board V3
+ - toradex,colibri-imx7d-iris # Colibri iMX7D Module on Iris Carrier Board
+ - toradex,colibri-imx7d-iris-v2 # Colibri iMX7D Module on Iris Carrier Board V2
- const: toradex,colibri-imx7d
- const: fsl,imx7d
@@ -747,6 +751,8 @@ properties:
- enum:
- toradex,colibri-imx7d-emmc-aster # Module on Aster Carrier Board
- toradex,colibri-imx7d-emmc-eval-v3 # Module on Colibri Evaluation Board V3
+ - toradex,colibri-imx7d-emmc-iris # Module on Iris Carrier Board
+ - toradex,colibri-imx7d-emmc-iris-v2 # Module on Iris Carrier Board V2
- const: toradex,colibri-imx7d-emmc
- const: fsl,imx7d
--
2.35.1
From: Marcel Ziswiler <[email protected]>
Alphabetically re-order device tree iomuxc pinctrl pads, nodes and
properties.
Signed-off-by: Marcel Ziswiler <[email protected]>
---
arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 6 +-
arch/arm/boot/dts/imx7-colibri.dtsi | 368 ++++++++++----------
2 files changed, 186 insertions(+), 188 deletions(-)
diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
index 441331b09fb4..fea6e4c0d4d6 100644
--- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
@@ -34,13 +34,13 @@ &ecspi3 {
status = "okay";
mcp2515: can@0 {
+ clocks = <&clk16m>;
compatible = "microchip,mcp2515";
+ interrupt-parent = <&gpio5>;
+ interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can_int>;
reg = <0>;
- clocks = <&clk16m>;
- interrupt-parent = <&gpio5>;
- interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
spi-max-frequency = <10000000>;
vdd-supply = <®_3v3>;
xceiver-supply = <®_5v0>;
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index 4416b7befbfe..f29096fca54d 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -118,18 +118,18 @@ reg_usbh_vbus: regulator-usbh-vbus {
sound {
compatible = "simple-audio-card";
- simple-audio-card,name = "imx7-sgtl5000";
- simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&dailink_master>;
+ simple-audio-card,format = "i2s";
simple-audio-card,frame-master = <&dailink_master>;
+ simple-audio-card,name = "imx7-sgtl5000";
simple-audio-card,cpu {
sound-dai = <&sai1>;
};
dailink_master: simple-audio-card,codec {
- sound-dai = <&codec>;
clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
+ sound-dai = <&codec>;
};
};
};
@@ -150,9 +150,9 @@ &cpu0 {
/* Colibri SSP */
&ecspi3 {
+ cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; /* SODIMM 86 / SSPFRM */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>;
- cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; /* SODIMM 86 / SSPFRM */
};
/* Colibri Fast Ethernet */
@@ -380,11 +380,11 @@ &gpio7 {
/* NAND on such SKUs */
&gpmi {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpmi_nand>;
fsl,use-minimum-ecc;
- nand-on-flash-bbt;
nand-ecc-mode = "hw";
+ nand-on-flash-bbt;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
};
/* On-module Power I2C */
@@ -398,15 +398,15 @@ &i2c1 {
status = "okay";
codec: sgtl5000@a {
- compatible = "fsl,sgtl5000";
#sound-dai-cells = <0>;
- reg = <0x0a>;
clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
+ compatible = "fsl,sgtl5000";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai1_mclk>;
+ reg = <0x0a>;
VDDA-supply = <®_module_3v3_avdd>;
- VDDIO-supply = <®_module_3v3>;
VDDD-supply = <®_DCDC3>;
+ VDDIO-supply = <®_module_3v3>;
};
ad7879_ts: touchscreen@2c {
@@ -430,65 +430,65 @@ pmic@33 {
regulators {
reg_DCDC1: DCDC1 { /* V1.0_SOC */
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1100000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1100000>;
+ regulator-min-microvolt = <1000000>;
};
reg_DCDC2: DCDC2 { /* V1.1_ARM */
- regulator-min-microvolt = <975000>;
- regulator-max-microvolt = <1100000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1100000>;
+ regulator-min-microvolt = <975000>;
};
reg_DCDC3: DCDC3 { /* V1.8 */
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
};
reg_DCDC4: DCDC4 { /* V1.35_DRAM */
- regulator-min-microvolt = <1350000>;
- regulator-max-microvolt = <1350000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1350000>;
+ regulator-min-microvolt = <1350000>;
};
reg_LDO1: LDO1 { /* PWR_EN_+V3.3_ETH */
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
};
reg_LDO2: LDO2 { /* +V1.8_SD */
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <1800000>;
};
reg_LDO3: LDO3 { /* PWR_EN_+V3.3_LPSR */
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
};
reg_LDO4: LDO4 { /* V1.8_LPSR */
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
};
reg_LDO5: LDO5 { /* PWR_EN_+V3.3 */
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
};
};
};
@@ -575,31 +575,31 @@ &sai1 {
/* Colibri UART_A */
&uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1 &pinctrl_uart1_ctrl2>;
assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
- uart-has-rtscts;
fsl,dte-mode;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1 &pinctrl_uart1_ctrl2>;
+ uart-has-rtscts;
};
/* Colibri UART_B */
&uart2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart2>;
assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>;
assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
- uart-has-rtscts;
fsl,dte-mode;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ uart-has-rtscts;
};
/* Colibri UART_C */
&uart3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart3>;
assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>;
assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
fsl,dte-mode;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
};
/* Colibri USBC */
@@ -625,18 +625,18 @@ &usdhc1 {
/* eMMC on 1GB (eMMC) SKUs */
&usdhc3 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc3>;
- pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
- pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
assigned-clock-rates = <400000000>;
bus-width = <8>;
fsl,tuning-step = <2>;
- vmmc-supply = <®_module_3v3>;
- vqmmc-supply = <®_DCDC3>;
non-removable;
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc3>;
+ pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
sdhci-caps-mask = <0x80000000 0x0>;
+ vmmc-supply = <®_module_3v3>;
+ vqmmc-supply = <®_DCDC3>;
};
&iomuxc {
@@ -663,13 +663,73 @@ MX7D_PAD_EPDC_DATA15__GPIO2_IO15 0x74 /* SODIMM 107 / INT */
>;
};
+ pinctrl_can_int: can-int-grp {
+ fsl,pins = <
+ MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0X14 /* SODIMM 73 */
+ >;
+ };
+
+ pinctrl_ecspi3: ecspi3-grp {
+ fsl,pins = <
+ MX7D_PAD_I2C1_SCL__ECSPI3_MISO 0x2 /* SODIMM 90 */
+ MX7D_PAD_I2C1_SDA__ECSPI3_MOSI 0x2 /* SODIMM 92 */
+ MX7D_PAD_I2C2_SCL__ECSPI3_SCLK 0x2 /* SODIMM 88 */
+ >;
+ };
+
+ pinctrl_ecspi3_cs: ecspi3-cs-grp {
+ fsl,pins = <
+ MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14 /* SODIMM 86 */
+ >;
+ };
+
+ pinctrl_enet1: enet1grp {
+ fsl,pins = <
+ MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x73
+ MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x73
+ MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER 0x73
+ MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x73
+ MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x73
+ MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x73
+ MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x73
+ MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1 0x73
+ MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3
+ MX7D_PAD_SD2_WP__ENET1_MDC 0x3
+ >;
+ };
+
+ pinctrl_enet1_sleep: enet1sleepgrp {
+ fsl,pins = <
+ MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0 0x0
+ MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1 0x0
+ MX7D_PAD_ENET1_RGMII_RXC__GPIO7_IO5 0x0
+ MX7D_PAD_ENET1_RGMII_RX_CTL__GPIO7_IO4 0x0
+ MX7D_PAD_ENET1_RGMII_TD0__GPIO7_IO6 0x0
+ MX7D_PAD_ENET1_RGMII_TD1__GPIO7_IO7 0x0
+ MX7D_PAD_ENET1_RGMII_TX_CTL__GPIO7_IO10 0x0
+ MX7D_PAD_GPIO1_IO12__GPIO1_IO12 0x0
+ MX7D_PAD_SD2_CD_B__GPIO5_IO9 0x0
+ MX7D_PAD_SD2_WP__GPIO5_IO10 0x0
+ >;
+ };
+
+ pinctrl_flexcan1: flexcan1-grp {
+ fsl,pins = <
+ MX7D_PAD_ENET1_RGMII_RD2__FLEXCAN1_RX 0x79 /* SODIMM 63 */
+ MX7D_PAD_ENET1_RGMII_RD3__FLEXCAN1_TX 0x79 /* SODIMM 55 */
+ >;
+ };
+
+ pinctrl_flexcan2: flexcan2-grp {
+ fsl,pins = <
+ MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x79 /* SODIMM 188 */
+ MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x79 /* SODIMM 178 */
+ >;
+ };
+
pinctrl_gpio1: gpio1-grp {
fsl,pins = <
- MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0x14 /* SODIMM 77 */
- MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x14 /* SODIMM 89 */
- MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x74 /* SODIMM 91 */
- MX7D_PAD_LCD_RESET__GPIO3_IO4 0x14 /* SODIMM 93 */
- MX7D_PAD_EPDC_DATA10__GPIO2_IO10 0x74 /* SODIMM 105 */
+ MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x14 /* SODIMM 110 */
MX7D_PAD_EPDC_DATA00__GPIO2_IO0 0x14 /* SODIMM 111 */
MX7D_PAD_EPDC_DATA01__GPIO2_IO1 0x14 /* SODIMM 113 */
MX7D_PAD_EPDC_DATA02__GPIO2_IO2 0x14 /* SODIMM 115 */
@@ -678,47 +738,51 @@ MX7D_PAD_EPDC_DATA04__GPIO2_IO4 0x14 /* SODIMM 119 */
MX7D_PAD_EPDC_DATA05__GPIO2_IO5 0x14 /* SODIMM 121 */
MX7D_PAD_EPDC_DATA06__GPIO2_IO6 0x14 /* SODIMM 123 */
MX7D_PAD_EPDC_DATA07__GPIO2_IO7 0x14 /* SODIMM 125 */
- MX7D_PAD_EPDC_SDCE2__GPIO2_IO22 0x14 /* SODIMM 127 */
- MX7D_PAD_UART3_RTS_B__GPIO4_IO6 0x14 /* SODIMM 131 */
+ MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x74 /* SODIMM 91 */
+ MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x14 /* SODIMM 89 */
+ MX7D_PAD_EPDC_DATA10__GPIO2_IO10 0x74 /* SODIMM 105 */
+ MX7D_PAD_EPDC_DATA11__GPIO2_IO11 0x14 /* SODIMM 152 */
+ MX7D_PAD_EPDC_DATA12__GPIO2_IO12 0x14 /* SODIMM 150 */
+ MX7D_PAD_EPDC_DATA14__GPIO2_IO14 0x14 /* SODIMM 126 */
+ MX7D_PAD_EPDC_GDCLK__GPIO2_IO24 0x14 /* SODIMM 132 */
+ MX7D_PAD_EPDC_GDOE__GPIO2_IO25 0x14 /* SODIMM 134 */
MX7D_PAD_EPDC_GDRL__GPIO2_IO26 0x14 /* SODIMM 133 */
- MX7D_PAD_SAI1_RX_DATA__GPIO6_IO12 0x14 /* SODIMM 169 */
- MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17 0x14 /* SODIMM 24 */
- MX7D_PAD_SD2_DATA2__GPIO5_IO16 0x14 /* SODIMM 100 */
- MX7D_PAD_SD2_DATA3__GPIO5_IO17 0x14 /* SODIMM 102 */
MX7D_PAD_EPDC_GDSP__GPIO2_IO27 0x14 /* SODIMM 104 */
- MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x14 /* SODIMM 110 */
MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30 0x14 /* SODIMM 112 */
+ MX7D_PAD_EPDC_PWR_STAT__GPIO2_IO31 0x14 /* SODIMM 128 */
+ MX7D_PAD_EPDC_SDCE0__GPIO2_IO20 0x14 /* SODIMM 122 */
+ MX7D_PAD_EPDC_SDCE1__GPIO2_IO21 0x14 /* SODIMM 124 */
+ MX7D_PAD_EPDC_SDCE2__GPIO2_IO22 0x14 /* SODIMM 127 */
+ MX7D_PAD_EPDC_SDCE3__GPIO2_IO23 0x14 /* SODIMM 130 */
MX7D_PAD_EPDC_SDCLK__GPIO2_IO16 0x14 /* SODIMM 114 */
MX7D_PAD_EPDC_SDLE__GPIO2_IO17 0x14 /* SODIMM 116 */
MX7D_PAD_EPDC_SDOE__GPIO2_IO18 0x14 /* SODIMM 118 */
MX7D_PAD_EPDC_SDSHR__GPIO2_IO19 0x14 /* SODIMM 120 */
- MX7D_PAD_EPDC_SDCE0__GPIO2_IO20 0x14 /* SODIMM 122 */
- MX7D_PAD_EPDC_SDCE1__GPIO2_IO21 0x14 /* SODIMM 124 */
- MX7D_PAD_EPDC_DATA14__GPIO2_IO14 0x14 /* SODIMM 126 */
- MX7D_PAD_EPDC_PWR_STAT__GPIO2_IO31 0x14 /* SODIMM 128 */
- MX7D_PAD_EPDC_SDCE3__GPIO2_IO23 0x14 /* SODIMM 130 */
- MX7D_PAD_EPDC_GDCLK__GPIO2_IO24 0x14 /* SODIMM 132 */
- MX7D_PAD_EPDC_GDOE__GPIO2_IO25 0x14 /* SODIMM 134 */
- MX7D_PAD_EPDC_DATA12__GPIO2_IO12 0x14 /* SODIMM 150 */
- MX7D_PAD_EPDC_DATA11__GPIO2_IO11 0x14 /* SODIMM 152 */
+ MX7D_PAD_LCD_RESET__GPIO3_IO4 0x14 /* SODIMM 93 */
+ MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17 0x14 /* SODIMM 24 */
+ MX7D_PAD_SAI1_RX_DATA__GPIO6_IO12 0x14 /* SODIMM 169 */
+ MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0x14 /* SODIMM 77 */
MX7D_PAD_SD2_CLK__GPIO5_IO12 0x14 /* SODIMM 184 */
MX7D_PAD_SD2_CMD__GPIO5_IO13 0x14 /* SODIMM 186 */
+ MX7D_PAD_SD2_DATA2__GPIO5_IO16 0x14 /* SODIMM 100 */
+ MX7D_PAD_SD2_DATA3__GPIO5_IO17 0x14 /* SODIMM 102 */
+ MX7D_PAD_UART3_RTS_B__GPIO4_IO6 0x14 /* SODIMM 131 */
>;
};
pinctrl_gpio2: gpio2-grp { /* On X22 Camera interface */
fsl,pins = <
- MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x14 /* SODIMM 65 */
- MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x74 /* SODIMM 69 */
- MX7D_PAD_I2C4_SDA__GPIO4_IO15 0x14 /* SODIMM 75 */
MX7D_PAD_ECSPI1_MISO__GPIO4_IO18 0x14 /* SODIMM 79 */
- MX7D_PAD_I2C3_SCL__GPIO4_IO12 0x14 /* SODIMM 81 */
- MX7D_PAD_ECSPI2_MISO__GPIO4_IO22 0x14 /* SODIMM 85 */
- MX7D_PAD_ECSPI1_SS0__GPIO4_IO19 0x14 /* SODIMM 97 */
- MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16 0x14 /* SODIMM 101 */
MX7D_PAD_ECSPI1_MOSI__GPIO4_IO17 0x14 /* SODIMM 103 */
+ MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16 0x14 /* SODIMM 101 */
+ MX7D_PAD_ECSPI1_SS0__GPIO4_IO19 0x14 /* SODIMM 97 */
+ MX7D_PAD_ECSPI2_MISO__GPIO4_IO22 0x14 /* SODIMM 85 */
+ MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x14 /* SODIMM 65 */
+ MX7D_PAD_I2C3_SCL__GPIO4_IO12 0x14 /* SODIMM 81 */
MX7D_PAD_I2C3_SDA__GPIO4_IO13 0x14 /* SODIMM 94 */
MX7D_PAD_I2C4_SCL__GPIO4_IO14 0x14 /* SODIMM 96 */
+ MX7D_PAD_I2C4_SDA__GPIO4_IO15 0x14 /* SODIMM 75 */
+ MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x74 /* SODIMM 69 */
MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x14 /* SODIMM 98 */
>;
};
@@ -736,87 +800,15 @@ MX7D_PAD_LCD_DATA23__GPIO3_IO28 0x74 /* SODIMM 146 */
pinctrl_gpio4: gpio4-grp { /* Alternatively CAN2 */
fsl,pins = <
- MX7D_PAD_GPIO1_IO15__GPIO1_IO15 0x14 /* SODIMM 178 */
MX7D_PAD_GPIO1_IO14__GPIO1_IO14 0x14 /* SODIMM 188 */
+ MX7D_PAD_GPIO1_IO15__GPIO1_IO15 0x14 /* SODIMM 178 */
>;
};
pinctrl_gpio7: gpio7-grp { /* Alternatively CAN1 */
fsl,pins = <
- MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x14 /* SODIMM 55 */
MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x14 /* SODIMM 63 */
- >;
- };
-
- pinctrl_i2c1_int: i2c1-int-grp { /* PMIC / TOUCH */
- fsl,pins = <
- MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x79
- >;
- };
-
- pinctrl_can_int: can-int-grp {
- fsl,pins = <
- MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0X14 /* SODIMM 73 */
- >;
- };
-
- pinctrl_enet1: enet1grp {
- fsl,pins = <
- MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x73
- MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x73
- MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x73
- MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER 0x73
-
- MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x73
- MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x73
- MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x73
- MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1 0x73
- MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3
- MX7D_PAD_SD2_WP__ENET1_MDC 0x3
- >;
- };
-
- pinctrl_enet1_sleep: enet1sleepgrp {
- fsl,pins = <
- MX7D_PAD_ENET1_RGMII_RX_CTL__GPIO7_IO4 0x0
- MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0 0x0
- MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1 0x0
- MX7D_PAD_ENET1_RGMII_RXC__GPIO7_IO5 0x0
-
- MX7D_PAD_ENET1_RGMII_TX_CTL__GPIO7_IO10 0x0
- MX7D_PAD_ENET1_RGMII_TD0__GPIO7_IO6 0x0
- MX7D_PAD_ENET1_RGMII_TD1__GPIO7_IO7 0x0
- MX7D_PAD_GPIO1_IO12__GPIO1_IO12 0x0
- MX7D_PAD_SD2_CD_B__GPIO5_IO9 0x0
- MX7D_PAD_SD2_WP__GPIO5_IO10 0x0
- >;
- };
-
- pinctrl_ecspi3_cs: ecspi3-cs-grp {
- fsl,pins = <
- MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14 /* SODIMM 86 */
- >;
- };
-
- pinctrl_ecspi3: ecspi3-grp {
- fsl,pins = <
- MX7D_PAD_I2C1_SCL__ECSPI3_MISO 0x2 /* SODIMM 90 */
- MX7D_PAD_I2C1_SDA__ECSPI3_MOSI 0x2 /* SODIMM 92 */
- MX7D_PAD_I2C2_SCL__ECSPI3_SCLK 0x2 /* SODIMM 88 */
- >;
- };
-
- pinctrl_flexcan1: flexcan1-grp {
- fsl,pins = <
- MX7D_PAD_ENET1_RGMII_RD3__FLEXCAN1_TX 0x79 /* SODIMM 55 */
- MX7D_PAD_ENET1_RGMII_RD2__FLEXCAN1_RX 0x79 /* SODIMM 63 */
- >;
- };
-
- pinctrl_flexcan2: flexcan2-grp {
- fsl,pins = <
- MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x79 /* SODIMM 188 */
- MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x79 /* SODIMM 178 */
+ MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x14 /* SODIMM 55 */
>;
};
@@ -828,12 +820,10 @@ MX7D_PAD_SD1_WP__GPIO5_IO1 0x14 /* SODIMM 71 */
pinctrl_gpmi_nand: gpmi-nand-grp {
fsl,pins = <
- MX7D_PAD_SD3_CLK__NAND_CLE 0x71
- MX7D_PAD_SD3_CMD__NAND_ALE 0x71
MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B 0x71
MX7D_PAD_SAI1_TX_DATA__NAND_READY_B 0x74
- MX7D_PAD_SD3_STROBE__NAND_RE_B 0x71
- MX7D_PAD_SD3_RESET_B__NAND_WE_B 0x71
+ MX7D_PAD_SD3_CLK__NAND_CLE 0x71
+ MX7D_PAD_SD3_CMD__NAND_ALE 0x71
MX7D_PAD_SD3_DATA0__NAND_DATA00 0x71
MX7D_PAD_SD3_DATA1__NAND_DATA01 0x71
MX7D_PAD_SD3_DATA2__NAND_DATA02 0x71
@@ -842,13 +832,21 @@ MX7D_PAD_SD3_DATA4__NAND_DATA04 0x71
MX7D_PAD_SD3_DATA5__NAND_DATA05 0x71
MX7D_PAD_SD3_DATA6__NAND_DATA06 0x71
MX7D_PAD_SD3_DATA7__NAND_DATA07 0x71
+ MX7D_PAD_SD3_RESET_B__NAND_WE_B 0x71
+ MX7D_PAD_SD3_STROBE__NAND_RE_B 0x71
+ >;
+ };
+
+ pinctrl_i2c1_int: i2c1-int-grp { /* PMIC / TOUCH */
+ fsl,pins = <
+ MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x79
>;
};
pinctrl_i2c4: i2c4-grp {
fsl,pins = <
- MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f /* SODIMM 194 */
MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000007f /* SODIMM 196 */
+ MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f /* SODIMM 194 */
>;
};
@@ -897,8 +895,8 @@ pinctrl_lcdif_ctrl: lcdif-ctrl-grp {
fsl,pins = <
MX7D_PAD_LCD_CLK__LCD_CLK 0x79 /* SODIMM 56 */
MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79 /* SODIMM 44 */
- MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79 /* SODIMM 82 */
MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79 /* SODIMM 68 */
+ MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79 /* SODIMM 82 */
>;
};
@@ -913,8 +911,8 @@ MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 /* SODIMM 95 */
pinctrl_pwm1: pwm1-grp {
fsl,pins = <
- MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 /* SODIMM 59 */
MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x4 /* SODIMM 59 */
+ MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 /* SODIMM 59 */
>;
};
@@ -932,39 +930,39 @@ MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x79 /* SODIMM 30 */
pinctrl_pwm4: pwm4-grp {
fsl,pins = <
- MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79 /* SODIMM 67 */
MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 0x4 /* SODIMM 67 */
+ MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79 /* SODIMM 67 */
>;
};
pinctrl_uart1: uart1-grp {
fsl,pins = <
- MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX 0x79 /* SODIMM 33 */
- MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX 0x79 /* SODIMM 35 */
MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS 0x79 /* SODIMM 25 */
MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS 0x79 /* SODIMM 27 */
+ MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX 0x79 /* SODIMM 35 */
+ MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX 0x79 /* SODIMM 33 */
>;
};
pinctrl_uart1_ctrl1: uart1-ctrl1-grp {
fsl,pins = <
- MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x14 /* SODIMM 31 / DCD */
MX7D_PAD_SD2_DATA0__GPIO5_IO14 0x14 /* SODIMM 23 / DTR */
+ MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x14 /* SODIMM 31 / DCD */
>;
};
pinctrl_uart2: uart2-grp {
fsl,pins = <
- MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX 0x79 /* SODIMM 36 */
- MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX 0x79 /* SODIMM 38 */
MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS 0x79 /* SODIMM 32 / CTS */
MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS 0x79 /* SODIMM 34 / RTS */
+ MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX 0x79 /* SODIMM 38 */
+ MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX 0x79 /* SODIMM 36 */
>;
};
pinctrl_uart3: uart3-grp {
fsl,pins = <
- MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX 0x79 /* SODIMM 19 */
MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX 0x79 /* SODIMM 21 */
+ MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX 0x79 /* SODIMM 19 */
>;
};
@@ -1027,8 +1025,8 @@ MX7D_PAD_SD1_DATA3__SD1_DATA3 0x10
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
- MX7D_PAD_SD3_CMD__SD3_CMD 0x59
MX7D_PAD_SD3_CLK__SD3_CLK 0x19
+ MX7D_PAD_SD3_CMD__SD3_CMD 0x59
MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
@@ -1043,8 +1041,8 @@ MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
fsl,pins = <
- MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
+ MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
@@ -1059,8 +1057,8 @@ MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a
pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
fsl,pins = <
- MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
+ MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
@@ -1075,10 +1073,10 @@ MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b
pinctrl_sai1: sai1-grp {
fsl,pins = <
- MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f
- MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x1f
MX7D_PAD_ENET1_COL__SAI1_TX_DATA0 0x30
+ MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f
MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0 0x1f
+ MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x1f
>;
};
@@ -1093,6 +1091,18 @@ &iomuxc_lpsr {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_lpsr>;
+ pinctrl_cd_usdhc1: cdusdhc1grp {
+ fsl,pins = <
+ MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x59 /* SODIMM 43 / MMC_CD */
+ >;
+ };
+
+ pinctrl_cd_usdhc1_sleep: cdusdhc1-slpgrp {
+ fsl,pins = <
+ MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0
+ >;
+ };
+
pinctrl_gpio_lpsr: gpio1-grp {
fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x59 /* SODIMM 135 */
@@ -1108,8 +1118,8 @@ MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x19 /* SODIMM 45 / WAKE_UP */
pinctrl_i2c1: i2c1-grp {
fsl,pins = <
- MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA 0x4000007f
MX7D_PAD_LPSR_GPIO1_IO04__I2C1_SCL 0x4000007f
+ MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA 0x4000007f
>;
};
@@ -1120,22 +1130,10 @@ MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x4000007f
>;
};
- pinctrl_cd_usdhc1: cdusdhc1grp {
- fsl,pins = <
- MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x59 /* SODIMM 43 / MMC_CD */
- >;
- };
-
- pinctrl_cd_usdhc1_sleep: cdusdhc1-slpgrp {
- fsl,pins = <
- MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0
- >;
- };
-
pinctrl_uart1_ctrl2: uart1-ctrl2-grp {
fsl,pins = <
- MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 /* SODIMM 29 / DSR */
MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x14 /* SODIMM 37 / RI */
+ MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 /* SODIMM 29 / DSR */
>;
};
};
--
2.35.1
From: Marcel Ziswiler <[email protected]>
Move regulators to module-level device tree given they are standard
Colibri functionalities.
Signed-off-by: Marcel Ziswiler <[email protected]>
---
arch/arm/boot/dts/imx7-colibri-aster.dtsi | 27 -------------
arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 25 ------------
arch/arm/boot/dts/imx7-colibri.dtsi | 39 ++++++++++++++++---
arch/arm/boot/dts/imx7d-colibri-aster.dts | 1 -
.../arm/boot/dts/imx7d-colibri-emmc-aster.dts | 1 -
.../boot/dts/imx7d-colibri-emmc-eval-v3.dts | 1 -
arch/arm/boot/dts/imx7d-colibri-emmc.dtsi | 1 +
arch/arm/boot/dts/imx7d-colibri-eval-v3.dts | 1 -
arch/arm/boot/dts/imx7d-colibri.dtsi | 1 +
9 files changed, 35 insertions(+), 62 deletions(-)
diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi
index c12de1861c05..440f98dc323d 100644
--- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi
@@ -3,33 +3,6 @@
* Copyright 2017-2022 Toradex
*/
-/ {
- reg_3v3: regulator-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "3.3V";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- reg_5v0: regulator-5v0 {
- compatible = "regulator-fixed";
- regulator-name = "5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- reg_usbh_vbus: regulator-usbh-vbus {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usbh_reg>;
- regulator-name = "VCC_USB[1-4]";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- gpio = <&gpio4 7 GPIO_ACTIVE_LOW>;
- vin-supply = <®_5v0>;
- };
-};
-
&adc1 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
index 2e6678f81af6..33a9cbbca0d2 100644
--- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
@@ -10,31 +10,6 @@ clk16m: clk16m {
#clock-cells = <0>;
clock-frequency = <16000000>;
};
-
- reg_3v3: regulator-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "3.3V";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- reg_5v0: regulator-5v0 {
- compatible = "regulator-fixed";
- regulator-name = "5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- reg_usbh_vbus: regulator-usbh-vbus {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usbh_reg>;
- regulator-name = "VCC_USB[1-4]";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- gpio = <&gpio4 7 GPIO_ACTIVE_LOW>;
- vin-supply = <®_5v0>;
- };
};
&adc1 {
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index c5a58949d664..329638985db6 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -62,20 +62,47 @@ lcd_panel_in: endpoint {
};
};
- reg_module_3v3: regulator-module-3v3 {
+ reg_3v3: regulator-3v3 {
compatible = "regulator-fixed";
- regulator-name = "+V3.3";
- regulator-min-microvolt = <3300000>;
+ regulator-always-on;
regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "3.3V";
+ };
+
+ reg_5v0: regulator-5v0 {
+ compatible = "regulator-fixed";
regulator-always-on;
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ regulator-name = "5V";
};
- reg_module_3v3_avdd: regulator-module-3v3-avdd {
+ reg_module_3v3: regulator-module-3v3 {
compatible = "regulator-fixed";
- regulator-name = "+V3.3_AVDD_AUDIO";
- regulator-min-microvolt = <3300000>;
+ regulator-always-on;
regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "+V3.3";
+ };
+
+ reg_module_3v3_avdd: regulator-module-3v3-avdd {
+ compatible = "regulator-fixed";
regulator-always-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "+V3.3_AVDD_AUDIO";
+ };
+
+ reg_usbh_vbus: regulator-usbh-vbus {
+ compatible = "regulator-fixed";
+ gpio = <&gpio4 7 GPIO_ACTIVE_LOW>; /* SODIMM 129 / USBH_PEN */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbh_reg>;
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ regulator-name = "VCC_USB[1-4]";
+ vin-supply = <®_5v0>;
};
sound {
diff --git a/arch/arm/boot/dts/imx7d-colibri-aster.dts b/arch/arm/boot/dts/imx7d-colibri-aster.dts
index 2ed1823c4805..cfd75e3424fa 100644
--- a/arch/arm/boot/dts/imx7d-colibri-aster.dts
+++ b/arch/arm/boot/dts/imx7d-colibri-aster.dts
@@ -36,6 +36,5 @@ &panel_dpi {
};
&usbotg2 {
- vbus-supply = <®_usbh_vbus>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts
index 33e1034b75a4..7b4451699478 100644
--- a/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts
+++ b/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts
@@ -17,6 +17,5 @@ / {
};
&usbotg2 {
- vbus-supply = <®_usbh_vbus>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts
index 25d8d4583289..3e84018392ee 100644
--- a/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts
+++ b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts
@@ -16,6 +16,5 @@ / {
};
&usbotg2 {
- vbus-supply = <®_usbh_vbus>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi
index e77f0b26b6fb..45b12b0d8710 100644
--- a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi
+++ b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi
@@ -47,6 +47,7 @@ &gpio6 {
&usbotg2 {
dr_mode = "host";
+ vbus-supply = <®_usbh_vbus>;
};
&usdhc3 {
diff --git a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts
index 51561388fac5..7aabe5691459 100644
--- a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts
@@ -47,6 +47,5 @@ &pwm3 {
};
&usbotg2 {
- vbus-supply = <®_usbh_vbus>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx7d-colibri.dtsi b/arch/arm/boot/dts/imx7d-colibri.dtsi
index 48993abacae4..d1469aa8b025 100644
--- a/arch/arm/boot/dts/imx7d-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7d-colibri.dtsi
@@ -29,4 +29,5 @@ &gpmi {
&usbotg2 {
dr_mode = "host";
+ vbus-supply = <®_usbh_vbus>;
};
--
2.35.1
From: Marcel Ziswiler <[email protected]>
Correct CAN controller comment. It is a MCP2515 rather than a mpc258x.
Fixes: 66d59b678a87 ("ARM: dts: imx7-colibri: add MCP2515 CAN controller")
Signed-off-by: Marcel Ziswiler <[email protected]>
---
arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
index e3aac56aece8..069f56272546 100644
--- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
@@ -4,7 +4,7 @@
*/
/ {
- /* fixed crystal dedicated to mpc258x */
+ /* Fixed crystal dedicated to MCP2515. */
clk16m: clk16m {
compatible = "fixed-clock";
#clock-cells = <0>;
--
2.35.1
From: Marcel Ziswiler <[email protected]>
- Add clarifying comments.
- Remove spurious new line.
- Add required new line.
Signed-off-by: Marcel Ziswiler <[email protected]>
---
arch/arm/boot/dts/imx7-colibri-aster.dtsi | 11 ++
arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 15 ++
arch/arm/boot/dts/imx7-colibri.dtsi | 140 ++++++++++--------
arch/arm/boot/dts/imx7d-colibri-aster.dts | 2 +-
.../arm/boot/dts/imx7d-colibri-emmc-aster.dts | 1 +
.../boot/dts/imx7d-colibri-emmc-eval-v3.dts | 1 +
arch/arm/boot/dts/imx7d-colibri-emmc.dtsi | 2 +
arch/arm/boot/dts/imx7d-colibri-eval-v3.dts | 5 +
arch/arm/boot/dts/imx7d-colibri.dtsi | 2 +
arch/arm/boot/dts/imx7s-colibri-eval-v3.dts | 4 +
arch/arm/boot/dts/imx7s-colibri.dtsi | 1 +
11 files changed, 121 insertions(+), 63 deletions(-)
diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi
index 117965705814..fa488a6de0d4 100644
--- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi
@@ -3,6 +3,7 @@
* Copyright 2017-2022 Toradex
*/
+/* Colibri AD0 to AD3 */
&adc1 {
status = "okay";
};
@@ -17,26 +18,32 @@ &gpio4 22 GPIO_ACTIVE_LOW /* SODIMM 85 / already muxed pinctrl_gpio2 as SPI_CE1_
status = "okay";
};
+/* Colibri Fast Ethernet */
&fec1 {
status = "okay";
};
+/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */
&i2c4 {
status = "okay";
};
+/* Colibri PWM<A> */
&pwm1 {
status = "okay";
};
+/* Colibri PWM<B> */
&pwm2 {
status = "okay";
};
+/* Colibri PWM<C> */
&pwm3 {
status = "okay";
};
+/* Colibri PWM<D> */
&pwm4 {
status = "okay";
};
@@ -46,18 +53,22 @@ &rtc {
status = "okay";
};
+/* Colibri UART_A */
&uart1 {
status = "okay";
};
+/* Colibri UART_B */
&uart2 {
status = "okay";
};
+/* Colibri UART_C */
&uart3 {
status = "okay";
};
+/* Colibri USBC */
&usbotg1 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
index 6ae38c1f38d4..441331b09fb4 100644
--- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
@@ -12,6 +12,7 @@ clk16m: clk16m {
};
};
+/* Colibri AD0 to AD3 */
&adc1 {
status = "okay";
};
@@ -28,6 +29,7 @@ &atmel_mxt_ts {
status = "disabled";
};
+/* Colibri SSP */
&ecspi3 {
status = "okay";
@@ -46,26 +48,34 @@ mcp2515: can@0 {
};
};
+/* Colibri Fast Ethernet */
&fec1 {
status = "okay";
};
+/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */
&i2c4 {
status = "okay";
};
+/* Colibri PWM<A> */
&pwm1 {
status = "okay";
};
+/* Colibri PWM<B> */
&pwm2 {
+ /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */
status = "okay";
};
+/* Colibri PWM<C> */
&pwm3 {
+ /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */
status = "okay";
};
+/* Colibri PWM<D> */
&pwm4 {
status = "okay";
};
@@ -75,22 +85,27 @@ &rtc {
status = "okay";
};
+/* Colibri UART_A */
&uart1 {
status = "okay";
};
+/* Colibri UART_B */
&uart2 {
status = "okay";
};
+/* Colibri UART_C */
&uart3 {
status = "okay";
};
+/* Colibri USBC */
&usbotg1 {
status = "okay";
};
+/* Colibri MMC/SD */
&usdhc1 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index 0fc4b33d97be..4416b7befbfe 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -122,6 +122,7 @@ sound {
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&dailink_master>;
simple-audio-card,frame-master = <&dailink_master>;
+
simple-audio-card,cpu {
sound-dai = <&sai1>;
};
@@ -133,6 +134,7 @@ dailink_master: simple-audio-card,codec {
};
};
+/* Colibri AD0 to AD3 */
&adc1 {
vref-supply = <®_DCDC3>;
};
@@ -146,12 +148,14 @@ &cpu0 {
cpu-supply = <®_DCDC2>;
};
+/* Colibri SSP */
&ecspi3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>;
- cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
+ cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; /* SODIMM 86 / SSPFRM */
};
+/* Colibri Fast Ethernet */
&fec1 {
assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
assigned-clock-rates = <0>, <100000000>;
@@ -174,6 +178,7 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;
+ /* Micrel KSZ8041RNL */
ethphy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
max-speed = <100>;
@@ -373,6 +378,7 @@ &gpio7 {
"SODIMM_137";
};
+/* NAND on such SKUs */
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
@@ -381,6 +387,7 @@ &gpmi {
nand-ecc-mode = "hw";
};
+/* On-module Power I2C */
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default", "gpio";
@@ -388,7 +395,6 @@ &i2c1 {
pinctrl-1 = <&pinctrl_i2c1_recovery &pinctrl_i2c1_int>;
scl-gpios = <&gpio1 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio1 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-
status = "okay";
codec: sgtl5000@a {
@@ -488,6 +494,7 @@ reg_LDO5: LDO5 { /* PWR_EN_+V3.3 */
};
};
+/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */
&i2c4 {
clock-frequency = <100000>;
pinctrl-names = "default", "gpio";
@@ -532,28 +539,32 @@ lcdif_out: endpoint {
};
};
+/* Colibri PWM<A> */
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
};
+/* Colibri PWM<B> */
&pwm2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm2>;
};
+/* Colibri PWM<C> */
&pwm3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm3>;
};
+/* Colibri PWM<D> */
&pwm4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm4>;
};
®_1p0d {
- vin-supply = <®_DCDC3>;
+ vin-supply = <®_DCDC3>; /* VDDA_1P8_IN */
};
&sai1 {
@@ -562,6 +573,7 @@ &sai1 {
status = "okay";
};
+/* Colibri UART_A */
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1 &pinctrl_uart1_ctrl2>;
@@ -571,6 +583,7 @@ &uart1 {
fsl,dte-mode;
};
+/* Colibri UART_B */
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
@@ -580,6 +593,7 @@ &uart2 {
fsl,dte-mode;
};
+/* Colibri UART_C */
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
@@ -588,6 +602,7 @@ &uart3 {
fsl,dte-mode;
};
+/* Colibri USBC */
&usbotg1 {
dr_mode = "otg";
extcon = <0>, <&extcon_usbc_det>;
@@ -608,6 +623,7 @@ &usdhc1 {
wakeup-source;
};
+/* eMMC on 1GB (eMMC) SKUs */
&usdhc3 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc3>;
@@ -778,15 +794,15 @@ MX7D_PAD_SD2_WP__GPIO5_IO10 0x0
pinctrl_ecspi3_cs: ecspi3-cs-grp {
fsl,pins = <
- MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14
+ MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14 /* SODIMM 86 */
>;
};
pinctrl_ecspi3: ecspi3-grp {
fsl,pins = <
- MX7D_PAD_I2C1_SCL__ECSPI3_MISO 0x2
- MX7D_PAD_I2C1_SDA__ECSPI3_MOSI 0x2
- MX7D_PAD_I2C2_SCL__ECSPI3_SCLK 0x2
+ MX7D_PAD_I2C1_SCL__ECSPI3_MISO 0x2 /* SODIMM 90 */
+ MX7D_PAD_I2C1_SDA__ECSPI3_MOSI 0x2 /* SODIMM 92 */
+ MX7D_PAD_I2C2_SCL__ECSPI3_SCLK 0x2 /* SODIMM 88 */
>;
};
@@ -831,8 +847,8 @@ MX7D_PAD_SD3_DATA7__NAND_DATA07 0x71
pinctrl_i2c4: i2c4-grp {
fsl,pins = <
- MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f
- MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000007f
+ MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f /* SODIMM 194 */
+ MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000007f /* SODIMM 196 */
>;
};
@@ -845,44 +861,44 @@ MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9 0x4000007f
pinctrl_lcdif_dat: lcdif-dat-grp {
fsl,pins = <
- MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79
- MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79
- MX7D_PAD_LCD_DATA02__LCD_DATA2 0x79
- MX7D_PAD_LCD_DATA03__LCD_DATA3 0x79
- MX7D_PAD_LCD_DATA04__LCD_DATA4 0x79
- MX7D_PAD_LCD_DATA05__LCD_DATA5 0x79
- MX7D_PAD_LCD_DATA06__LCD_DATA6 0x79
- MX7D_PAD_LCD_DATA07__LCD_DATA7 0x79
- MX7D_PAD_LCD_DATA08__LCD_DATA8 0x79
- MX7D_PAD_LCD_DATA09__LCD_DATA9 0x79
- MX7D_PAD_LCD_DATA10__LCD_DATA10 0x79
- MX7D_PAD_LCD_DATA11__LCD_DATA11 0x79
- MX7D_PAD_LCD_DATA12__LCD_DATA12 0x79
- MX7D_PAD_LCD_DATA13__LCD_DATA13 0x79
- MX7D_PAD_LCD_DATA14__LCD_DATA14 0x79
- MX7D_PAD_LCD_DATA15__LCD_DATA15 0x79
- MX7D_PAD_LCD_DATA16__LCD_DATA16 0x79
- MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79
+ MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79 /* SODIMM 76 */
+ MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79 /* SODIMM 70 */
+ MX7D_PAD_LCD_DATA02__LCD_DATA2 0x79 /* SODIMM 60 */
+ MX7D_PAD_LCD_DATA03__LCD_DATA3 0x79 /* SODIMM 58 */
+ MX7D_PAD_LCD_DATA04__LCD_DATA4 0x79 /* SODIMM 78 */
+ MX7D_PAD_LCD_DATA05__LCD_DATA5 0x79 /* SODIMM 72 */
+ MX7D_PAD_LCD_DATA06__LCD_DATA6 0x79 /* SODIMM 80 */
+ MX7D_PAD_LCD_DATA07__LCD_DATA7 0x79 /* SODIMM 46 */
+ MX7D_PAD_LCD_DATA08__LCD_DATA8 0x79 /* SODIMM 62 */
+ MX7D_PAD_LCD_DATA09__LCD_DATA9 0x79 /* SODIMM 48 */
+ MX7D_PAD_LCD_DATA10__LCD_DATA10 0x79 /* SODIMM 74 */
+ MX7D_PAD_LCD_DATA11__LCD_DATA11 0x79 /* SODIMM 50 */
+ MX7D_PAD_LCD_DATA12__LCD_DATA12 0x79 /* SODIMM 52 */
+ MX7D_PAD_LCD_DATA13__LCD_DATA13 0x79 /* SODIMM 54 */
+ MX7D_PAD_LCD_DATA14__LCD_DATA14 0x79 /* SODIMM 66 */
+ MX7D_PAD_LCD_DATA15__LCD_DATA15 0x79 /* SODIMM 64 */
+ MX7D_PAD_LCD_DATA16__LCD_DATA16 0x79 /* SODIMM 57 */
+ MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79 /* SODIMM 61 */
>;
};
pinctrl_lcdif_dat_24: lcdif-dat-24-grp {
fsl,pins = <
- MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79
- MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79
- MX7D_PAD_LCD_DATA20__LCD_DATA20 0x79
- MX7D_PAD_LCD_DATA21__LCD_DATA21 0x79
- MX7D_PAD_LCD_DATA22__LCD_DATA22 0x79
- MX7D_PAD_LCD_DATA23__LCD_DATA23 0x79
+ MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79 /* SODIMM 136 */
+ MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79 /* SODIMM 138 */
+ MX7D_PAD_LCD_DATA20__LCD_DATA20 0x79 /* SODIMM 140 */
+ MX7D_PAD_LCD_DATA21__LCD_DATA21 0x79 /* SODIMM 142 */
+ MX7D_PAD_LCD_DATA22__LCD_DATA22 0x79 /* SODIMM 144 */
+ MX7D_PAD_LCD_DATA23__LCD_DATA23 0x79 /* SODIMM 146 */
>;
};
pinctrl_lcdif_ctrl: lcdif-ctrl-grp {
fsl,pins = <
- MX7D_PAD_LCD_CLK__LCD_CLK 0x79
- MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79
- MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79
- MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79
+ MX7D_PAD_LCD_CLK__LCD_CLK 0x79 /* SODIMM 56 */
+ MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79 /* SODIMM 44 */
+ MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79 /* SODIMM 82 */
+ MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79 /* SODIMM 68 */
>;
};
@@ -897,70 +913,70 @@ MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 /* SODIMM 95 */
pinctrl_pwm1: pwm1-grp {
fsl,pins = <
- MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79
- MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x4
+ MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 /* SODIMM 59 */
+ MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x4 /* SODIMM 59 */
>;
};
pinctrl_pwm2: pwm2-grp {
fsl,pins = <
- MX7D_PAD_GPIO1_IO09__PWM2_OUT 0x79
+ MX7D_PAD_GPIO1_IO09__PWM2_OUT 0x79 /* SODIMM 28 */
>;
};
pinctrl_pwm3: pwm3-grp {
fsl,pins = <
- MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x79
+ MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x79 /* SODIMM 30 */
>;
};
pinctrl_pwm4: pwm4-grp {
fsl,pins = <
- MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79
- MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 0x4
+ MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79 /* SODIMM 67 */
+ MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 0x4 /* SODIMM 67 */
>;
};
pinctrl_uart1: uart1-grp {
fsl,pins = <
- MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX 0x79
- MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX 0x79
- MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS 0x79
- MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS 0x79
+ MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX 0x79 /* SODIMM 33 */
+ MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX 0x79 /* SODIMM 35 */
+ MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS 0x79 /* SODIMM 25 */
+ MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS 0x79 /* SODIMM 27 */
>;
};
pinctrl_uart1_ctrl1: uart1-ctrl1-grp {
fsl,pins = <
- MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x14 /* DCD */
- MX7D_PAD_SD2_DATA0__GPIO5_IO14 0x14 /* DTR */
+ MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x14 /* SODIMM 31 / DCD */
+ MX7D_PAD_SD2_DATA0__GPIO5_IO14 0x14 /* SODIMM 23 / DTR */
>;
};
pinctrl_uart2: uart2-grp {
fsl,pins = <
- MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX 0x79
- MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX 0x79
- MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS 0x79
- MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS 0x79
+ MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX 0x79 /* SODIMM 36 */
+ MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX 0x79 /* SODIMM 38 */
+ MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS 0x79 /* SODIMM 32 / CTS */
+ MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS 0x79 /* SODIMM 34 / RTS */
>;
};
pinctrl_uart3: uart3-grp {
fsl,pins = <
- MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX 0x79
- MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX 0x79
+ MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX 0x79 /* SODIMM 19 */
+ MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX 0x79 /* SODIMM 21 */
>;
};
pinctrl_usbc_det: gpio-usbc-det {
fsl,pins = <
- MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x14
+ MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x14 /* SODIMM 137 / USBC_DET */
>;
};
pinctrl_usbh_reg: gpio-usbh-vbus {
fsl,pins = <
- MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14 /* SODIMM 129 USBH PEN */
+ MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14 /* SODIMM 129 / USBH_PEN */
>;
};
@@ -1079,14 +1095,14 @@ &iomuxc_lpsr {
pinctrl_gpio_lpsr: gpio1-grp {
fsl,pins = <
- MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x59
- MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3 0x59
+ MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x59 /* SODIMM 135 */
+ MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3 0x59 /* SODIMM 22 */
>;
};
pinctrl_gpiokeys: gpiokeysgrp {
fsl,pins = <
- MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x19
+ MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x19 /* SODIMM 45 / WAKE_UP */
>;
};
@@ -1118,8 +1134,8 @@ MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0
pinctrl_uart1_ctrl2: uart1-ctrl2-grp {
fsl,pins = <
- MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 /* DSR */
- MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x14 /* RI */
+ MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 /* SODIMM 29 / DSR */
+ MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x14 /* SODIMM 37 / RI */
>;
};
};
diff --git a/arch/arm/boot/dts/imx7d-colibri-aster.dts b/arch/arm/boot/dts/imx7d-colibri-aster.dts
index cfd75e3424fa..90aaeddfb4f6 100644
--- a/arch/arm/boot/dts/imx7d-colibri-aster.dts
+++ b/arch/arm/boot/dts/imx7d-colibri-aster.dts
@@ -1,7 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2017-2022 Toradex
- *
*/
/dts-v1/;
@@ -35,6 +34,7 @@ &panel_dpi {
status = "okay";
};
+/* Colibri USBH */
&usbotg2 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts
index 7b4451699478..3ec9ef6baaa4 100644
--- a/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts
+++ b/arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts
@@ -16,6 +16,7 @@ / {
"fsl,imx7d";
};
+/* Colibri USBH */
&usbotg2 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts
index 3e84018392ee..6d505cb02aad 100644
--- a/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts
+++ b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts
@@ -15,6 +15,7 @@ / {
"fsl,imx7d";
};
+/* Colibri USBH */
&usbotg2 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi
index 2b4be7646631..2fb4d2133a1b 100644
--- a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi
+++ b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi
@@ -49,11 +49,13 @@ &gpio6 {
"SODIMM_34";
};
+/* Colibri USBH */
&usbotg2 {
dr_mode = "host";
vbus-supply = <®_usbh_vbus>;
};
+/* eMMC */
&usdhc3 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts
index 7aabe5691459..c7a8b5aa2408 100644
--- a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts
@@ -38,14 +38,19 @@ &panel_dpi {
status = "okay";
};
+/* Colibri PWM<B> */
&pwm2 {
+ /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */
status = "okay";
};
+/* Colibri PWM<C> */
&pwm3 {
+ /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */
status = "okay";
};
+/* Colibri USBH */
&usbotg2 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx7d-colibri.dtsi b/arch/arm/boot/dts/imx7d-colibri.dtsi
index d1469aa8b025..531a45b176a1 100644
--- a/arch/arm/boot/dts/imx7d-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7d-colibri.dtsi
@@ -23,10 +23,12 @@ &cpu1 {
cpu-supply = <®_DCDC2>;
};
+/* NAND */
&gpmi {
status = "okay";
};
+/* Colibri USBH */
&usbotg2 {
dr_mode = "host";
vbus-supply = <®_usbh_vbus>;
diff --git a/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts
index 6589c4179177..38de76630d6a 100644
--- a/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts
@@ -38,10 +38,14 @@ &panel_dpi {
status = "okay";
};
+/* Colibri PWM<B> */
&pwm2 {
+ /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */
status = "okay";
};
+/* Colibri PWM<C> */
&pwm3 {
+ /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx7s-colibri.dtsi b/arch/arm/boot/dts/imx7s-colibri.dtsi
index 2ce102b7f5d4..ef51395d3537 100644
--- a/arch/arm/boot/dts/imx7s-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7s-colibri.dtsi
@@ -13,6 +13,7 @@ memory@80000000 {
};
};
+/* NAND */
&gpmi {
status = "okay";
};
--
2.35.1
From: Stefan Agner <[email protected]>
Use the video PLL as clock source to assure proper pixel clock
generation.
Signed-off-by: Stefan Agner <[email protected]>
Signed-off-by: Marcel Ziswiler <[email protected]>
---
arch/arm/boot/dts/imx7-colibri.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index 074ebb0f8001..3c1cfd766645 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -441,6 +441,8 @@ atmel_mxt_ts: touchscreen@4a {
};
&lcdif {
+ assigned-clocks = <&clks IMX7D_LCDIF_PIXEL_ROOT_SRC>;
+ assigned-clock-parents = <&clks IMX7D_PLL_VIDEO_POST_DIV>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcdif_dat
&pinctrl_lcdif_ctrl>;
--
2.35.1
From: Marcel Ziswiler <[email protected]>
Clean-up iomuxc pinctrl group naming.
Signed-off-by: Marcel Ziswiler <[email protected]>
---
arch/arm/boot/dts/imx7-colibri.dtsi | 70 ++++++++++++++---------------
1 file changed, 35 insertions(+), 35 deletions(-)
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index 27706a2bc3c4..a8c31ee65623 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -667,13 +667,13 @@ MX7D_PAD_EPDC_DATA15__GPIO2_IO15 0x74 /* SODIMM 107 / INT */
>;
};
- pinctrl_can_int: can-int-grp {
+ pinctrl_can_int: canintgrp {
fsl,pins = <
MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0X14 /* SODIMM 73 */
>;
};
- pinctrl_ecspi3: ecspi3-grp {
+ pinctrl_ecspi3: ecspi3grp {
fsl,pins = <
MX7D_PAD_I2C1_SCL__ECSPI3_MISO 0x2 /* SODIMM 90 */
MX7D_PAD_I2C1_SDA__ECSPI3_MOSI 0x2 /* SODIMM 92 */
@@ -681,7 +681,7 @@ MX7D_PAD_I2C2_SCL__ECSPI3_SCLK 0x2 /* SODIMM 88 */
>;
};
- pinctrl_ecspi3_cs: ecspi3-cs-grp {
+ pinctrl_ecspi3_cs: ecspi3csgrp {
fsl,pins = <
MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14 /* SODIMM 86 */
>;
@@ -702,7 +702,7 @@ MX7D_PAD_SD2_WP__ENET1_MDC 0x3
>;
};
- pinctrl_enet1_sleep: enet1sleepgrp {
+ pinctrl_enet1_sleep: enet1-sleepgrp {
fsl,pins = <
MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0 0x0
MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1 0x0
@@ -717,21 +717,21 @@ MX7D_PAD_SD2_WP__GPIO5_IO10 0x0
>;
};
- pinctrl_flexcan1: flexcan1-grp {
+ pinctrl_flexcan1: flexcan1grp {
fsl,pins = <
MX7D_PAD_ENET1_RGMII_RD2__FLEXCAN1_RX 0x79 /* SODIMM 63 */
MX7D_PAD_ENET1_RGMII_RD3__FLEXCAN1_TX 0x79 /* SODIMM 55 */
>;
};
- pinctrl_flexcan2: flexcan2-grp {
+ pinctrl_flexcan2: flexcan2grp {
fsl,pins = <
MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x79 /* SODIMM 188 */
MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x79 /* SODIMM 178 */
>;
};
- pinctrl_gpio1: gpio1-grp {
+ pinctrl_gpio1: gpio1grp {
fsl,pins = <
MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x14 /* SODIMM 110 */
MX7D_PAD_EPDC_DATA00__GPIO2_IO0 0x14 /* SODIMM 111 */
@@ -774,7 +774,7 @@ MX7D_PAD_UART3_RTS_B__GPIO4_IO6 0x14 /* SODIMM 131 */
>;
};
- pinctrl_gpio2: gpio2-grp { /* On X22 Camera interface */
+ pinctrl_gpio2: gpio2grp { /* On X22 Camera interface */
fsl,pins = <
MX7D_PAD_ECSPI1_MISO__GPIO4_IO18 0x14 /* SODIMM 79 */
MX7D_PAD_ECSPI1_MOSI__GPIO4_IO17 0x14 /* SODIMM 103 */
@@ -791,7 +791,7 @@ MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x14 /* SODIMM 98 */
>;
};
- pinctrl_gpio3: gpio3-grp { /* LCD 18-23 */
+ pinctrl_gpio3: gpio3grp { /* LCD 18-23 */
fsl,pins = <
MX7D_PAD_LCD_DATA18__GPIO3_IO23 0x14 /* SODIMM 136 */
MX7D_PAD_LCD_DATA19__GPIO3_IO24 0x14 /* SODIMM 138 */
@@ -802,27 +802,27 @@ MX7D_PAD_LCD_DATA23__GPIO3_IO28 0x74 /* SODIMM 146 */
>;
};
- pinctrl_gpio4: gpio4-grp { /* Alternatively CAN2 */
+ pinctrl_gpio4: gpio4grp { /* Alternatively CAN2 */
fsl,pins = <
MX7D_PAD_GPIO1_IO14__GPIO1_IO14 0x14 /* SODIMM 188 */
MX7D_PAD_GPIO1_IO15__GPIO1_IO15 0x14 /* SODIMM 178 */
>;
};
- pinctrl_gpio7: gpio7-grp { /* Alternatively CAN1 */
+ pinctrl_gpio7: gpio7grp { /* Alternatively CAN1 */
fsl,pins = <
MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x14 /* SODIMM 63 */
MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x14 /* SODIMM 55 */
>;
};
- pinctrl_gpio_bl_on: gpio-bl-on {
+ pinctrl_gpio_bl_on: gpioblongrp {
fsl,pins = <
MX7D_PAD_SD1_WP__GPIO5_IO1 0x14 /* SODIMM 71 */
>;
};
- pinctrl_gpmi_nand: gpmi-nand-grp {
+ pinctrl_gpmi_nand: gpminandgrp {
fsl,pins = <
MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B 0x71
MX7D_PAD_SAI1_TX_DATA__NAND_READY_B 0x74
@@ -841,13 +841,13 @@ MX7D_PAD_SD3_STROBE__NAND_RE_B 0x71
>;
};
- pinctrl_i2c1_int: i2c1-int-grp { /* PMIC / TOUCH */
+ pinctrl_i2c1_int: i2c1intgrp { /* PMIC / TOUCH */
fsl,pins = <
MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x79
>;
};
- pinctrl_i2c4: i2c4-grp {
+ pinctrl_i2c4: i2c4grp {
fsl,pins = <
MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000007f /* SODIMM 196 */
MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f /* SODIMM 194 */
@@ -861,7 +861,7 @@ MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9 0x4000007f
>;
};
- pinctrl_lcdif_dat: lcdif-dat-grp {
+ pinctrl_lcdif_dat: lcdifdatgrp {
fsl,pins = <
MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79 /* SODIMM 76 */
MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79 /* SODIMM 70 */
@@ -884,7 +884,7 @@ MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79 /* SODIMM 61 */
>;
};
- pinctrl_lcdif_dat_24: lcdif-dat-24-grp {
+ pinctrl_lcdif_dat_24: lcdifdat24grp {
fsl,pins = <
MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79 /* SODIMM 136 */
MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79 /* SODIMM 138 */
@@ -895,7 +895,7 @@ MX7D_PAD_LCD_DATA23__LCD_DATA23 0x79 /* SODIMM 146 */
>;
};
- pinctrl_lcdif_ctrl: lcdif-ctrl-grp {
+ pinctrl_lcdif_ctrl: lcdifctrlgrp {
fsl,pins = <
MX7D_PAD_LCD_CLK__LCD_CLK 0x79 /* SODIMM 56 */
MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79 /* SODIMM 44 */
@@ -913,33 +913,33 @@ MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 /* SODIMM 95 */
>;
};
- pinctrl_pwm1: pwm1-grp {
+ pinctrl_pwm1: pwm1grp {
fsl,pins = <
MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x4 /* SODIMM 59 */
MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 /* SODIMM 59 */
>;
};
- pinctrl_pwm2: pwm2-grp {
+ pinctrl_pwm2: pwm2grp {
fsl,pins = <
MX7D_PAD_GPIO1_IO09__PWM2_OUT 0x79 /* SODIMM 28 */
>;
};
- pinctrl_pwm3: pwm3-grp {
+ pinctrl_pwm3: pwm3grp {
fsl,pins = <
MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x79 /* SODIMM 30 */
>;
};
- pinctrl_pwm4: pwm4-grp {
+ pinctrl_pwm4: pwm4grp {
fsl,pins = <
MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 0x4 /* SODIMM 67 */
MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79 /* SODIMM 67 */
>;
};
- pinctrl_uart1: uart1-grp {
+ pinctrl_uart1: uart1grp {
fsl,pins = <
MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS 0x79 /* SODIMM 25 */
MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS 0x79 /* SODIMM 27 */
@@ -948,14 +948,14 @@ MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX 0x79 /* SODIMM 33 */
>;
};
- pinctrl_uart1_ctrl1: uart1-ctrl1-grp {
+ pinctrl_uart1_ctrl1: uart1ctrl1grp {
fsl,pins = <
MX7D_PAD_SD2_DATA0__GPIO5_IO14 0x14 /* SODIMM 23 / DTR */
MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x14 /* SODIMM 31 / DCD */
>;
};
- pinctrl_uart2: uart2-grp {
+ pinctrl_uart2: uart2grp {
fsl,pins = <
MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS 0x79 /* SODIMM 32 / CTS */
MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS 0x79 /* SODIMM 34 / RTS */
@@ -963,20 +963,20 @@ MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX 0x79 /* SODIMM 38 */
MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX 0x79 /* SODIMM 36 */
>;
};
- pinctrl_uart3: uart3-grp {
+ pinctrl_uart3: uart3grp {
fsl,pins = <
MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX 0x79 /* SODIMM 21 */
MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX 0x79 /* SODIMM 19 */
>;
};
- pinctrl_usbc_det: gpio-usbc-det {
+ pinctrl_usbc_det: usbcdetgrp {
fsl,pins = <
MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x14 /* SODIMM 137 / USBC_DET */
>;
};
- pinctrl_usbh_reg: gpio-usbh-vbus {
+ pinctrl_usbh_reg: usbhreggrp {
fsl,pins = <
MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14 /* SODIMM 129 / USBH_PEN */
>;
@@ -1043,7 +1043,7 @@ MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
>;
};
- pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
+ pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
fsl,pins = <
MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
@@ -1059,7 +1059,7 @@ MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a
>;
};
- pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
+ pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
fsl,pins = <
MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
@@ -1075,7 +1075,7 @@ MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b
>;
};
- pinctrl_sai1: sai1-grp {
+ pinctrl_sai1: sai1grp {
fsl,pins = <
MX7D_PAD_ENET1_COL__SAI1_TX_DATA0 0x30
MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f
@@ -1084,7 +1084,7 @@ MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x1f
>;
};
- pinctrl_sai1_mclk: sai1grp_mclk {
+ pinctrl_sai1_mclk: sai1mclkgrp {
fsl,pins = <
MX7D_PAD_SAI1_MCLK__SAI1_MCLK 0x1f
>;
@@ -1107,7 +1107,7 @@ MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0
>;
};
- pinctrl_gpio_lpsr: gpio1-grp {
+ pinctrl_gpio_lpsr: gpiolpsrgrp {
fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x59 /* SODIMM 135 */
MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3 0x59 /* SODIMM 22 */
@@ -1120,7 +1120,7 @@ MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x19 /* SODIMM 45 / WAKE_UP */
>;
};
- pinctrl_i2c1: i2c1-grp {
+ pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO04__I2C1_SCL 0x4000007f
MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA 0x4000007f
@@ -1134,7 +1134,7 @@ MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x4000007f
>;
};
- pinctrl_uart1_ctrl2: uart1-ctrl2-grp {
+ pinctrl_uart1_ctrl2: uart1ctrl2grp {
fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x14 /* SODIMM 37 / RI */
MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 /* SODIMM 29 / DSR */
--
2.35.1
From: Marcel Ziswiler <[email protected]>
Add the MDIO bus with the respective PHY to allow for making changes to
that easier.
While at it also alphabetically re-order properties and improve
indentation.
Signed-off-by: Marcel Ziswiler <[email protected]>
---
arch/arm/boot/dts/imx7-colibri.dtsi | 35 ++++++++++++++++++++---------
1 file changed, 24 insertions(+), 11 deletions(-)
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index e20b0977f38f..074ebb0f8001 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -83,21 +83,34 @@ &ecspi3 {
};
&fec1 {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&pinctrl_enet1>;
- pinctrl-1 = <&pinctrl_enet1_sleep>;
- clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
- <&clks IMX7D_ENET_AXI_ROOT_CLK>,
- <&clks IMX7D_ENET1_TIME_ROOT_CLK>,
- <&clks IMX7D_PLL_ENET_MAIN_50M_CLK>;
- clock-names = "ipg", "ahb", "ptp", "enet_clk_ref";
- assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
- <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
assigned-clock-rates = <0>, <100000000>;
+ assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
+ <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
+ clock-names = "ipg", "ahb", "ptp", "enet_clk_ref";
+ clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
+ <&clks IMX7D_ENET_AXI_ROOT_CLK>,
+ <&clks IMX7D_ENET1_TIME_ROOT_CLK>,
+ <&clks IMX7D_PLL_ENET_MAIN_50M_CLK>;
+ fsl,magic-packet;
+ phy-handle = <ðphy0>;
phy-mode = "rmii";
phy-supply = <®_LDO1>;
- fsl,magic-packet;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_enet1>;
+ pinctrl-1 = <&pinctrl_enet1_sleep>;
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ max-speed = <100>;
+ micrel,led-mode = <0>;
+ reg = <0>;
+ };
+ };
};
&flexcan1 {
--
2.35.1
From: Marcel Ziswiler <[email protected]>
Move I2C RTC to module-level to be enabled on carrier board-level.
Signed-off-by: Marcel Ziswiler <[email protected]>
---
arch/arm/boot/dts/imx7-colibri-aster.dtsi | 11 +++++------
arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 11 +++++------
arch/arm/boot/dts/imx7-colibri.dtsi | 7 +++++++
3 files changed, 17 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi
index f3a5cb7d6a0c..9796bfabe241 100644
--- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi
@@ -21,12 +21,6 @@ &fec1 {
&i2c4 {
status = "okay";
-
- /* M41T0M6 real time clock on carrier board */
- rtc: rtc@68 {
- compatible = "st,m41t0";
- reg = <0x68>;
- };
};
&pwm1 {
@@ -45,6 +39,11 @@ &pwm4 {
status = "okay";
};
+/* M41T0M6 real time clock */
+&rtc {
+ status = "okay";
+};
+
&uart1 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
index 618831e89ce8..e3aac56aece8 100644
--- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
@@ -56,12 +56,6 @@ &fec1 {
&i2c4 {
status = "okay";
-
- /* M41T0M6 real time clock on carrier board */
- rtc: rtc@68 {
- compatible = "st,m41t0";
- reg = <0x68>;
- };
};
&pwm1 {
@@ -80,6 +74,11 @@ &pwm4 {
status = "okay";
};
+/* M41T0M6 real time clock */
+&rtc {
+ status = "okay";
+};
+
&uart1 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index 3da9ddc06aae..da3df00c7d67 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -507,6 +507,13 @@ atmel_mxt_ts: touchscreen@4a {
reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* SODIMM 106 / RST */
status = "disabled";
};
+
+ /* M41T0M6 real time clock on carrier board */
+ rtc: rtc@68 {
+ compatible = "st,m41t0";
+ reg = <0x68>;
+ status = "disabled";
+ };
};
&lcdif {
--
2.35.1
From: Marcel Ziswiler <[email protected]>
Move aliases, chosen, extcon and gpio-keys to module-level device tree
given they are standard Colibri functionalities.
Signed-off-by: Marcel Ziswiler <[email protected]>
---
arch/arm/boot/dts/imx7-colibri-aster.dtsi | 18 ------------
arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 31 --------------------
arch/arm/boot/dts/imx7-colibri.dtsi | 32 +++++++++++++++++++++
3 files changed, 32 insertions(+), 49 deletions(-)
diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi
index 9148c54403f3..c12de1861c05 100644
--- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi
@@ -4,24 +4,6 @@
*/
/ {
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- gpio-keys {
- compatible = "gpio-keys";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpiokeys>;
-
- power {
- label = "Wake-Up";
- gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
- linux,code = <KEY_WAKEUP>;
- debounce-interval = <10>;
- wakeup-source;
- };
- };
-
reg_3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "3.3V";
diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
index 4a7e593e9ac6..2e6678f81af6 100644
--- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
@@ -4,15 +4,6 @@
*/
/ {
- aliases {
- rtc0 = &rtc;
- rtc1 = &snvs_rtc;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
/* fixed crystal dedicated to mpc258x */
clk16m: clk16m {
compatible = "fixed-clock";
@@ -20,27 +11,6 @@ clk16m: clk16m {
clock-frequency = <16000000>;
};
- extcon_usbc_det: usbc-det {
- compatible = "linux,extcon-usb-gpio";
- id-gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usbc_det>;
- };
-
- gpio-keys {
- compatible = "gpio-keys";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpiokeys>;
-
- power {
- label = "Wake-Up";
- gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
- linux,code = <KEY_WAKEUP>;
- debounce-interval = <10>;
- wakeup-source;
- };
- };
-
reg_3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "3.3V";
@@ -148,7 +118,6 @@ &uart3 {
};
&usbotg1 {
- extcon = <0>, <&extcon_usbc_det>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index fa615379a117..c5a58949d664 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -6,6 +6,11 @@
#include <dt-bindings/pwm/pwm.h>
/ {
+ aliases {
+ rtc0 = &rtc;
+ rtc1 = &snvs_rtc;
+ };
+
backlight: backlight {
brightness-levels = <0 45 63 88 119 158 203 255>;
compatible = "pwm-backlight";
@@ -18,6 +23,32 @@ backlight: backlight {
status = "disabled";
};
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ extcon_usbc_det: usbc-det {
+ compatible = "linux,extcon-usb-gpio";
+ debounce = <25>;
+ id-gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>; /* SODIMM 137 / USBC_DET */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbc_det>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpiokeys>;
+
+ wakeup {
+ debounce-interval = <10>;
+ gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* SODIMM 45 */
+ label = "Wake-Up";
+ linux,code = <KEY_WAKEUP>;
+ wakeup-source;
+ };
+ };
+
panel_dpi: panel-dpi {
backlight = <&backlight>;
compatible = "edt,et057090dhu";
@@ -513,6 +544,7 @@ &uart3 {
&usbotg1 {
dr_mode = "otg";
+ extcon = <0>, <&extcon_usbc_det>;
};
&usdhc1 {
--
2.35.1
From: Marcel Ziswiler <[email protected]>
Rename display interface to match other modules to make it easier to
use device tree overlays.
The parallel RGB interface (lcdif) and all related stuff turn on in a
device tree overlay. Keep them disabled in the main devicetree.
As these subsystems are provided by module and not a part of boards,
move their definitions into the module-level devicetree.
Disable ad7879 touchscreen which turns on in a devic tree overlay.
Remains it disabled in the main devicetree.
Move Atmel MXT capacitive touch controller device tree nodes from
carrier board to module level and add iomux pinctl groups for both the
Capacitive Touch Adapter (using SODIMM 28/30) and the capacitive touch
connector as found on later carrier boards (using SODIMM 106/107).
Keep touchscreen and display nodes enabled for NAND based i.MX 7
modules, since device tree overlays are not yet supported. For the
Colibri Evaluation Board keep the Capacitive Touch Adapter node
disabled and PWM2, PWM3 enabled instead.
For eMMC based modules keep nodes disabled to work in conjunction with
device tree overlays.
Add the iomuxc pinctrl group for the LVDS transceiver related signals to
use it in a device tree overlay.
While at it also alphabetically re=order them properties.
Signed-off-by: Marcel Ziswiler <[email protected]>
---
arch/arm/boot/dts/imx7-colibri-aster.dtsi | 53 ------------
arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 66 +++-----------
arch/arm/boot/dts/imx7-colibri.dtsi | 95 ++++++++++++++++++---
arch/arm/boot/dts/imx7d-colibri-aster.dts | 20 +++++
arch/arm/boot/dts/imx7d-colibri-eval-v3.dts | 32 +++++++
arch/arm/boot/dts/imx7s-colibri-aster.dts | 20 +++++
arch/arm/boot/dts/imx7s-colibri-eval-v3.dts | 32 +++++++
7 files changed, 197 insertions(+), 121 deletions(-)
diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi
index b770fc937970..950b4e5f6cf4 100644
--- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi
@@ -4,10 +4,6 @@
*
*/
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/pwm/pwm.h>
-
/ {
chosen {
stdout-path = "serial0:115200n8";
@@ -27,18 +23,6 @@ power {
};
};
- panel: panel {
- compatible = "edt,et057090dhu";
- backlight = <&bl>;
- power-supply = <®_3v3>;
-
- port {
- panel_in: endpoint {
- remote-endpoint = <&lcdif_out>;
- };
- };
- };
-
reg_3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "3.3V";
@@ -77,13 +61,6 @@ &adc2 {
status = "disabled";
};
-&bl {
- brightness-levels = <0 4 8 16 32 64 128 255>;
- default-brightness-level = <6>;
- power-supply = <®_3v3>;
- status = "okay";
-};
-
&fec1 {
status = "okay";
};
@@ -91,17 +68,6 @@ &fec1 {
&i2c4 {
status = "okay";
- /* Microchip/Atmel maxtouch controller */
- touchscreen@4a {
- compatible = "atmel,maxtouch";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpiotouch>;
- reg = <0x4a>;
- interrupt-parent = <&gpio2>;
- interrupts = <15 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 107 */
- reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* SODIMM 106 */
- };
-
/* M41T0M6 real time clock on carrier board */
rtc: rtc@68 {
compatible = "st,m41t0";
@@ -109,25 +75,6 @@ rtc: rtc@68 {
};
};
-&iomuxc {
- pinctrl_gpiotouch: touchgpios {
- fsl,pins = <
- MX7D_PAD_EPDC_DATA15__GPIO2_IO15 0x74
- MX7D_PAD_EPDC_BDR0__GPIO2_IO28 0x14
- >;
- };
-};
-
-&lcdif {
- status = "okay";
-
- port {
- lcdif_out: endpoint {
- remote-endpoint = <&panel_in>;
- };
- };
-};
-
&pwm1 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
index 3b9df8c82ae3..d6fa74222960 100644
--- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
@@ -34,18 +34,6 @@ power {
};
};
- panel: panel {
- compatible = "edt,et057090dhu";
- backlight = <&bl>;
- power-supply = <®_3v3>;
-
- port {
- panel_in: endpoint {
- remote-endpoint = <&lcdif_out>;
- };
- };
- };
-
reg_3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "3.3V";
@@ -72,14 +60,6 @@ reg_usbh_vbus: regulator-usbh-vbus {
};
};
-&bl {
- brightness-levels = <0 4 8 16 32 64 128 255>;
- default-brightness-level = <6>;
- power-supply = <®_3v3>;
-
- status = "okay";
-};
-
&adc1 {
status = "okay";
};
@@ -88,6 +68,18 @@ &adc2 {
status = "okay";
};
+/*
+ * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM<B>, PWM<C>, aka pwm2, pwm3.
+ * So if you enable following capacitive touch controller, disable pwm2/pwm3 first.
+ */
+&atmel_mxt_ts {
+ interrupt-parent = <&gpio1>;
+ interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 / INT */
+ pinctrl-0 = <&pinctrl_atmel_adapter>;
+ reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; /* SODIMM 30 / RST */
+ status = "disabled";
+};
+
&ecspi3 {
status = "okay";
@@ -113,21 +105,6 @@ &fec1 {
&i2c4 {
status = "okay";
- /*
- * Touchscreen is using SODIMM 28/30, also used for PWM<B>, PWM<C>,
- * aka pwm2, pwm3. so if you enable touchscreen, disable the pwms
- */
- touchscreen@4a {
- compatible = "atmel,maxtouch";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpiotouch>;
- reg = <0x4a>;
- interrupt-parent = <&gpio1>;
- interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 */
- reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; /* SODIMM 30 */
- status = "disabled";
- };
-
/* M41T0M6 real time clock on carrier board */
rtc: rtc@68 {
compatible = "st,m41t0";
@@ -135,16 +112,6 @@ rtc: rtc@68 {
};
};
-&lcdif {
- status = "okay";
-
- port {
- lcdif_out: endpoint {
- remote-endpoint = <&panel_in>;
- };
- };
-};
-
&pwm1 {
status = "okay";
};
@@ -183,12 +150,3 @@ &usdhc1 {
vmmc-supply = <®_3v3>;
status = "okay";
};
-
-&iomuxc {
- pinctrl_gpiotouch: touchgpios {
- fsl,pins = <
- MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x74
- MX7D_PAD_GPIO1_IO10__GPIO1_IO10 0x14
- >;
- };
-};
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index f1c60b0cb143..e20b0977f38f 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -3,13 +3,32 @@
* Copyright 2016-2020 Toradex
*/
+#include <dt-bindings/pwm/pwm.h>
+
/ {
- bl: backlight {
+ backlight: backlight {
+ brightness-levels = <0 45 63 88 119 158 203 255>;
compatible = "pwm-backlight";
+ default-brightness-level = <4>;
+ enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_bl_on>;
- pwms = <&pwm1 0 5000000 0>;
- enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
+ power-supply = <®_module_3v3>;
+ pwms = <&pwm1 0 6666667 PWM_POLARITY_INVERTED>;
+ status = "disabled";
+ };
+
+ panel_dpi: panel-dpi {
+ backlight = <&backlight>;
+ compatible = "edt,et057090dhu";
+ power-supply = <®_3v3>;
+ status = "disabled";
+
+ port {
+ lcd_panel_in: endpoint {
+ remote-endpoint = <&lcdif_out>;
+ };
+ };
};
reg_module_3v3: regulator-module-3v3 {
@@ -301,18 +320,19 @@ codec: sgtl5000@a {
VDDD-supply = <®_DCDC3>;
};
- ad7879@2c {
+ ad7879_ts: touchscreen@2c {
+ adi,acquisition-time = /bits/ 8 <1>;
+ adi,averaging = /bits/ 8 <1>;
+ adi,conversion-interval = /bits/ 8 <255>;
+ adi,first-conversion-delay = /bits/ 8 <3>;
+ adi,median-filter-size = /bits/ 8 <2>;
+ adi,resistance-plate-x = <120>;
compatible = "adi,ad7879-1";
- reg = <0x2c>;
interrupt-parent = <&gpio1>;
interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
+ reg = <0x2c>;
touchscreen-max-pressure = <4096>;
- adi,resistance-plate-x = <120>;
- adi,first-conversion-delay = /bits/ 8 <3>;
- adi,acquisition-time = /bits/ 8 <1>;
- adi,median-filter-size = /bits/ 8 <2>;
- adi,averaging = /bits/ 8 <1>;
- adi,conversion-interval = /bits/ 8 <255>;
+ status = "disabled";
};
pmic@33 {
@@ -392,12 +412,32 @@ &i2c4 {
pinctrl-1 = <&pinctrl_i2c4_recovery>;
scl-gpios = <&gpio7 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio7 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ status = "disabled";
+
+ /* Atmel maxtouch controller */
+ atmel_mxt_ts: touchscreen@4a {
+ compatible = "atmel,maxtouch";
+ interrupt-parent = <&gpio2>;
+ interrupts = <15 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 107 / INT */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_atmel_connector>;
+ reg = <0x4a>;
+ reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* SODIMM 106 / RST */
+ status = "disabled";
+ };
};
&lcdif {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcdif_dat
&pinctrl_lcdif_ctrl>;
+ status = "disabled";
+
+ port {
+ lcdif_out: endpoint {
+ remote-endpoint = <&lcd_panel_in>;
+ };
+ };
};
&pwm1 {
@@ -486,7 +526,27 @@ &usdhc3 {
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 &pinctrl_gpio4
- &pinctrl_gpio7 &pinctrl_usbc_det>;
+ &pinctrl_usbc_det>;
+
+ /*
+ * Atmel MXT touchsceen + Capacitive Touch Adapter
+ * NOTE: This pin group conflicts with pin groups pinctrl_pwm2/pinctrl_pwm3.
+ * Don't use them simultaneously.
+ */
+ pinctrl_atmel_adapter: atmelconnectorgrp {
+ fsl,pins = <
+ MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x74 /* SODIMM 28 / INT */
+ MX7D_PAD_GPIO1_IO10__GPIO1_IO10 0x14 /* SODIMM 30 / RST */
+ >;
+ };
+
+ /* Atmel MXT touchsceen + boards with built-in Capacitive Touch Connector */
+ pinctrl_atmel_connector: atmeladaptergrp {
+ fsl,pins = <
+ MX7D_PAD_EPDC_BDR0__GPIO2_IO28 0x14 /* SODIMM 106 / RST */
+ MX7D_PAD_EPDC_DATA15__GPIO2_IO15 0x74 /* SODIMM 107 / INT */
+ >;
+ };
pinctrl_gpio1: gpio1-grp {
fsl,pins = <
@@ -494,8 +554,6 @@ MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0x14 /* SODIMM 77 */
MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x14 /* SODIMM 89 */
MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x74 /* SODIMM 91 */
MX7D_PAD_LCD_RESET__GPIO3_IO4 0x14 /* SODIMM 93 */
- MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 /* SODIMM 95 */
- MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11 0x14 /* SODIMM 99 */
MX7D_PAD_EPDC_DATA10__GPIO2_IO10 0x74 /* SODIMM 105 */
MX7D_PAD_EPDC_DATA00__GPIO2_IO0 0x14 /* SODIMM 111 */
MX7D_PAD_EPDC_DATA01__GPIO2_IO1 0x14 /* SODIMM 113 */
@@ -729,6 +787,15 @@ MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79
>;
};
+ pinctrl_lvds_transceiver: lvdstx {
+ fsl,pins = <
+ MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x14 /* SODIMM 63 */
+ MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x74 /* SODIMM 55 */
+ MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11 0x14 /* SODIMM 99 */
+ MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 /* SODIMM 95 */
+ >;
+ };
+
pinctrl_pwm1: pwm1-grp {
fsl,pins = <
MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79
diff --git a/arch/arm/boot/dts/imx7d-colibri-aster.dts b/arch/arm/boot/dts/imx7d-colibri-aster.dts
index f3f0537d5a37..ce0e6bb7db37 100644
--- a/arch/arm/boot/dts/imx7d-colibri-aster.dts
+++ b/arch/arm/boot/dts/imx7d-colibri-aster.dts
@@ -14,6 +14,26 @@ / {
"fsl,imx7d";
};
+&ad7879_ts {
+ status = "okay";
+};
+
+&atmel_mxt_ts {
+ status = "okay";
+};
+
+&backlight {
+ status = "okay";
+};
+
+&lcdif {
+ status = "okay";
+};
+
+&panel_dpi {
+ status = "okay";
+};
+
&usbotg2 {
vbus-supply = <®_usbh_vbus>;
status = "okay";
diff --git a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts
index 87b132bcd272..c610c50c003a 100644
--- a/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/imx7d-colibri-eval-v3.dts
@@ -13,6 +13,38 @@ / {
"fsl,imx7d";
};
+&ad7879_ts {
+ status = "okay";
+};
+
+/*
+ * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM<B>, PWM<C>, aka pwm2, pwm3.
+ * So if you enable following capacitive touch controller, disable pwm2/pwm3 first.
+ */
+&atmel_mxt_ts {
+ status = "disabled";
+};
+
+&backlight {
+ status = "okay";
+};
+
+&lcdif {
+ status = "okay";
+};
+
+&panel_dpi {
+ status = "okay";
+};
+
+&pwm2 {
+ status = "okay";
+};
+
+&pwm3 {
+ status = "okay";
+};
+
&usbotg2 {
vbus-supply = <®_usbh_vbus>;
status = "okay";
diff --git a/arch/arm/boot/dts/imx7s-colibri-aster.dts b/arch/arm/boot/dts/imx7s-colibri-aster.dts
index fca4e0a95c1b..87f9e0e079a8 100644
--- a/arch/arm/boot/dts/imx7s-colibri-aster.dts
+++ b/arch/arm/boot/dts/imx7s-colibri-aster.dts
@@ -13,3 +13,23 @@ / {
compatible = "toradex,colibri-imx7s-aster", "toradex,colibri-imx7s",
"fsl,imx7s";
};
+
+&ad7879_ts {
+ status = "okay";
+};
+
+&atmel_mxt_ts {
+ status = "okay";
+};
+
+&backlight {
+ status = "okay";
+};
+
+&lcdif {
+ status = "okay";
+};
+
+&panel_dpi {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts b/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts
index aa70d3f2e2e2..81956c16b95b 100644
--- a/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/imx7s-colibri-eval-v3.dts
@@ -12,3 +12,35 @@ / {
compatible = "toradex,colibri-imx7s-eval-v3", "toradex,colibri-imx7s",
"fsl,imx7s";
};
+
+&ad7879_ts {
+ status = "okay";
+};
+
+/*
+ * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM<B>, PWM<C>, aka pwm2, pwm3.
+ * So if you enable following capacitive touch controller, disable pwm2/pwm3 first.
+ */
+&atmel_mxt_ts {
+ status = "disabled";
+};
+
+&backlight {
+ status = "okay";
+};
+
+&lcdif {
+ status = "okay";
+};
+
+&panel_dpi {
+ status = "okay";
+};
+
+&pwm2 {
+ status = "okay";
+};
+
+&pwm3 {
+ status = "okay";
+};
--
2.35.1
From: Marcel Ziswiler <[email protected]>
Add Colibri SSP aka SPI chip select (CS) aka slave select (SS) pins as
either used on Arduino UNO compatible header X18 or Raspberry Pi
compatible header X20.
Signed-off-by: Marcel Ziswiler <[email protected]>
---
arch/arm/boot/dts/imx7-colibri-aster.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi
index a89c868ff3ed..117965705814 100644
--- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi
@@ -7,6 +7,16 @@ &adc1 {
status = "okay";
};
+/* Colibri SSP */
+&ecspi3 {
+ cs-gpios = <
+ &gpio4 11 GPIO_ACTIVE_LOW /* SODIMM 86 / regular SSPFRM as UNO_SPI_CS or */
+ &gpio4 23 GPIO_ACTIVE_LOW /* SODIMM 65 / already muxed pinctrl_gpio2 as SPI_CE0_N */
+ &gpio4 22 GPIO_ACTIVE_LOW /* SODIMM 85 / already muxed pinctrl_gpio2 as SPI_CE1_N */
+ >;
+ status = "okay";
+};
+
&fec1 {
status = "okay";
};
--
2.35.1
On 06/05/2022 17:56, Marcel Ziswiler wrote:
> From: Marcel Ziswiler <[email protected]>
>
> Based on toradex,colibri-imx7s, toradex,colibri-imx7d and
> toradex,colibri-imx7d-emmc module device trees add iris and iris-v2 for
> carrier board dts.
>
> Signed-off-by: Marcel Ziswiler <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof