From: Matthew Gerlach <[email protected]>
Add device tree bindings documentation for the Intel Hard
Processor System (HPS) Copy Engine.
Signed-off-by: Matthew Gerlach <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
---
v5:
- add Reviewed-by: Krzysztof Kozlowski
v4:
- move from soc to soc/intel/
v3:
- remove unused label
- move from misc to soc
- remove 0x from #address-cells/#size-cells values
- change hps_cp_eng@0 to dma-controller@0
- remote inaccurate 'items:' tag
---
.../soc/intel/intel,hps-copy-engine.yaml | 51 +++++++++++++++++++
1 file changed, 51 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/intel/intel,hps-copy-engine.yaml
diff --git a/Documentation/devicetree/bindings/soc/intel/intel,hps-copy-engine.yaml b/Documentation/devicetree/bindings/soc/intel/intel,hps-copy-engine.yaml
new file mode 100644
index 000000000000..8634865015cd
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/intel/intel,hps-copy-engine.yaml
@@ -0,0 +1,51 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright (C) 2022, Intel Corporation
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/soc/intel/intel,hps-copy-engine.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Intel HPS Copy Engine
+
+maintainers:
+ - Matthew Gerlach <[email protected]>
+
+description: |
+ The Intel Hard Processor System (HPS) Copy Engine is an IP block used to copy
+ a bootable image from host memory to HPS DDR. Additionally, there is a
+ register the HPS can use to indicate the state of booting the copied image as
+ well as a keep-a-live indication to the host.
+
+properties:
+ compatible:
+ const: intel,hps-copy-engine
+
+ '#dma-cells':
+ const: 1
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ bus@80000000 {
+ compatible = "simple-bus";
+ reg = <0x80000000 0x60000000>,
+ <0xf9000000 0x00100000>;
+ reg-names = "axi_h2f", "axi_h2f_lw";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges = <0x00000000 0x00000000 0xf9000000 0x00001000>;
+
+ dma-controller@0 {
+ compatible = "intel,hps-copy-engine";
+ reg = <0x00000000 0x00000000 0x00001000>;
+ #dma-cells = <1>;
+ };
+ };
--
2.25.1