The I2C controllers in the A100 SoC are newer-generation hardware
which includes an offload engine. Signify that by including the
allwinner,sun8i-v536-i2c fallback compatible, as V536 is the first
SoC with this generation of I2C controller.
Signed-off-by: Samuel Holland <[email protected]>
---
arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi
index f6d7d7f7fdab..548539c93ab0 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi
@@ -203,6 +203,7 @@ uart4: serial@5001000 {
i2c0: i2c@5002000 {
compatible = "allwinner,sun50i-a100-i2c",
+ "allwinner,sun8i-v536-i2c",
"allwinner,sun6i-a31-i2c";
reg = <0x05002000 0x400>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
@@ -215,6 +216,7 @@ i2c0: i2c@5002000 {
i2c1: i2c@5002400 {
compatible = "allwinner,sun50i-a100-i2c",
+ "allwinner,sun8i-v536-i2c",
"allwinner,sun6i-a31-i2c";
reg = <0x05002400 0x400>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
@@ -227,6 +229,7 @@ i2c1: i2c@5002400 {
i2c2: i2c@5002800 {
compatible = "allwinner,sun50i-a100-i2c",
+ "allwinner,sun8i-v536-i2c",
"allwinner,sun6i-a31-i2c";
reg = <0x05002800 0x400>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
@@ -239,6 +242,7 @@ i2c2: i2c@5002800 {
i2c3: i2c@5002c00 {
compatible = "allwinner,sun50i-a100-i2c",
+ "allwinner,sun8i-v536-i2c",
"allwinner,sun6i-a31-i2c";
reg = <0x05002c00 0x400>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
@@ -315,6 +319,7 @@ r_uart: serial@7080000 {
r_i2c0: i2c@7081400 {
compatible = "allwinner,sun50i-a100-i2c",
+ "allwinner,sun8i-v536-i2c",
"allwinner,sun6i-a31-i2c";
reg = <0x07081400 0x400>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
@@ -329,6 +334,7 @@ r_i2c0: i2c@7081400 {
r_i2c1: i2c@7081800 {
compatible = "allwinner,sun50i-a100-i2c",
+ "allwinner,sun8i-v536-i2c",
"allwinner,sun6i-a31-i2c";
reg = <0x07081800 0x400>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
--
2.35.1
Dne sobota, 02. julij 2022 ob 07:25:43 CEST je Samuel Holland napisal(a):
> The I2C controllers in the A100 SoC are newer-generation hardware
> which includes an offload engine. Signify that by including the
> allwinner,sun8i-v536-i2c fallback compatible, as V536 is the first
> SoC with this generation of I2C controller.
>
> Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Jernej Skrabec <[email protected]>
Best regards,
Jernej
Dne torek, 05. julij 2022 ob 21:45:31 CEST je Jernej Škrabec napisal(a):
> Dne sobota, 02. julij 2022 ob 07:25:43 CEST je Samuel Holland napisal(a):
> > The I2C controllers in the A100 SoC are newer-generation hardware
> > which includes an offload engine. Signify that by including the
> > allwinner,sun8i-v536-i2c fallback compatible, as V536 is the first
> > SoC with this generation of I2C controller.
> >
> > Signed-off-by: Samuel Holland <[email protected]>
>
> Reviewed-by: Jernej Skrabec <[email protected]>
Applied, thanks!
Best regards,
Jernej