Add the 5 instances of spi busses supported by the stm32mp131.
Signed-off-by: Alain Volmat <[email protected]>
---
arch/arm/boot/dts/stm32mp131.dtsi | 70 +++++++++++++++++++++++++++++++
1 file changed, 70 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi
index da9e8a6ca663..db3d1b900d5c 100644
--- a/arch/arm/boot/dts/stm32mp131.dtsi
+++ b/arch/arm/boot/dts/stm32mp131.dtsi
@@ -97,6 +97,34 @@ scmi_shm: scmi-sram@0 {
};
};
+ spi2: spi@4000b000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32h7-spi";
+ reg = <0x4000b000 0x400>;
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc SPI2_K>;
+ resets = <&rcc SPI2_R>;
+ dmas = <&dmamux1 39 0x400 0x01>,
+ <&dmamux1 40 0x400 0x01>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ spi3: spi@4000c000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32h7-spi";
+ reg = <0x4000c000 0x400>;
+ interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc SPI3_K>;
+ resets = <&rcc SPI3_R>;
+ dmas = <&dmamux1 61 0x400 0x01>,
+ <&dmamux1 62 0x400 0x01>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
uart4: serial@40010000 {
compatible = "st,stm32h7-uart";
reg = <0x40010000 0x400>;
@@ -142,6 +170,20 @@ i2c2: i2c@40013000 {
status = "disabled";
};
+ spi1: spi@44004000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32h7-spi";
+ reg = <0x44004000 0x400>;
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc SPI1_K>;
+ resets = <&rcc SPI1_R>;
+ dmas = <&dmamux1 37 0x400 0x01>,
+ <&dmamux1 38 0x400 0x01>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
dma1: dma-controller@48000000 {
compatible = "st,stm32-dma";
reg = <0x48000000 0x400>;
@@ -189,6 +231,34 @@ dmamux1: dma-router@48002000 {
dma-channels = <16>;
};
+ spi4: spi@4c002000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32h7-spi";
+ reg = <0x4c002000 0x400>;
+ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc SPI4_K>;
+ resets = <&rcc SPI4_R>;
+ dmas = <&dmamux1 83 0x400 0x01>,
+ <&dmamux1 84 0x400 0x01>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ spi5: spi@4c003000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32h7-spi";
+ reg = <0x4c003000 0x400>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc SPI5_K>;
+ resets = <&rcc SPI5_R>;
+ dmas = <&dmamux1 85 0x400 0x01>,
+ <&dmamux1 86 0x400 0x01>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
i2c3: i2c@4c004000 {
compatible = "st,stm32mp13-i2c";
reg = <0x4c004000 0x400>;
--
2.25.1
On 21/07/2022 17:34, Alain Volmat wrote:
> Add the 5 instances of spi busses supported by the stm32mp131.
>
> Signed-off-by: Alain Volmat <[email protected]>
> ---
> arch/arm/boot/dts/stm32mp131.dtsi | 70 +++++++++++++++++++++++++++++++
> 1 file changed, 70 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi
> index da9e8a6ca663..db3d1b900d5c 100644
> --- a/arch/arm/boot/dts/stm32mp131.dtsi
> +++ b/arch/arm/boot/dts/stm32mp131.dtsi
> @@ -97,6 +97,34 @@ scmi_shm: scmi-sram@0 {
> };
> };
>
> + spi2: spi@4000b000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32h7-spi";
> + reg = <0x4000b000 0x400>;
Unusual order... rather first compatible then reg.
Best regards,
Krzysztof
Hi Krzysztof,
thanks for the review. Will push a v2 fixing those points.
Alain
On Thu, Jul 21, 2022 at 06:32:18PM +0200, Krzysztof Kozlowski wrote:
> On 21/07/2022 17:34, Alain Volmat wrote:
> > Add the 5 instances of spi busses supported by the stm32mp131.
> >
> > Signed-off-by: Alain Volmat <[email protected]>
> > ---
> > arch/arm/boot/dts/stm32mp131.dtsi | 70 +++++++++++++++++++++++++++++++
> > 1 file changed, 70 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi
> > index da9e8a6ca663..db3d1b900d5c 100644
> > --- a/arch/arm/boot/dts/stm32mp131.dtsi
> > +++ b/arch/arm/boot/dts/stm32mp131.dtsi
> > @@ -97,6 +97,34 @@ scmi_shm: scmi-sram@0 {
> > };
> > };
> >
> > + spi2: spi@4000b000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + compatible = "st,stm32h7-spi";
> > + reg = <0x4000b000 0x400>;
>
> Unusual order... rather first compatible then reg.
>
> Best regards,
> Krzysztof