From: Marcel Ziswiler <[email protected]>
This series contains Verdin iMX8M Plus PCIe enablement and a few other
improvements for the Verdin iMX8M Mini and Plus (and Colibri iMX8X for
that matter).
Marcel Ziswiler (7):
arm64: dts: verdin-imx8mm: verdin-imx8mp: improve include notation
arm64: dts: colibri-imx8x: improve include notation
arm64: dts: verdin-imx8mm: verdin-imx8mp: rename sn65dsi83 to
sn65dsi84
arm64: dts: verdin-imx8mm: improve pcie node
arm64: dts: verdin-imx8mp: add pcie support
arm64: defconfig: enable snvs lpgpr support
arm64: defconfig: enable i.mx 8m plus specific interconnect support
Max Krummenacher (1):
arm64: dts: verdin-imx8mp: fix ctrl_sleep_moci
.../boot/dts/freescale/imx8mm-verdin.dtsi | 10 ++--
.../dts/freescale/imx8mp-verdin-dahlia.dtsi | 9 +++-
.../boot/dts/freescale/imx8mp-verdin.dtsi | 51 +++++++++++++------
.../freescale/imx8qxp-colibri-eval-v3.dtsi | 2 +-
arch/arm64/configs/defconfig | 2 +
5 files changed, 53 insertions(+), 21 deletions(-)
--
2.36.1
From: Max Krummenacher <[email protected]>
The GPIO signaling ctrl_sleep_moci is currently handled as a gpio hog.
But the gpio-hog node is made a child of the wrong gpio controller.
Move it to the node representing gpio4 so that it actually works.
Without this carrier board components jumpered to use the signal are
unconditionally switched off.
Fixes: 1d8df9c74bff ("arm64: dts: freescale: add initial support for verdin imx8m plus")
Signed-off-by: Max Krummenacher <[email protected]>
Signed-off-by: Marcel Ziswiler <[email protected]>
---
.../boot/dts/freescale/imx8mp-verdin.dtsi | 20 +++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
index 1c74c6a19449..360be51a3527 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
@@ -339,16 +339,6 @@ &gpio2 {
"SODIMM_82",
"SODIMM_70",
"SODIMM_72";
-
- ctrl-sleep-moci-hog {
- gpio-hog;
- /* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */
- gpios = <29 GPIO_ACTIVE_HIGH>;
- line-name = "CTRL_SLEEP_MOCI#";
- output-high;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ctrl_sleep_moci>;
- };
};
&gpio3 {
@@ -417,6 +407,16 @@ &gpio4 {
"SODIMM_256",
"SODIMM_48",
"SODIMM_44";
+
+ ctrl-sleep-moci-hog {
+ gpio-hog;
+ /* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */
+ gpios = <29 GPIO_ACTIVE_HIGH>;
+ line-name = "CTRL_SLEEP_MOCI#";
+ output-high;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ctrl_sleep_moci>;
+ };
};
/* On-module I2C */
--
2.36.1
From: Marcel Ziswiler <[email protected]>
Improve include notation. Usually only dtsi files from the same location
are included with an absolute path in quotes. Others should use a
relative path enclosed in angle brackets.
Signed-off-by: Marcel Ziswiler <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtsi
index a08e70fb7c7a..7c334b93db3b 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtsi
@@ -3,7 +3,7 @@
* Copyright 2019 Toradex
*/
-#include "dt-bindings/input/linux-event-codes.h"
+#include <dt-bindings/input/linux-event-codes.h>
/ {
aliases {
--
2.36.1
From: Marcel Ziswiler <[email protected]>
Improve include notation. Usually only dtsi files from the same location
are included with an absolute path in quotes. Others should use a
relative path enclosed in angle brackets.
Signed-off-by: Marcel Ziswiler <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 4 ++--
arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi | 3 ++-
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
index b379c461aa13..a749d063c367 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
@@ -3,8 +3,8 @@
* Copyright 2022 Toradex
*/
-#include "dt-bindings/phy/phy-imx8-pcie.h"
-#include "dt-bindings/pwm/pwm.h"
+#include <dt-bindings/phy/phy-imx8-pcie.h>
+#include <dt-bindings/pwm/pwm.h>
#include "imx8mm.dtsi"
/ {
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
index 360be51a3527..ee4231d138fe 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
@@ -3,7 +3,8 @@
* Copyright 2022 Toradex
*/
-#include "dt-bindings/pwm/pwm.h"
+#include <dt-bindings/phy/phy-imx8-pcie.h>
+#include <dt-bindings/pwm/pwm.h>
#include "imx8mp.dtsi"
/ {
--
2.36.1
From: Marcel Ziswiler <[email protected]>
Slight improvement of pcie node to be more in-line with what we add on
the Verdin iMX8M Plus.
Signed-off-by: Marcel Ziswiler <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
index 0c2582402087..0f1c6e320c66 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
@@ -638,7 +638,8 @@ &pcie0 {
assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
<&clk IMX8MM_SYS_PLL2_250M>;
assigned-clock-rates = <10000000>, <250000000>;
- clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>,
+ clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>,
+ <&clk IMX8MM_CLK_PCIE1_AUX>,
<&clk IMX8MM_CLK_PCIE1_PHY>;
clock-names = "pcie", "pcie_aux", "pcie_bus";
pinctrl-names = "default";
@@ -649,6 +650,7 @@ &pcie0 {
&pcie_phy {
clocks = <&clk IMX8MM_CLK_PCIE1_PHY>;
+ clock-names = "ref";
fsl,clkreq-unsupported;
fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_OUTPUT>;
fsl,tx-deemph-gen1 = <0x2d>;
--
2.36.1
From: Marcel Ziswiler <[email protected]>
Add PCIe support on the Verdin iMX8M Plus.
Signed-off-by: Marcel Ziswiler <[email protected]>
---
This still relies on the PHY part landing [1] and the internal SYSPLL
mode getting sorted [2].
[1] https://lore.kernel.org/all/[email protected]/
[2] https://lore.kernel.org/all/AS8PR04MB867657D03C61774096A5A1628C4C9@AS8PR04MB8676.eurprd04.prod.outlook.com/
.../dts/freescale/imx8mp-verdin-dahlia.dtsi | 9 +++++++-
.../boot/dts/freescale/imx8mp-verdin.dtsi | 22 ++++++++++++++++++-
2 files changed, 29 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi
index 4b8f86f63081..60f9dc4847db 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi
@@ -67,7 +67,14 @@ &i2c4 {
/* TODO: Audio Codec */
};
-/* TODO: Verdin PCIE_1 */
+/* Verdin PCIE_1 */
+&pcie {
+ status = "okay";
+};
+
+&pcie_phy {
+ status = "okay";
+};
/* Verdin PWM_1 */
&pwm1 {
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
index 7be7e922927b..160bb32cb5f7 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
@@ -734,7 +734,27 @@ eeprom_carrier_board: eeprom@57 {
};
};
-/* TODO: Verdin PCIE_1 */
+/* Verdin PCIE_1 */
+&pcie {
+ assigned-clocks = <&clk IMX8MP_CLK_PCIE_AUX>;
+ assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_50M>;
+ assigned-clock-rates = <10000000>;
+ clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
+ <&clk IMX8MP_CLK_PCIE_ROOT>,
+ <&clk IMX8MP_CLK_HSIO_AXI>;
+ clock-names = "pcie", "pcie_aux", "pcie_bus";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ /* PCIE_1_RESET# (SODIMM 244) */
+ reset-gpio = <&gpio4 19 GPIO_ACTIVE_LOW>;
+};
+
+&pcie_phy {
+ clocks = <&clk IMX8MP_CLK_HSIO_ROOT>;
+ clock-names = "ref";
+ fsl,clkreq-unsupported;
+ fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_OUTPUT>;
+};
/* Verdin PWM_1 */
&pwm1 {
--
2.36.1
From: Marcel Ziswiler <[email protected]>
Enable SNVS LPGPR support. This may e.g. be used on the i.MX 8M Mini and
Plus to store a form of boot counter.
Signed-off-by: Marcel Ziswiler <[email protected]>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index d5b2d2dd4904..521c784463bb 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -1239,6 +1239,7 @@ CONFIG_NVMEM_IMX_OCOTP_SCU=y
CONFIG_MTK_EFUSE=y
CONFIG_QCOM_QFPROM=y
CONFIG_ROCKCHIP_EFUSE=y
+CONFIG_NVMEM_SNVS_LPGPR=y
CONFIG_NVMEM_SUNXI_SID=y
CONFIG_UNIPHIER_EFUSE=y
CONFIG_MESON_EFUSE=m
--
2.36.1
From: Marcel Ziswiler <[email protected]>
Build CONFIG_INTERCONNECT_IMX8MP as a kernel module without which one
may get the following after boot:
[ 15.728019] platform 32f10100.usb: deferred probe pending
[ 15.733471] platform 32f10108.usb: deferred probe pending
[ 15.738895] platform 381f0040.usb-phy: deferred probe pending
[ 15.744668] platform 382f0040.usb-phy: deferred probe pending
[ 15.750437] platform 33800000.pcie: deferred probe pending
[ 15.755944] platform 32ec0000.blk-ctrl: deferred probe pending
[ 15.761807] platform 38330000.blk-ctrl: deferred probe pending
[ 15.767673] platform 32f10000.blk-ctrl: deferred probe pending
And things like PCIe and/or USB stop working.
Signed-off-by: Marcel Ziswiler <[email protected]>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 521c784463bb..8ae4cbcb971c 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -1263,6 +1263,7 @@ CONFIG_INTERCONNECT_IMX=m
CONFIG_INTERCONNECT_IMX8MM=m
CONFIG_INTERCONNECT_IMX8MN=m
CONFIG_INTERCONNECT_IMX8MQ=m
+CONFIG_INTERCONNECT_IMX8MP=m
CONFIG_INTERCONNECT_QCOM=y
CONFIG_INTERCONNECT_QCOM_MSM8916=m
CONFIG_INTERCONNECT_QCOM_MSM8996=m
--
2.36.1
From: Marcel Ziswiler <[email protected]>
Rename sn65dsi83 to sn65dsi84 as that is the exact chip used on the
Verdin DSI to LVDS Adapter.
Signed-off-by: Marcel Ziswiler <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 2 +-
arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi | 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
index a749d063c367..0c2582402087 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
@@ -595,7 +595,7 @@ atmel_mxt_ts: touch@4a {
compatible = "atmel,maxtouch";
/*
* Verdin GPIO_9_DSI
- * (TOUCH_INT#, SODIMM 17, also routed to SN65DSI83 IRQ albeit currently unused)
+ * (TOUCH_INT#, SODIMM 17, also routed to SN65DSI84 IRQ albeit currently unused)
*/
interrupt-parent = <&gpio3>;
interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
index ee4231d138fe..7be7e922927b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
@@ -664,8 +664,8 @@ gpio_expander_21: gpio-expander@21 {
status = "disabled";
};
- lvds_ti_sn65dsi83: bridge@2c {
- compatible = "ti,sn65dsi83";
+ lvds_ti_sn65dsi84: bridge@2c {
+ compatible = "ti,sn65dsi84";
/* Verdin GPIO_9_DSI (SN65DSI84 IRQ, SODIMM 17, unused) */
/* Verdin GPIO_10_DSI (SODIMM 21) */
enable-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
@@ -698,7 +698,7 @@ atmel_mxt_ts: touch@4a {
compatible = "atmel,maxtouch";
/*
* Verdin GPIO_9_DSI
- * (TOUCH_INT#, SODIMM 17, also routed to SN65DSI83 IRQ albeit currently unused)
+ * (TOUCH_INT#, SODIMM 17, also routed to SN65DSI84 IRQ albeit currently unused)
*/
interrupt-parent = <&gpio4>;
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
--
2.36.1
On Thu, Sep 22, 2022 at 06:29:18PM +0200, Marcel Ziswiler wrote:
> From: Max Krummenacher <[email protected]>
>
> The GPIO signaling ctrl_sleep_moci is currently handled as a gpio hog.
> But the gpio-hog node is made a child of the wrong gpio controller.
> Move it to the node representing gpio4 so that it actually works.
>
> Without this carrier board components jumpered to use the signal are
> unconditionally switched off.
>
> Fixes: 1d8df9c74bff ("arm64: dts: freescale: add initial support for verdin imx8m plus")
> Signed-off-by: Max Krummenacher <[email protected]>
> Signed-off-by: Marcel Ziswiler <[email protected]>
Applied, thanks!
On Thu, Sep 22, 2022 at 06:29:19PM +0200, Marcel Ziswiler wrote:
> From: Marcel Ziswiler <[email protected]>
>
> Improve include notation. Usually only dtsi files from the same location
> are included with an absolute path in quotes. Others should use a
> relative path enclosed in angle brackets.
>
> Signed-off-by: Marcel Ziswiler <[email protected]>
Applied, thanks!
On Thu, Sep 22, 2022 at 06:29:23PM +0200, Marcel Ziswiler wrote:
> From: Marcel Ziswiler <[email protected]>
>
> Add PCIe support on the Verdin iMX8M Plus.
>
> Signed-off-by: Marcel Ziswiler <[email protected]>
>
> ---
> This still relies on the PHY part landing [1] and the internal SYSPLL
> mode getting sorted [2].
>
> [1] https://lore.kernel.org/all/[email protected]/
> [2] https://lore.kernel.org/all/AS8PR04MB867657D03C61774096A5A1628C4C9@AS8PR04MB8676.eurprd04.prod.outlook.com/
Are these dependencies already landed on v6.1-rc1?
Shawn
>
> .../dts/freescale/imx8mp-verdin-dahlia.dtsi | 9 +++++++-
> .../boot/dts/freescale/imx8mp-verdin.dtsi | 22 ++++++++++++++++++-
> 2 files changed, 29 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi
> index 4b8f86f63081..60f9dc4847db 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi
> @@ -67,7 +67,14 @@ &i2c4 {
> /* TODO: Audio Codec */
> };
>
> -/* TODO: Verdin PCIE_1 */
> +/* Verdin PCIE_1 */
> +&pcie {
> + status = "okay";
> +};
> +
> +&pcie_phy {
> + status = "okay";
> +};
>
> /* Verdin PWM_1 */
> &pwm1 {
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
> index 7be7e922927b..160bb32cb5f7 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
> @@ -734,7 +734,27 @@ eeprom_carrier_board: eeprom@57 {
> };
> };
>
> -/* TODO: Verdin PCIE_1 */
> +/* Verdin PCIE_1 */
> +&pcie {
> + assigned-clocks = <&clk IMX8MP_CLK_PCIE_AUX>;
> + assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_50M>;
> + assigned-clock-rates = <10000000>;
> + clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
> + <&clk IMX8MP_CLK_PCIE_ROOT>,
> + <&clk IMX8MP_CLK_HSIO_AXI>;
> + clock-names = "pcie", "pcie_aux", "pcie_bus";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pcie>;
> + /* PCIE_1_RESET# (SODIMM 244) */
> + reset-gpio = <&gpio4 19 GPIO_ACTIVE_LOW>;
> +};
> +
> +&pcie_phy {
> + clocks = <&clk IMX8MP_CLK_HSIO_ROOT>;
> + clock-names = "ref";
> + fsl,clkreq-unsupported;
> + fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_OUTPUT>;
> +};
>
> /* Verdin PWM_1 */
> &pwm1 {
> --
> 2.36.1
>
On Thu, Sep 22, 2022 at 06:29:22PM +0200, Marcel Ziswiler wrote:
> From: Marcel Ziswiler <[email protected]>
>
> Slight improvement of pcie node to be more in-line with what we add on
> the Verdin iMX8M Plus.
>
> Signed-off-by: Marcel Ziswiler <[email protected]>
Applied, thanks!
On Thu, Sep 22, 2022 at 06:29:24PM +0200, Marcel Ziswiler wrote:
> From: Marcel Ziswiler <[email protected]>
>
> Enable SNVS LPGPR support. This may e.g. be used on the i.MX 8M Mini and
> Plus to store a form of boot counter.
>
> Signed-off-by: Marcel Ziswiler <[email protected]>
Applied, thanks!
On Thu, Sep 22, 2022 at 06:29:25PM +0200, Marcel Ziswiler wrote:
> From: Marcel Ziswiler <[email protected]>
>
> Build CONFIG_INTERCONNECT_IMX8MP as a kernel module without which one
> may get the following after boot:
>
> [ 15.728019] platform 32f10100.usb: deferred probe pending
> [ 15.733471] platform 32f10108.usb: deferred probe pending
> [ 15.738895] platform 381f0040.usb-phy: deferred probe pending
> [ 15.744668] platform 382f0040.usb-phy: deferred probe pending
> [ 15.750437] platform 33800000.pcie: deferred probe pending
> [ 15.755944] platform 32ec0000.blk-ctrl: deferred probe pending
> [ 15.761807] platform 38330000.blk-ctrl: deferred probe pending
> [ 15.767673] platform 32f10000.blk-ctrl: deferred probe pending
>
> And things like PCIe and/or USB stop working.
>
> Signed-off-by: Marcel Ziswiler <[email protected]>
Applied, thanks!
On Thu, Sep 22, 2022 at 06:29:20PM +0200, Marcel Ziswiler wrote:
> From: Marcel Ziswiler <[email protected]>
>
> Improve include notation. Usually only dtsi files from the same location
> are included with an absolute path in quotes. Others should use a
> relative path enclosed in angle brackets.
>
> Signed-off-by: Marcel Ziswiler <[email protected]>
Applied, thanks!
On Thu, Sep 22, 2022 at 06:29:21PM +0200, Marcel Ziswiler wrote:
> From: Marcel Ziswiler <[email protected]>
>
> Rename sn65dsi83 to sn65dsi84 as that is the exact chip used on the
> Verdin DSI to LVDS Adapter.
>
> Signed-off-by: Marcel Ziswiler <[email protected]>
Applied, thanks!