Currently every time a vendor introduces a new USB4 controller changes
need to be made in xhci-pci to add the PCI IDs representing the XHCI
controller used for tunneling.
Due to low power management needs every single integrated Intel and
AMD controller have needed to be added. As we already know which
controller is used for tunneling by the device links specified in
ACPI tables, this is a very good heuristic.
This series uses that as a heuristic, pulls out all the IDs added to
xhci-pci and then adds the new IDs for those *not* used for tunneling
on AMD's Pink Sardine (those are covered by the kernel today).
The original RFC that lead to this series and discussion related to
it is available here:
Link: https://lore.kernel.org/linux-usb/[email protected]/T/#t
Mario Limonciello (4):
USB: ACPI: Look for `usb4-host-interface` property
xhci-pci: Move PCI IDs for runtime allow into a table
xhci-pci: Remove a number of controllers from the runtime PM allowlist
xhci-pci: Allow host runtime PM as default for AMD Pink Sardine
drivers/usb/core/usb-acpi.c | 9 +++++
drivers/usb/host/xhci-pci.c | 74 +++++++++++++++++--------------------
2 files changed, 43 insertions(+), 40 deletions(-)
--
2.34.1
For optimal power consumption of USB4 routers the XHCI PCIe endpoint
used for tunneling must be in D3. Historically this is accomplished
by a long list of PCIe IDs that correspond to these endpoints.
The linux thunderbolt CM currently uses the `usb4-host-interface` ACPI
property to create a device link between the USB4 host router PCIe
endpoint and the XHCI PCIe endpoint. The device link will move
the devices in out of D3 together.
To avoid having to maintain this never ending list of PCIe IDs, use
the existence of `usb4-host-interface` property on a USB port as a
proxy to allow runtime PM for these controllers. The device links
will continue to be created when the CM initializes the USB4
host router and also discovers this property.
Link: https://learn.microsoft.com/en-us/windows-hardware/design/component-guidelines/usb4-acpi-requirements#port-mapping-_dsd-for-usb-3x-and-pcie
Signed-off-by: Mario Limonciello <[email protected]>
---
RFC v1->PATCH v1
* Move this detection from Thunderbolt CM into USB core
---
drivers/usb/core/usb-acpi.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/usb/core/usb-acpi.c b/drivers/usb/core/usb-acpi.c
index 6d93428432f13..f91ab4fd84cf8 100644
--- a/drivers/usb/core/usb-acpi.c
+++ b/drivers/usb/core/usb-acpi.c
@@ -177,6 +177,15 @@ usb_acpi_find_companion_for_port(struct usb_port *port_dev)
port_dev->connect_type = usb_acpi_get_connect_type(handle, pld);
ACPI_FREE(pld);
}
+ if (!acpi_dev_get_property(adev, "usb4-host-interface",
+ ACPI_TYPE_ANY, NULL)) {
+ struct device *dev = &port_dev->dev;
+
+ while (dev && !dev_is_pci(dev))
+ dev = dev->parent;
+ if (dev)
+ pm_runtime_allow(dev);
+ }
return adev;
}
--
2.34.1
The XHCI controllers not connected to the USB4 controller via a device
link can support D3. For optimal runtime power consumption on AMD Pink
Sardine, all XHCI controllers must support runtime suspend.
Signed-off-by: Mario Limonciello <[email protected]>
---
RFC v1->PATCH v1
* Rebase on moving IDs into a table
---
drivers/usb/host/xhci-pci.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index c17f748b05929..8e7ed038880b5 100644
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -71,6 +71,8 @@
#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_4 0x161e
#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_5 0x161c
#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_6 0x161f
+#define PCI_DEVICE_ID_AMD_PINK_SARDINE_XHCI_1 0x15b9
+#define PCI_DEVICE_ID_AMD_PINK_SARDINE_XHCI_2 0x15ba
#define PCI_DEVICE_ID_ASMEDIA_1042_XHCI 0x1042
#define PCI_DEVICE_ID_ASMEDIA_1042A_XHCI 0x1142
@@ -100,6 +102,8 @@ static const struct pci_device_id runtime_allow_pci_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_4) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_5) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_6) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_PINK_SARDINE_XHCI_1) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_PINK_SARDINE_XHCI_2) },
{ 0 }
};
--
2.34.1
When creating a device link from the XHCI PCI device to the USB4 router
the thunderbolt driver will opt the XHCI PCI device into runtime PM.
As such it's not necessary to include a hardcoded list of these XHCI
controllers. This is effectively a full or partial revert of the following
commits:
* commit 8ffdc53a60049 ("xhci-pci: Allow host runtime PM as default for
Intel Meteor Lake xHCI")
* commit 7516da47a349e ("xhci-pci: Allow host runtime PM as default for
Intel Raptor Lake xHCI")
* commit 74f55a62c4c35 ("xhci: Allow host runtime PM as default for
Intel Alder Lake N xHCI")
* commit b813511135e8b ("xhci-pci: Allow host runtime PM as default for
Intel Alder Lake xHCI")
* commit f886d4fbb7c97 ("usb: xhci: Extend support for runtime power
management for AMD's Yellow carp.")
Signed-off-by: Mario Limonciello <[email protected]>
---
RFC v1->PATCH v1:
* Drop ICL and TGL, these need it even for FW CM and don't have
device links
* Rebase on top of patch to make a table instead
---
drivers/usb/host/xhci-pci.c | 16 ++--------------
1 file changed, 2 insertions(+), 14 deletions(-)
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index 6e5bcec9b2b16..c17f748b05929 100644
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -58,11 +58,7 @@
#define PCI_DEVICE_ID_INTEL_CML_XHCI 0xa3af
#define PCI_DEVICE_ID_INTEL_TIGER_LAKE_XHCI 0x9a13
#define PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_XHCI 0x1138
-#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_XHCI 0x461e
-#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_N_XHCI 0x464e
#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_PCH_XHCI 0x51ed
-#define PCI_DEVICE_ID_INTEL_RAPTOR_LAKE_XHCI 0xa71e
-#define PCI_DEVICE_ID_INTEL_METEOR_LAKE_XHCI 0x7ec0
#define PCI_DEVICE_ID_AMD_RENOIR_XHCI 0x1639
#define PCI_DEVICE_ID_AMD_PROMONTORYA_4 0x43b9
@@ -73,10 +69,8 @@
#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_2 0x161b
#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_3 0x161d
#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_4 0x161e
-#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_5 0x15d6
-#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_6 0x15d7
-#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_7 0x161c
-#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_8 0x161f
+#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_5 0x161c
+#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_6 0x161f
#define PCI_DEVICE_ID_ASMEDIA_1042_XHCI 0x1042
#define PCI_DEVICE_ID_ASMEDIA_1042A_XHCI 0x1142
@@ -98,11 +92,7 @@ static const struct pci_device_id runtime_allow_pci_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICE_LAKE_XHCI) },
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TIGER_LAKE_XHCI) },
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_XHCI) },
- { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ALDER_LAKE_XHCI) },
- { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ALDER_LAKE_N_XHCI) },
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ALDER_LAKE_PCH_XHCI) },
- { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_RAPTOR_LAKE_XHCI) },
- { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_METEOR_LAKE_XHCI) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_1) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_2) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_3) },
@@ -110,8 +100,6 @@ static const struct pci_device_id runtime_allow_pci_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_4) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_5) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_6) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_7) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_8) },
{ 0 }
};
--
2.34.1
Every time an new ID is added to this file, it ends up in a list that
will require changing the last parenthesis or a curly brace or both.
To make for cleaner patches in the future, match devices against a table.
While moving IDs over, rename the Yellow Carp ones to Rembrandt as it
has launched. No functional changes intended by this change.
Signed-off-by: Mario Limonciello <[email protected]>
---
RFC v1->PATCH v1
* New patch
---
drivers/usb/host/xhci-pci.c | 74 +++++++++++++++++++------------------
1 file changed, 38 insertions(+), 36 deletions(-)
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index dce6c0ec8d340..6e5bcec9b2b16 100644
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -69,14 +69,14 @@
#define PCI_DEVICE_ID_AMD_PROMONTORYA_3 0x43ba
#define PCI_DEVICE_ID_AMD_PROMONTORYA_2 0x43bb
#define PCI_DEVICE_ID_AMD_PROMONTORYA_1 0x43bc
-#define PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_1 0x161a
-#define PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_2 0x161b
-#define PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_3 0x161d
-#define PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_4 0x161e
-#define PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_5 0x15d6
-#define PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_6 0x15d7
-#define PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_7 0x161c
-#define PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_8 0x161f
+#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_1 0x161a
+#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_2 0x161b
+#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_3 0x161d
+#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_4 0x161e
+#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_5 0x15d6
+#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_6 0x15d7
+#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_7 0x161c
+#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_8 0x161f
#define PCI_DEVICE_ID_ASMEDIA_1042_XHCI 0x1042
#define PCI_DEVICE_ID_ASMEDIA_1042A_XHCI 0x1142
@@ -86,6 +86,35 @@
static const char hcd_name[] = "xhci_hcd";
+static const struct pci_device_id runtime_allow_pci_ids[] = {
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_XHCI) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_XHCI) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_XHCI) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_XHCI) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_XHCI) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_XHCI) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_XHCI) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_XHCI) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICE_LAKE_XHCI) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TIGER_LAKE_XHCI) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_XHCI) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ALDER_LAKE_XHCI) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ALDER_LAKE_N_XHCI) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ALDER_LAKE_PCH_XHCI) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_RAPTOR_LAKE_XHCI) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_METEOR_LAKE_XHCI) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_1) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_2) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_3) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_4) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_4) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_5) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_6) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_7) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_8) },
+ { 0 }
+};
+
static struct hc_driver __read_mostly xhci_pci_hc_driver;
static int xhci_pci_setup(struct usb_hcd *hcd);
@@ -257,25 +286,6 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
pdev->device == PCI_DEVICE_ID_INTEL_DNV_XHCI))
xhci->quirks |= XHCI_MISSING_CAS;
- if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
- (pdev->device == PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_XHCI ||
- pdev->device == PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_XHCI ||
- pdev->device == PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_XHCI ||
- pdev->device == PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_XHCI ||
- pdev->device == PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_XHCI ||
- pdev->device == PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_XHCI ||
- pdev->device == PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_XHCI ||
- pdev->device == PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_XHCI ||
- pdev->device == PCI_DEVICE_ID_INTEL_ICE_LAKE_XHCI ||
- pdev->device == PCI_DEVICE_ID_INTEL_TIGER_LAKE_XHCI ||
- pdev->device == PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_XHCI ||
- pdev->device == PCI_DEVICE_ID_INTEL_ALDER_LAKE_XHCI ||
- pdev->device == PCI_DEVICE_ID_INTEL_ALDER_LAKE_N_XHCI ||
- pdev->device == PCI_DEVICE_ID_INTEL_ALDER_LAKE_PCH_XHCI ||
- pdev->device == PCI_DEVICE_ID_INTEL_RAPTOR_LAKE_XHCI ||
- pdev->device == PCI_DEVICE_ID_INTEL_METEOR_LAKE_XHCI))
- xhci->quirks |= XHCI_DEFAULT_PM_RUNTIME_ALLOW;
-
if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
pdev->device == PCI_DEVICE_ID_EJ168) {
xhci->quirks |= XHCI_RESET_ON_RESUME;
@@ -336,15 +346,7 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
pdev->device == PCI_DEVICE_ID_AMD_PROMONTORYA_4))
xhci->quirks |= XHCI_NO_SOFT_RETRY;
- if (pdev->vendor == PCI_VENDOR_ID_AMD &&
- (pdev->device == PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_1 ||
- pdev->device == PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_2 ||
- pdev->device == PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_3 ||
- pdev->device == PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_4 ||
- pdev->device == PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_5 ||
- pdev->device == PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_6 ||
- pdev->device == PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_7 ||
- pdev->device == PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_8))
+ if (pci_match_id(runtime_allow_pci_ids, pdev))
xhci->quirks |= XHCI_DEFAULT_PM_RUNTIME_ALLOW;
if (xhci->quirks & XHCI_RESET_ON_RESUME)
--
2.34.1
Hi
On 5.10.2022 23.23, Mario Limonciello wrote:
> For optimal power consumption of USB4 routers the XHCI PCIe endpoint
> used for tunneling must be in D3. Historically this is accomplished
> by a long list of PCIe IDs that correspond to these endpoints.
>
> The linux thunderbolt CM currently uses the `usb4-host-interface` ACPI
> property to create a device link between the USB4 host router PCIe
> endpoint and the XHCI PCIe endpoint. The device link will move
> the devices in out of D3 together.
>
> To avoid having to maintain this never ending list of PCIe IDs, use
> the existence of `usb4-host-interface` property on a USB port as a
> proxy to allow runtime PM for these controllers. The device links
> will continue to be created when the CM initializes the USB4
> host router and also discovers this property.
>
Agree that maintaining this list isn't a long term solution.
> Link: https://learn.microsoft.com/en-us/windows-hardware/design/component-guidelines/usb4-acpi-requirements#port-mapping-_dsd-for-usb-3x-and-pcie
> Signed-off-by: Mario Limonciello <[email protected]>
> ---
> RFC v1->PATCH v1
> * Move this detection from Thunderbolt CM into USB core
> ---
> drivers/usb/core/usb-acpi.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/usb/core/usb-acpi.c b/drivers/usb/core/usb-acpi.c
> index 6d93428432f13..f91ab4fd84cf8 100644
> --- a/drivers/usb/core/usb-acpi.c
> +++ b/drivers/usb/core/usb-acpi.c
> @@ -177,6 +177,15 @@ usb_acpi_find_companion_for_port(struct usb_port *port_dev)
> port_dev->connect_type = usb_acpi_get_connect_type(handle, pld);
> ACPI_FREE(pld);
> }
> + if (!acpi_dev_get_property(adev, "usb4-host-interface",
> + ACPI_TYPE_ANY, NULL)) {
> + struct device *dev = &port_dev->dev;
> +
> + while (dev && !dev_is_pci(dev))
> + dev = dev->parent;
> + if (dev)
> + pm_runtime_allow(dev);
This would enable runtime pm for usb hosts during usb_acpi_bus acpi companion finding.
I think host drivers should be the ones making this decision.
Maybe it's time to enable runtime pm as default for most new xHC controllers.
How about we enable it for all AMD and Intel PCI xHC hosts with version 1.2 or later?
If it causes un-fixable regression to some controller we can add it to a denylist.
Thanks
-Mathias