From: Peng Fan <[email protected]>
V6:
Add R-b
Drop nxp,dvs-run-voltage in patch 7
V5:
Drop patch v4 11, 12 which could added together with wlan support.
V4:
Use mmc-pwrseq in patch 12
V3:
Drop patch V2 3/15
Add A-b R-b
Sort order in patch 9
Update commit log in patch 10
Drop #address-cells, #size-cells in patch 11
Use off-on-delay-us in patch 12
Update patch 13 according to patch 12 change
V2:
https://lore.kernel.org/all/[email protected]/
Address Marco's comments
Update commit log for patch [3,5,9,14]/15
Order iomuxc in patch 4/15
Update flexspi node name in patch 6/15
Increase i2c speed in patch 7/15
V1:
https://lore.kernel.org/all/[email protected]/
This patchset includes several dts update for i.MX8M/N/P-EVK, with
only one dtsi patch to add mlmix power domain for i.MX8MP.
i.MX8MP-EVK: Enable PWM, uart1/3, I2C2
correct pcie pad
Fix pmic buck/ldo voltage
off-on-delay-us for SD
i.MX8MN-EVK: Enable UART1, SDHC1, I2C recovery IOMUXC
Update vdd_soc dvs voltage
i.MX8MM-EVK: add vcc supply for pca6416
use off-on-delay-us for SD
A few patches are directly cherry-picked from NXP downstream which
already includes R-b tag
Adrian Alonso (1):
arm64: dts: imx8mm-evk: add vcc supply for pca6416
Clark Wang (1):
ARM64: dts: imx8mp-evk: add pwm support
Haibo Chen (1):
arm64: dts: imx8m[m,q]-evk: change to use off-on-delay-us in regulator
Han Xu (1):
arm64: dts: imx8mp-evk: enable fspi nor on imx8mp evk
Peng Fan (8):
arm64: dts: imx8mp: add mlmix power domain
arm64: dts: imx8mp-evk: correct pcie pad settings
arm64: dts: imx8mp-evk: enable uart1/3 ports
arm64: dts: imx8mp-evk: enable I2C2 node
arm64: dts: imx8mn-evk: update vdd_soc dvs voltage
arm64: dts: imx8mn-evk: set off-on-delay-us in regulator
arm64: dts: imx8mn-evk: add i2c gpio recovery settings
arm64: dts: imx8mn-evk: enable uart1
arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 2 +
arch/arm64/boot/dts/freescale/imx8mn-evk.dts | 3 +-
arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi | 43 ++++++-
arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 117 +++++++++++++++++-
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 8 ++
arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 1 +
6 files changed, 167 insertions(+), 7 deletions(-)
--
2.37.1
From: Clark Wang <[email protected]>
Enable pwm1/2/4 support.
Enable pwm1 on pin GPIO1_IO01 for DSI_BL_PWM
pwm2 on pin GPIO1_IO11 for LVDS_BL_PWM
pwm4 on pin SAI5_RXFS for J21-32
Acked-by: Fugang Duan <[email protected]>
Signed-off-by: Clark Wang <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Marco Felsch <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 36 ++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
index b4c1ef2559f2..e323e6f4b7e5 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
@@ -390,6 +390,24 @@ &pcie {
status = "okay";
};
+&pwm1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm1>;
+ status = "okay";
+};
+
+&pwm2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm2>;
+ status = "okay";
+};
+
+&pwm4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm4>;
+ status = "okay";
+};
+
&snvs_pwrkey {
status = "okay";
};
@@ -567,6 +585,24 @@ MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x146 /* Input pull-up. */
>;
};
+ pinctrl_pwm1: pwm1grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO01__PWM1_OUT 0x116
+ >;
+ };
+
+ pinctrl_pwm2: pwm2grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO11__PWM2_OUT 0x116
+ >;
+ };
+
+ pinctrl_pwm4: pwm4grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI5_RXFS__PWM4_OUT 0x116
+ >;
+ };
+
pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
fsl,pins = <
MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40
--
2.37.1
From: Peng Fan <[email protected]>
Enable uart1 for BT usage
Configure the clock to source from IMX8MN_SYS_PLL1_80M, because the uart
could only support max 1.5M buadrate if using OSC_24M as clock source.
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Marco Felsch <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi
index 2439b91e51d8..dfa11927b1d7 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi
@@ -247,6 +247,15 @@ &spdif1 {
status = "okay";
};
+&uart1 { /* BT */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ assigned-clocks = <&clk IMX8MN_CLK_UART1>;
+ assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>;
+ fsl,uart-has-rtscts;
+ status = "okay";
+};
+
&uart2 { /* console */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
@@ -444,6 +453,15 @@ MX8MN_IOMUXC_SD1_STROBE_GPIO2_IO11 0x159
>;
};
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
+ MX8MN_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
+ MX8MN_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140
+ MX8MN_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140
+ >;
+ };
+
pinctrl_uart2: uart2grp {
fsl,pins = <
MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
--
2.37.1
From: Adrian Alonso <[email protected]>
pca6146 requires vcc-supply to work on i.MX8MM-EVK board.
Reviewed-by: Shengjiu Wang <[email protected]>
Signed-off-by: Adrian Alonso <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Marco Felsch <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
index 3f2b0ad51e18..e0b604ac0da4 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
@@ -344,6 +344,7 @@ pca6416: gpio@20 {
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
+ vcc-supply = <&buck4_reg>;
};
};
--
2.37.1
From: Haibo Chen <[email protected]>
Some SD Card controller and power circuitry has increased capacitance,
so the usual toggling of regulator to power the card off and on
is insufficient.
According to SD spec, for sd card power reset operation, the sd card
supply voltage needs to be lower than 0.5v and keep over 1ms, otherwise,
next time power back the sd card supply voltage to 3.3v, sd card can't
support SD3.0 mode again.
This patch add the off-on-delay-us, make sure the sd power reset behavior
is align with the specification. Without this patch, when do quick system
suspend/resume test, some sd card can't work at SD3.0 mode after system
resume back.
Signed-off-by: Haibo Chen <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Marco Felsch <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 1 +
arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
index 6800d923aa7e..3f2b0ad51e18 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
@@ -56,6 +56,7 @@ reg_usdhc2_vmmc: regulator-usdhc2 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
+ off-on-delay-us = <20000>;
enable-active-high;
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
index 2102e9b57697..78937910f403 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
@@ -46,6 +46,7 @@ reg_usdhc2_vmmc: regulator-vsd-3v3 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
+ off-on-delay-us = <20000>;
enable-active-high;
};
--
2.37.1
From: Peng Fan <[email protected]>
Some SD Card controller and power circuitry has increased capacitance,
so the usual toggling of regulator to power the card off and on
is insufficient.
According to SD spec, for sd card power reset operation, the sd card
supply voltage needs to be lower than 0.5v and keep over 1ms, otherwise,
next time power back the sd card supply voltage to 3.3v, sd card can't
support SD3.0 mode again.
This patch add the off-on-delay-us, make sure the sd power reset behavior
is align with the specification. Without this patch, when do quick system
suspend/resume test, some sd card can't work at SD3.0 mode after system
resume back.
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Marco Felsch <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi
index 8cb87c7a0f03..e066fa9af834 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi
@@ -36,6 +36,7 @@ reg_usdhc2_vmmc: regulator-usdhc2 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
+ off-on-delay-us = <12000>;
enable-active-high;
};
--
2.37.1
On Thu, Nov 17, 2022 at 05:54:02PM +0800, Peng Fan (OSS) wrote:
> From: Haibo Chen <[email protected]>
>
> Some SD Card controller and power circuitry has increased capacitance,
> so the usual toggling of regulator to power the card off and on
> is insufficient.
>
> According to SD spec, for sd card power reset operation, the sd card
> supply voltage needs to be lower than 0.5v and keep over 1ms, otherwise,
> next time power back the sd card supply voltage to 3.3v, sd card can't
> support SD3.0 mode again.
>
> This patch add the off-on-delay-us, make sure the sd power reset behavior
> is align with the specification. Without this patch, when do quick system
> suspend/resume test, some sd card can't work at SD3.0 mode after system
> resume back.
>
> Signed-off-by: Haibo Chen <[email protected]>
> Signed-off-by: Peng Fan <[email protected]>
> Reviewed-by: Marco Felsch <[email protected]>
Applied, thanks!
On Thu, Nov 17, 2022 at 05:53:59PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <[email protected]>
>
> Some SD Card controller and power circuitry has increased capacitance,
> so the usual toggling of regulator to power the card off and on
> is insufficient.
>
> According to SD spec, for sd card power reset operation, the sd card
> supply voltage needs to be lower than 0.5v and keep over 1ms, otherwise,
> next time power back the sd card supply voltage to 3.3v, sd card can't
> support SD3.0 mode again.
>
> This patch add the off-on-delay-us, make sure the sd power reset behavior
> is align with the specification. Without this patch, when do quick system
> suspend/resume test, some sd card can't work at SD3.0 mode after system
> resume back.
>
> Signed-off-by: Peng Fan <[email protected]>
> Reviewed-by: Marco Felsch <[email protected]>
Applied, thanks!
On Thu, Nov 17, 2022 at 05:53:54PM +0800, Peng Fan (OSS) wrote:
> From: Clark Wang <[email protected]>
>
> Enable pwm1/2/4 support.
> Enable pwm1 on pin GPIO1_IO01 for DSI_BL_PWM
> pwm2 on pin GPIO1_IO11 for LVDS_BL_PWM
> pwm4 on pin SAI5_RXFS for J21-32
>
> Acked-by: Fugang Duan <[email protected]>
> Signed-off-by: Clark Wang <[email protected]>
> Signed-off-by: Peng Fan <[email protected]>
> Reviewed-by: Marco Felsch <[email protected]>
Applied, thanks!
On Thu, Nov 17, 2022 at 05:54:01PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <[email protected]>
>
> Enable uart1 for BT usage
> Configure the clock to source from IMX8MN_SYS_PLL1_80M, because the uart
> could only support max 1.5M buadrate if using OSC_24M as clock source.
>
> Signed-off-by: Peng Fan <[email protected]>
> Reviewed-by: Marco Felsch <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi
> index 2439b91e51d8..dfa11927b1d7 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi
> @@ -247,6 +247,15 @@ &spdif1 {
> status = "okay";
> };
>
> +&uart1 { /* BT */
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart1>;
> + assigned-clocks = <&clk IMX8MN_CLK_UART1>;
> + assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>;
> + fsl,uart-has-rtscts;
uart-has-rtscts
Fixed it up and applied, thanks!
Shawn
> + status = "okay";
> +};
> +
> &uart2 { /* console */
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_uart2>;
> @@ -444,6 +453,15 @@ MX8MN_IOMUXC_SD1_STROBE_GPIO2_IO11 0x159
> >;
> };
>
> + pinctrl_uart1: uart1grp {
> + fsl,pins = <
> + MX8MN_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
> + MX8MN_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
> + MX8MN_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140
> + MX8MN_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140
> + >;
> + };
> +
> pinctrl_uart2: uart2grp {
> fsl,pins = <
> MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
> --
> 2.37.1
>
On Thu, Nov 17, 2022 at 05:54:03PM +0800, Peng Fan (OSS) wrote:
> From: Adrian Alonso <[email protected]>
>
> pca6146 requires vcc-supply to work on i.MX8MM-EVK board.
>
> Reviewed-by: Shengjiu Wang <[email protected]>
> Signed-off-by: Adrian Alonso <[email protected]>
> Signed-off-by: Peng Fan <[email protected]>
> Reviewed-by: Marco Felsch <[email protected]>
Applied, thanks!