2022-11-27 14:13:00

by Jisheng Zhang

Subject: [PATCH v2 3/9] riscv: add the Bouffalolab SoC family Kconfig option

The Bouffalolab bl808 SoC contains three riscv CPUs, namely M0, D0 and
LP. The D0 is 64bit RISC-V GC compatible, so can run linux.

Signed-off-by: Jisheng Zhang <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
---
arch/riscv/Kconfig.socs | 6 ++++++
1 file changed, 6 insertions(+)

diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 69774bb362d6..90256f44ed4a 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -1,5 +1,11 @@
menu "SoC selection"

+config SOC_BOUFFALOLAB
+ bool "Bouffalolab SoCs"
+ select SIFIVE_PLIC
+ help
+ This enables support for Bouffalolab SoC platforms.
+
config SOC_MICROCHIP_POLARFIRE
bool "Microchip PolarFire SoCs"
select MCHP_CLK_MPFS
--
2.38.1

2022-11-30 07:28:15

by Samuel Holland

Subject: Re: [PATCH v2 3/9] riscv: add the Bouffalolab SoC family Kconfig option

On 11/27/22 07:24, Jisheng Zhang wrote:
> The Bouffalolab bl808 SoC contains three riscv CPUs, namely M0, D0 and
> LP. The D0 is 64bit RISC-V GC compatible, so can run linux.
>
> Signed-off-by: Jisheng Zhang <[email protected]>
> Reviewed-by: Conor Dooley <[email protected]>
> ---
> arch/riscv/Kconfig.socs | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index 69774bb362d6..90256f44ed4a 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -1,5 +1,11 @@
> menu "SoC selection"
>
> +config SOC_BOUFFALOLAB

The options in this file are getting renamed soon, so this should be
named ARCH_BOUFFALOLAB. See

https://lore.kernel.org/linux-riscv/[email protected]/

Regards,
Samuel

> + bool "Bouffalolab SoCs"
> + select SIFIVE_PLIC
> + help
> + This enables support for Bouffalolab SoC platforms.
> +
> config SOC_MICROCHIP_POLARFIRE
> bool "Microchip PolarFire SoCs"
> select MCHP_CLK_MPFS