Enable sa8540p-ride rtc on pmic@0.
sa8540p base boards share the same pmics description, currently in
pm8450a.dtsi. Rename the file to make this explicit and use it in both
sa8540p-ride.dts and sa8295p-adp.dts.
Add the missing offset where appropriate for the alarm register bank in
other qcom,pm8941-rtc description.
Changes since v3:
- Amend patch #1 incorrect description.
Changes since v2:
- rename pm8450a.dtsi to sa8540p-pmics.dtsi.
Changes since v1:
- Add "alarm" register bank offset at 0x6100 in qcom,pm8941-rtc
descriptions.
Eric Chanudet (4):
arm64: dts: qcom: rename pm8450a dtsi to sa8540p-pmics
arm64: dts: qcom: sa8450p-pmics: add rtc node
arm64: dts: qcom: sa8295p-adp: use sa8540p-pmics
arm64: dts: qcom: pm8941-rtc add alarm register
arch/arm64/boot/dts/qcom/pm8150.dtsi | 2 +-
arch/arm64/boot/dts/qcom/pm8916.dtsi | 3 +-
arch/arm64/boot/dts/qcom/pm8950.dtsi | 2 +-
arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi | 2 +-
arch/arm64/boot/dts/qcom/pmp8074.dtsi | 2 +-
arch/arm64/boot/dts/qcom/pms405.dtsi | 2 +-
arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 79 +------------------
.../qcom/{pm8450a.dtsi => sa8540p-pmics.dtsi} | 8 ++
arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 2 +-
9 files changed, 17 insertions(+), 85 deletions(-)
rename arch/arm64/boot/dts/qcom/{pm8450a.dtsi => sa8540p-pmics.dtsi} (90%)
--
2.38.1
pm8450a.dtsi was introduced for the descriptions of pmics used on
sa8540p based boards. Rename the dtsi to make this relationship
explicit.
Signed-off-by: Eric Chanudet <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/{pm8450a.dtsi => sa8540p-pmics.dtsi} | 0
arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 2 +-
2 files changed, 1 insertion(+), 1 deletion(-)
rename arch/arm64/boot/dts/qcom/{pm8450a.dtsi => sa8540p-pmics.dtsi} (100%)
diff --git a/arch/arm64/boot/dts/qcom/pm8450a.dtsi b/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi
similarity index 100%
rename from arch/arm64/boot/dts/qcom/pm8450a.dtsi
rename to arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi
diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
index 6c547f1b13dc..77d499702ea8 100644
--- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
+++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
@@ -10,7 +10,7 @@
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "sa8540p.dtsi"
-#include "pm8450a.dtsi"
+#include "sa8540p-pmics.dtsi"
/ {
model = "Qualcomm SA8540P Ride";
--
2.38.1
Include the dtsi to use a single pmic descriptions.
Both sa8295p-adp and sa8540p-adp have the same spmi pmic apparently.
Signed-off-by: Eric Chanudet <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 79 +-----------------------
1 file changed, 1 insertion(+), 78 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
index 84cb6f3eeb56..c8437efe8235 100644
--- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
+++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
@@ -11,6 +11,7 @@
#include <dt-bindings/spmi/spmi.h>
#include "sa8540p.dtsi"
+#include "sa8540p-pmics.dtsi"
/ {
model = "Qualcomm SA8295P ADP";
@@ -260,84 +261,6 @@ &remoteproc_nsp1 {
status = "okay";
};
-&spmi_bus {
- pm8450a: pmic@0 {
- compatible = "qcom,pm8150", "qcom,spmi-pmic";
- reg = <0x0 SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- rtc@6000 {
- compatible = "qcom,pm8941-rtc";
- reg = <0x6000>;
- reg-names = "rtc", "alarm";
- interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
- wakeup-source;
- };
-
- pm8450a_gpios: gpio@c000 {
- compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
- reg = <0xc000>;
- gpio-controller;
- gpio-ranges = <&pm8450a_gpios 0 0 10>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- pm8450c: pmic@4 {
- compatible = "qcom,pm8150", "qcom,spmi-pmic";
- reg = <0x4 SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- pm8450c_gpios: gpio@c000 {
- compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
- reg = <0xc000>;
- gpio-controller;
- gpio-ranges = <&pm8450c_gpios 0 0 10>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- pm8450e: pmic@8 {
- compatible = "qcom,pm8150", "qcom,spmi-pmic";
- reg = <0x8 SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- pm8450e_gpios: gpio@c000 {
- compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
- reg = <0xc000>;
- gpio-controller;
- gpio-ranges = <&pm8450e_gpios 0 0 10>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- pm8450g: pmic@c {
- compatible = "qcom,pm8150", "qcom,spmi-pmic";
- reg = <0xc SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- pm8450g_gpios: gpio@c000 {
- compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
- reg = <0xc000>;
- gpio-controller;
- gpio-ranges = <&pm8450g_gpios 0 0 10>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-};
-
&ufs_mem_hc {
reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
--
2.38.1
On Mon, Dec 19, 2022 at 02:09:57PM -0500, Eric Chanudet wrote:
> Enable sa8540p-ride rtc on pmic@0.
>
> sa8540p base boards share the same pmics description, currently in
> pm8450a.dtsi. Rename the file to make this explicit and use it in both
> sa8540p-ride.dts and sa8295p-adp.dts.
> Add the missing offset where appropriate for the alarm register bank in
> other qcom,pm8941-rtc description.
>
> Changes since v3:
> - Amend patch #1 incorrect description.
>
> Changes since v2:
> - rename pm8450a.dtsi to sa8540p-pmics.dtsi.
>
> Changes since v1:
> - Add "alarm" register bank offset at 0x6100 in qcom,pm8941-rtc
> descriptions.
>
> Eric Chanudet (4):
> arm64: dts: qcom: rename pm8450a dtsi to sa8540p-pmics
> arm64: dts: qcom: sa8450p-pmics: add rtc node
> arm64: dts: qcom: sa8295p-adp: use sa8540p-pmics
> arm64: dts: qcom: pm8941-rtc add alarm register
>
> arch/arm64/boot/dts/qcom/pm8150.dtsi | 2 +-
> arch/arm64/boot/dts/qcom/pm8916.dtsi | 3 +-
> arch/arm64/boot/dts/qcom/pm8950.dtsi | 2 +-
> arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi | 2 +-
> arch/arm64/boot/dts/qcom/pmp8074.dtsi | 2 +-
> arch/arm64/boot/dts/qcom/pms405.dtsi | 2 +-
> arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 79 +------------------
> .../qcom/{pm8450a.dtsi => sa8540p-pmics.dtsi} | 8 ++
> arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 2 +-
> 9 files changed, 17 insertions(+), 85 deletions(-)
> rename arch/arm64/boot/dts/qcom/{pm8450a.dtsi => sa8540p-pmics.dtsi} (90%)
>
> --
> 2.38.1
>
Tested-by: Andrew Halaney <[email protected]> # sa8540p-ride
Here's some naive tests I did for the record:
[root@localhost ~]# cat /proc/interrupts | grep alarm
180: 2 0 0 0 0 0 0 0 pmic_arb 101777441 Edge pm8xxx_rtc_alarm
[root@localhost ~]# echocat /proc/interrupts | grep alarm> /sys/class/rtc/rtc0/wakealarm && sleep 10 && cat /proc/interrupts | grep alarm
180: 3 cat /proc/interrupts | grep alarm0 0 pmic_arb 101777441 Edge pm8xxx_rtc_alarm
180: 3 0 0 0 0 0 0 0 pmic_arb 101777441 Edge pm8xxx_rtc_alarm
[root@localhost ~]#
[root@localhost ~]#
[root@localhost ~]# cat /proc/interrupts | grep alarm
180: 3 0 0 0 0 0 0 0 pmic_arb 101777441 Edge pm8xxx_rtc_alarm
[root@localhost ~]# echo $(date '+%s' -d '+ 10 seconds') > /sys/class/rtc/rtc0/wakealarm && sleep 10 && cat /proc/interrupts | grep alarm
180: 3 0 0 0 0 0 0 0 pmic_arb 101777441 Edge pm8xxx_rtc_alarm
[root@localhost ~]# timedatectl && sleep 5 && timedatectl
Local time: Wed 1970-01-14 05:20:32 UTC
Universal time: Wed 1970-01-14 05:20:32 UTC
RTC time: Wed 1970-01-14 05:20:32
Time zone: UTC (UTC, +0000)
System clock synchronized: no
NTP service: active
RTC in local TZ: no
Local time: Wed 1970-01-14 05:20:37 UTC
Universal time: Wed 1970-01-14 05:20:37 UTC
RTC time: Wed 1970-01-14 05:20:37
Time zone: UTC (UTC, +0000)
System clock synchronized: no
NTP service: active
RTC in local TZ: no
[root@localhost ~]#
On Mon, 19 Dec 2022 14:09:57 -0500, Eric Chanudet wrote:
> Enable sa8540p-ride rtc on pmic@0.
>
> sa8540p base boards share the same pmics description, currently in
> pm8450a.dtsi. Rename the file to make this explicit and use it in both
> sa8540p-ride.dts and sa8295p-adp.dts.
> Add the missing offset where appropriate for the alarm register bank in
> other qcom,pm8941-rtc description.
>
> [...]
Applied, thanks!
[1/4] arm64: dts: qcom: rename pm8450a dtsi to sa8540p-pmics
commit: 2e1cec6e1b5b525ce1022da0ff6cd2b47532da9a
[2/4] arm64: dts: qcom: sa8450p-pmics: add rtc node
commit: 650fed7806b7298a274a5f9f604d9ae3e0000687
[3/4] arm64: dts: qcom: sa8295p-adp: use sa8540p-pmics
commit: e1deaa8437c4b6ce5a28e98e66d89de99378e72d
[4/4] arm64: dts: qcom: pm8941-rtc add alarm register
commit: ceb01bb895716c18c3dc711af978c19e327444e5
Best regards,
--
Bjorn Andersson <[email protected]>