i.MX PCIe controller is one dual mode PCIe controller, and can work either
as RC or EP.
This series add the i.MX PCIe EP mode support. And had been verified on
i.MX8MQ EVK, i.MX8MM EVK and i.MX8MP EVK boards.
In the verification, one EVK board used as RC, the other one used as EP.
Use the cross TX/RX differential cable connect the two PCIe ports of these
two EVK boards.
+-----------+ +------------+
| PCIe TX |<-------------->|PCIe RX |
| | | |
|EVK Board | |EVK Board |
| | | |
| PCIe RX |<-------------->|PCIe TX |
+-----------+ +------------+
Main changes from v4 -> v5:
- Rebase to v6.2-rc1.
- Follow the clock definitions on i.MX8MP platform refer to the
following commit.
https://patchwork.kernel.org/project/linux-arm-kernel/patch/[email protected]/
Main changes from v3 -> v4:
- Add the Rob's ACK in the dt-binding patch.
- Use "i.MX" to keep spell consistent.
- Squash generic endpoint infrastructure changes of
"[12/14] PCI: imx6: Add iMX8MM PCIe EP mode" into Kconfig changes.
NOTE:
The following commits should be cherried back firstly, when apply this
series.
Shawn's tree (git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git)
d50650500064 arm64: dts: imx8mp-evk: Add PCIe support
9e65987b9584 arm64: dts: imx8mp: Add iMX8MP PCIe support
5506018d3dec soc: imx: imx8mp-blk-ctrl: handle PCIe PHY resets
Philipp's tree (git://git.pengutronix.de/git/pza/linux)
051d9eb40388 reset: imx7: Fix the iMX8MP PCIe PHY PERST support
The PHY changes:
https://patchwork.kernel.org/project/linux-pci/cover/[email protected]/
Main changes from v2 -> v3:
- Add the i.MX8MP PCIe EP support, and verified on i.MX8MP EVK board.
- Rebase to latest pci/next branch(tag: v6.0-rc1 plus some PCIe changes).
Main changes from v1 -> v2:
- Add Rob's ACK into first two commits.
- Rebase to the tag: pci-v5.20-changes of the pci/next branch.
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 3 +++
arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 14 ++++++++++++++
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 20 +++++++++++++++++++
arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 6 ++++++
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 26 +++++++++++++++++++++++++
arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 12 ++++++++++++
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 27 ++++++++++++++++++++++++++
drivers/misc/pci_endpoint_test.c | 2 ++
drivers/pci/controller/dwc/Kconfig | 23 +++++++++++++++++++++-
drivers/pci/controller/dwc/pci-imx6.c | 200 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-----------------
10 files changed, 314 insertions(+), 19 deletions(-)
[PATCH v5 01/14] dt-bindings: imx6q-pcie: Add i.MX8MM PCIe EP mode
[PATCH v5 02/14] dt-bindings: imx6q-pcie: Add i.MX8MQ PCIe EP mode
[PATCH v5 03/14] dt-bindings: imx6q-pcie: Add i.MX8MP PCIe EP mode
[PATCH v5 04/14] arm64: dts: Add i.MX8MM PCIe EP support
[PATCH v5 05/14] arm64: dts: Add i.MX8MM PCIe EP support on EVK board
[PATCH v5 06/14] arm64: dts: Add i.MX8MQ PCIe EP support
[PATCH v5 07/14] arm64: dts: Add i.MX8MQ PCIe EP support on EVK board
[PATCH v5 08/14] arm64: dts: Add i.MX8MP PCIe EP support
[PATCH v5 09/14] arm64: dts: Add i.MX8MP PCIe EP support on EVK board
[PATCH v5 10/14] misc: pci_endpoint_test: Add i.MX8 PCIe EP device
[PATCH v5 11/14] PCI: imx6: Add i.MX PCIe EP mode support
[PATCH v5 12/14] PCI: imx6: Add i.MX8MQ PCIe EP support
[PATCH v5 13/14] PCI: imx6: Add i.MX8MM PCIe EP support
[PATCH v5 14/14] PCI: imx6: Add i.MX8MP PCIe EP support
Add i.MX8MP PCIe EP support on EVK board.
Signed-off-by: Richard Zhu <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
index c4ed505b8707..c0dd04d9f106 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
@@ -404,6 +404,12 @@ &pcie {
status = "okay";
};
+&pcie_ep{
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie0>;
+ status = "disabled";
+};
+
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
--
2.25.1
Add i.MX8MP PCIe endpoint mode compatible string.
Signed-off-by: Richard Zhu <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
index b57f748acafa..f13f87fddb3d 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
@@ -26,6 +26,7 @@ properties:
- fsl,imx8mp-pcie
- fsl,imx8mm-pcie-ep
- fsl,imx8mq-pcie-ep
+ - fsl,imx8mp-pcie-ep
reg:
items:
--
2.25.1
Add i.MX8MM PCIe EP support on EVK board.
Signed-off-by: Richard Zhu <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
index e0b604ac0da4..894118704156 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
@@ -372,6 +372,20 @@ &pcie0 {
status = "okay";
};
+&pcie0_ep{
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie0>;
+ clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>,
+ <&pcie0_refclk>;
+ clock-names = "pcie", "pcie_aux", "pcie_bus";
+ assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
+ <&clk IMX8MM_CLK_PCIE1_CTRL>;
+ assigned-clock-rates = <10000000>, <250000000>;
+ assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
+ <&clk IMX8MM_SYS_PLL2_250M>;
+ status = "disabled";
+};
+
&sai2 {
#sound-dai-cells = <0>;
pinctrl-names = "default";
--
2.25.1
Add i.MX8MM PCIe EP support.
Signed-off-by: Richard Zhu <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 4ee89fdcf59b..8124761f629c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -1293,6 +1293,26 @@ pcie0: pcie@33800000 {
status = "disabled";
};
+ pcie0_ep: pcie_ep@33800000 {
+ compatible = "fsl,imx8mm-pcie-ep";
+ reg = <0x33800000 0x400000>,
+ <0x18000000 0x8000000>;
+ reg-names = "regs", "addr_space";
+ num-lanes = <1>;
+ interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "dma";
+ fsl,max-link-speed = <2>;
+ power-domains = <&pgc_pcie>;
+ resets = <&src IMX8MQ_RESET_PCIE_CTRL_APPS_EN>,
+ <&src IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF>;
+ reset-names = "apps", "turnoff";
+ phys = <&pcie_phy>;
+ phy-names = "pcie-phy";
+ num-ib-windows = <4>;
+ num-ob-windows = <4>;
+ status = "disabled";
+ };
+
gpu_3d: gpu@38000000 {
compatible = "vivante,gc";
reg = <0x38000000 0x8000>;
--
2.25.1
On Mon, 16 Jan 2023 13:41:10 +0800, Richard Zhu wrote:
> i.MX PCIe controller is one dual mode PCIe controller, and can work either
> as RC or EP.
>
> This series add the i.MX PCIe EP mode support. And had been verified on
> i.MX8MQ EVK, i.MX8MM EVK and i.MX8MP EVK boards.
>
> In the verification, one EVK board used as RC, the other one used as EP.
> Use the cross TX/RX differential cable connect the two PCIe ports of these
> two EVK boards.
>
> [...]
dts changes should go via the platform tree.
Applied to pci/imx6, thanks!
[01/14] dt-bindings: imx6q-pcie: Add i.MX8MM PCIe EP mode compatible string
https://git.kernel.org/lpieralisi/pci/c/1af5ea1dc2df
[02/14] dt-bindings: imx6q-pcie: Add i.MX8MQ PCIe EP mode compatible string
https://git.kernel.org/lpieralisi/pci/c/dea44b629ae1
[03/14] dt-bindings: imx6q-pcie: Add i.MX8MP PCIe EP mode compatible string
https://git.kernel.org/lpieralisi/pci/c/2dd6dc57d2da
[10/14] misc: pci_endpoint_test: Add i.MX8 PCIe EP device support
https://git.kernel.org/lpieralisi/pci/c/01ea5ede4197
[11/14] PCI: imx6: Add i.MX PCIe EP mode support
https://git.kernel.org/lpieralisi/pci/c/75c2f26da03f
[12/14] PCI: imx6: Add i.MX8MQ PCIe EP support
https://git.kernel.org/lpieralisi/pci/c/530ba41250b6
[13/14] PCI: imx6: Add i.MX8MM PCIe EP support
https://git.kernel.org/lpieralisi/pci/c/fb3217e2cfc6
[14/14] PCI: imx6: Add i.MX8MP PCIe EP support
https://git.kernel.org/lpieralisi/pci/c/c435669a41dd
Thanks,
Lorenzo
On Mon, Jan 16, 2023 at 01:41:14PM +0800, Richard Zhu wrote:
> Add i.MX8MM PCIe EP support.
>
> Signed-off-by: Richard Zhu <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/imx8mm.dtsi | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index 4ee89fdcf59b..8124761f629c 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -1293,6 +1293,26 @@ pcie0: pcie@33800000 {
> status = "disabled";
> };
>
> + pcie0_ep: pcie_ep@33800000 {
Hyphen is more preferable than underscore in name node.
I fixed it (and the other two patches) up, and applied all DTS patches.
Shawn
> + compatible = "fsl,imx8mm-pcie-ep";
> + reg = <0x33800000 0x400000>,
> + <0x18000000 0x8000000>;
> + reg-names = "regs", "addr_space";
> + num-lanes = <1>;
> + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "dma";
> + fsl,max-link-speed = <2>;
> + power-domains = <&pgc_pcie>;
> + resets = <&src IMX8MQ_RESET_PCIE_CTRL_APPS_EN>,
> + <&src IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF>;
> + reset-names = "apps", "turnoff";
> + phys = <&pcie_phy>;
> + phy-names = "pcie-phy";
> + num-ib-windows = <4>;
> + num-ob-windows = <4>;
> + status = "disabled";
> + };
> +
> gpu_3d: gpu@38000000 {
> compatible = "vivante,gc";
> reg = <0x38000000 0x8000>;
> --
> 2.25.1
>
On Thu, Jan 26, 2023 at 2:47 PM Shawn Guo <[email protected]> wrote:
>
> On Mon, Jan 16, 2023 at 01:41:14PM +0800, Richard Zhu wrote:
> > Add i.MX8MM PCIe EP support.
> >
> > Signed-off-by: Richard Zhu <[email protected]>
> > ---
> > arch/arm64/boot/dts/freescale/imx8mm.dtsi | 20 ++++++++++++++++++++
> > 1 file changed, 20 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > index 4ee89fdcf59b..8124761f629c 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > @@ -1293,6 +1293,26 @@ pcie0: pcie@33800000 {
> > status = "disabled";
> > };
> >
> > + pcie0_ep: pcie_ep@33800000 {
>
> Hyphen is more preferable than underscore in name node.
>
> I fixed it (and the other two patches) up, and applied all DTS patches.
Dropped them, as I just noticed there is v6 of DTS patches being discussed.
Shawn