2023-03-28 03:33:35

by Peng Fan (OSS)

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Subject: [PATCH V2 0/6] arm64: dts: imx8m: update pinctrl to match dtschema

From: Peng Fan <[email protected]>

During the System-ready IR 2.0 check, there are lots dtbs_check warning.
The pinctrl dtschema requires grp in the end, so update pinctrl to address
dtbs_check warning.

V2:
Add more update
With below script to filter out:
grep "pinctrl.*:.*{" ./arch/arm64/boot/dts/freescale/imx* -rn | grep -v "grp {"

Peng Fan (6):
arm64: dts: imx8mn-evk: update i2c pinctrl to match dtschema
arm64: dts: imx8mm-ddr4-evk: update gpmi pinctrl to match dtschema
arm64: dts: imx8mq-librem5: update pinctrl to match dtschema
arm64: dts: imx8mm-emcon: update pinctrl to match dtschema
arm64: dts: imx8mn-bsh-smm: update pinctrl to match dtschema
arm64: dts: imx8mm-prt8mm: update pinctrl to match dtschema

arch/arm64/boot/dts/freescale/imx8mm-ddr4-evk.dts | 2 +-
arch/arm64/boot/dts/freescale/imx8mm-emcon.dtsi | 4 ++--
arch/arm64/boot/dts/freescale/imx8mm-prt8mm.dts | 4 ++--
.../boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi | 6 +++---
arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2.dts | 2 +-
arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts | 4 ++--
arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi | 4 ++--
arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts | 2 +-
arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi | 8 ++++----
9 files changed, 18 insertions(+), 18 deletions(-)

--
2.37.1


2023-03-28 03:34:32

by Peng Fan (OSS)

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Subject: [PATCH V2 1/6] arm64: dts: imx8mn-evk: update i2c pinctrl to match dtschema

From: Peng Fan <[email protected]>

The dtschema requires 'grp' in the end, so update the name.

Signed-off-by: Peng Fan <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi
index 8fef980c4ab2..1443857bfa5f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi
@@ -389,7 +389,7 @@ MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
>;
};

- pinctrl_i2c2_gpio: i2c2grp-gpio {
+ pinctrl_i2c2_gpio: i2c2gpiogrp {
fsl,pins = <
MX8MN_IOMUXC_I2C2_SCL_GPIO5_IO16 0x1c3
MX8MN_IOMUXC_I2C2_SDA_GPIO5_IO17 0x1c3
@@ -403,7 +403,7 @@ MX8MN_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
>;
};

- pinctrl_i2c3_gpio: i2c3grp-gpio {
+ pinctrl_i2c3_gpio: i2c3gpiogrp {
fsl,pins = <
MX8MN_IOMUXC_I2C3_SCL_GPIO5_IO18 0x1c3
MX8MN_IOMUXC_I2C3_SDA_GPIO5_IO19 0x1c3
--
2.37.1

2023-03-28 03:34:49

by Peng Fan (OSS)

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Subject: [PATCH V2 3/6] arm64: dts: imx8mq-librem5: update pinctrl to match dtschema

From: Peng Fan <[email protected]>

The dtschema requires 'grp' in the end, so update the name.

Signed-off-by: Peng Fan <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts | 2 +-
arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi | 8 ++++----
2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts b/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts
index 7605802f294d..ce7ce2ba855c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts
@@ -667,7 +667,7 @@ MX8MQ_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0xc6 /* MIC_SEL */
>;
};

- pinctrl_spkamp: spkamp {
+ pinctrl_spkamp: spkampgrp {
fsl,pins = <
MX8MQ_IOMUXC_SPDIF_TX_GPIO5_IO3 0x81 /* MUTE */
>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
index b3de4947762f..d0d013226d88 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
@@ -662,7 +662,7 @@ MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
>;
};

- pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+ pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
fsl,pins = <
MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x8d
MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xcd
@@ -679,7 +679,7 @@ MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
>;
};

- pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+ pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
fsl,pins = <
MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x9f
MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xdf
@@ -709,7 +709,7 @@ MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
>;
};

- pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
+ pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
fsl,pins = <
MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x80
MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x8d
@@ -722,7 +722,7 @@ MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
>;
};

- pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
+ pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
fsl,pins = <
MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x80
MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x9f
--
2.37.1

2023-03-28 03:34:55

by Peng Fan (OSS)

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Subject: [PATCH V2 2/6] arm64: dts: imx8mm-ddr4-evk: update gpmi pinctrl to match dtschema

From: Peng Fan <[email protected]>

The dtschema requires 'grp' in the end, so update the name.

Signed-off-by: Peng Fan <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mm-ddr4-evk.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-ddr4-evk.dts b/arch/arm64/boot/dts/freescale/imx8mm-ddr4-evk.dts
index 6c079c0a3a48..010e836ebe5c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-ddr4-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-ddr4-evk.dts
@@ -28,7 +28,7 @@ &gpmi {
};

&iomuxc {
- pinctrl_gpmi_nand: gpmi-nand {
+ pinctrl_gpmi_nand: gpminandgrp {
fsl,pins = <
MX8MM_IOMUXC_NAND_ALE_RAWNAND_ALE 0x00000096
MX8MM_IOMUXC_NAND_CE0_B_RAWNAND_CE0_B 0x00000096
--
2.37.1

2023-03-28 03:45:31

by Peng Fan (OSS)

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Subject: [PATCH V2 6/6] arm64: dts: imx8mm-prt8mm: update pinctrl to match dtschema

From: Peng Fan <[email protected]>

The dtschema requires 'grp' in the end, so update the name

Signed-off-by: Peng Fan <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mm-prt8mm.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-prt8mm.dts b/arch/arm64/boot/dts/freescale/imx8mm-prt8mm.dts
index 9fbbbb556c0b..1eb1fe7ebde8 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-prt8mm.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-prt8mm.dts
@@ -264,7 +264,7 @@ MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
>;
};

- pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
+ pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
fsl,pins = <
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
@@ -280,7 +280,7 @@ MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
>;
};

- pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
+ pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
fsl,pins = <
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
--
2.37.1

2023-03-28 03:48:07

by Peng Fan (OSS)

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Subject: [PATCH V2 4/6] arm64: dts: imx8mm-emcon: update pinctrl to match dtschema

From: Peng Fan <[email protected]>

The dtschema requires 'grp' in the end, so update the name

Signed-off-by: Peng Fan <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mm-emcon.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-emcon.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-emcon.dtsi
index 3d859a350bd5..4e9e58acd262 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-emcon.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-emcon.dtsi
@@ -124,7 +124,7 @@ MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82
>;
};

- pinctrl_ecspi1_cs: ecspi1-cs {
+ pinctrl_ecspi1_cs: ecspi1cs-grp {
fsl,pins = <
MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x40000
MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x40000
@@ -215,7 +215,7 @@ MX8MM_IOMUXC_SAI5_RXFS_GPIO3_IO19 0x41
>;
};

- pinctrl_pmic: pmic-irq {
+ pinctrl_pmic: pmicirq-grp {
fsl,pins = <
MX8MM_IOMUXC_NAND_CE1_B_GPIO3_IO2 0x41
>;
--
2.37.1

2023-03-28 03:50:47

by Peng Fan (OSS)

[permalink] [raw]
Subject: [PATCH V2 5/6] arm64: dts: imx8mn-bsh-smm: update pinctrl to match dtschema

From: Peng Fan <[email protected]>

The dtschema requires 'grp' in the end, so update the name

Signed-off-by: Peng Fan <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi | 6 +++---
arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2.dts | 2 +-
arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts | 4 ++--
3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
index c11895d9d582..8e100e71b8d2 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
@@ -341,7 +341,7 @@ MX8MN_IOMUXC_I2C4_SDA_I2C4_SDA 0x400000c2
>;
};

- pinctrl_pmic: pmicirq {
+ pinctrl_pmic: pmicirqgrp {
fsl,pins = <
MX8MN_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x040
>;
@@ -381,7 +381,7 @@ MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x0d0
>;
};

- pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
+ pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
fsl,pins = <
MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x094
MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x0d4
@@ -392,7 +392,7 @@ MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x0d4
>;
};

- pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
+ pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
fsl,pins = <
MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x096
MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x0d6
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2.dts b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2.dts
index 33f98582eace..7acc5a960dd9 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2.dts
@@ -26,7 +26,7 @@ &gpmi {
};

&iomuxc {
- pinctrl_gpmi_nand: gpmi-nand {
+ pinctrl_gpmi_nand: gpminandgrp {
fsl,pins = <
MX8MN_IOMUXC_NAND_ALE_RAWNAND_ALE 0x00000096
MX8MN_IOMUXC_NAND_CE0_B_RAWNAND_CE0_B 0x00000096
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts
index fbbb3367037b..c6ad65becc97 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts
@@ -136,7 +136,7 @@ MX8MN_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x090
>;
};

- pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+ pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
fsl,pins = <
MX8MN_IOMUXC_SD1_CLK_USDHC1_CLK 0x40000094
MX8MN_IOMUXC_SD1_CMD_USDHC1_CMD 0x0d4
@@ -152,7 +152,7 @@ MX8MN_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x094
>;
};

- pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+ pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
fsl,pins = <
MX8MN_IOMUXC_SD1_CLK_USDHC1_CLK 0x40000096
MX8MN_IOMUXC_SD1_CMD_USDHC1_CMD 0x0d6
--
2.37.1

2023-04-05 14:21:56

by Shawn Guo

[permalink] [raw]
Subject: Re: [PATCH V2 0/6] arm64: dts: imx8m: update pinctrl to match dtschema

On Tue, Mar 28, 2023 at 11:36:34AM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <[email protected]>
>
> During the System-ready IR 2.0 check, there are lots dtbs_check warning.
> The pinctrl dtschema requires grp in the end, so update pinctrl to address
> dtbs_check warning.
>
> V2:
> Add more update
> With below script to filter out:
> grep "pinctrl.*:.*{" ./arch/arm64/boot/dts/freescale/imx* -rn | grep -v "grp {"
>
> Peng Fan (6):
> arm64: dts: imx8mn-evk: update i2c pinctrl to match dtschema
> arm64: dts: imx8mm-ddr4-evk: update gpmi pinctrl to match dtschema
> arm64: dts: imx8mq-librem5: update pinctrl to match dtschema
> arm64: dts: imx8mm-emcon: update pinctrl to match dtschema
> arm64: dts: imx8mn-bsh-smm: update pinctrl to match dtschema
> arm64: dts: imx8mm-prt8mm: update pinctrl to match dtschema

Applied all, thanks!