Changes since v5:
-----------------
- v5 can be viewed here: https://lore.kernel.org/linux-arm-msm/[email protected]/
- Collected Ack from Rob for [PATCH 01/11].
- Addressed Georgi's comment about interconnect cells in [PATCH 10/11].
Changes since v4:
-----------------
- v4 can be viewed here: https://lore.kernel.org/linux-arm-msm/[email protected]/
- Collected R-Bs from Konrad for a couple of patches sent in v4.
- Fixed incorrect email IDs for a couple of patches sent in v3, which I used for
some patches created on a different work machine.
- No functional changes since v3.
Changes since v3:
-----------------
- v3 can be viewed here: https://lore.kernel.org/linux-arm-msm/[email protected]/
- Collected Acks from Krzysztof for a couple of patches sent in v3.
- Fixed review comments from Krzysztof regarding DMA binding document
and also added a couple of new patches which are required to fix the
'dtbs_check' errors highlighted after this fix.
Changes since v2:
-----------------
- v2 can be viewed here: https://lore.kernel.org/linux-arm-msm/[email protected]/
- No functional change since v2. As the sdm845 patch from v1 was accepted in linux-next,
dropped it from this version.
Changes since v1:
-----------------
- v1 can be viewed here: https://lore.kernel.org/linux-arm-msm/[email protected]/
- Folded the BAM DMA dt-binding change.
(sent earlier as: https://lore.kernel.org/linux-arm-msm/[email protected]/)
- Folded the QCE dt-binding change.
(sent earlier as: https://lore.kernel.org/linux-arm-msm/[email protected]/)
- Folded Neil's SM8450 dts patch in this series.
- Addressed review comments from Rob, Stephan and Konrad.
- Collected Konrad's R-B for [PATCH 5/9].
This patchset enables Crypto Engine support for Qualcomm SoCs like
SM6115, SM8150, SM8250, SM8350 and SM8450.
Note that:
- SM8250 crypto engine patch utilizes the work already done by myself and
Vladimir.
- SM8350 crypto engine patch utilizes the work already done by Robert.
- SM8450 crypto engine patch utilizes the work already done by Neil.
Also this patchset is rebased on linux-next/master.
Bhupesh Sharma (10):
dt-bindings: dma: Add support for SM6115 and QCM2290 SoCs
dt-bindings: dma: Increase iommu maxItems for BAM DMA
arm64: dts: qcom: sdm8550: Fix the BAM DMA engine compatible string
arm64: dts: qcom: sdm845: Fix the slimbam DMA engine compatible string
dt-bindings: qcom-qce: Fix compatible combinations for SM8150 and
IPQ4019 SoCs
dt-bindings: qcom-qce: Add compatibles for SM6115 and QCM2290
arm64: dts: qcom: sm6115: Add Crypto Engine support
arm64: dts: qcom: sm8150: Add Crypto Engine support
arm64: dts: qcom: sm8250: Add Crypto Engine support
arm64: dts: qcom: sm8350: Add Crypto Engine support
Neil Armstrong (1):
arm64: dts: qcom: sm8450: add crypto nodes
.../devicetree/bindings/crypto/qcom-qce.yaml | 8 ++++++
.../devicetree/bindings/dma/qcom,bam-dma.yaml | 22 +++++++++------
arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
arch/arm64/boot/dts/qcom/sm6115.dtsi | 22 +++++++++++++++
arch/arm64/boot/dts/qcom/sm8150.dtsi | 22 +++++++++++++++
arch/arm64/boot/dts/qcom/sm8250.dtsi | 22 +++++++++++++++
arch/arm64/boot/dts/qcom/sm8350.dtsi | 22 +++++++++++++++
arch/arm64/boot/dts/qcom/sm8450.dtsi | 28 +++++++++++++++++++
arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 +-
9 files changed, 140 insertions(+), 10 deletions(-)
--
2.38.1
Add new compatible for BAM DMA engine version v1.7.4 which is
found on Qualcomm SM6115 and QCM2290 SoCs. Since its very similar
to v1.7.0 used on SM8150 like SoCs, mark the comptible scheme
accordingly.
While at it, also update qcom,bam-dma bindings to add comments
which describe the BAM DMA versions used in SM8150 and SM8250 SoCs.
This provides an easy reference for identifying the actual BAM DMA
version available on Qualcomm SoCs.
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Bhupesh Sharma <[email protected]>
---
.../devicetree/bindings/dma/qcom,bam-dma.yaml | 20 ++++++++++++-------
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml b/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml
index f1ddcf672261..c663b6102f50 100644
--- a/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml
+++ b/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml
@@ -15,13 +15,19 @@ allOf:
properties:
compatible:
- enum:
- # APQ8064, IPQ8064 and MSM8960
- - qcom,bam-v1.3.0
- # MSM8974, APQ8074 and APQ8084
- - qcom,bam-v1.4.0
- # MSM8916 and SDM845
- - qcom,bam-v1.7.0
+ oneOf:
+ - enum:
+ # APQ8064, IPQ8064 and MSM8960
+ - qcom,bam-v1.3.0
+ # MSM8974, APQ8074 and APQ8084
+ - qcom,bam-v1.4.0
+ # MSM8916, SDM630
+ - qcom,bam-v1.7.0
+ - items:
+ - enum:
+ # SDM845, SM6115, SM8150, SM8250 and QCM2290
+ - qcom,bam-v1.7.4
+ - const: qcom,bam-v1.7.0
clocks:
maxItems: 1
--
2.38.1
Since SM8450 BAM DMA engine supports five iommu entries,
increase the maxItems in the iommu property section, without
which 'dtbs_check' reports the following error:
arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx224.dtb:
dma-controller@1dc4000: iommus: is too long
Acked-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Bhupesh Sharma <[email protected]>
---
Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml b/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml
index c663b6102f50..5636d38f712a 100644
--- a/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml
+++ b/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml
@@ -44,7 +44,7 @@ properties:
iommus:
minItems: 1
- maxItems: 4
+ maxItems: 5
num-channels:
$ref: /schemas/types.yaml#/definitions/uint32
--
2.38.1
As per documentation, Qualcomm SM8550 SoC supports BAM DMA
engine v1.7.4, so use the correct compatible strings.
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Bhupesh Sharma <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index 9c24af40ee61..774e3295081c 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -1841,7 +1841,7 @@ pcie1_phy: phy@1c0e000 {
};
cryptobam: dma-controller@1dc4000 {
- compatible = "qcom,bam-v1.7.0";
+ compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
reg = <0x0 0x01dc4000 0x0 0x28000>;
interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
--
2.38.1
As per documentation, Qualcomm SDM845 SoC supports SLIMBAM DMA
engine v1.7.4, so use the correct compatible strings.
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Bhupesh Sharma <[email protected]>
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 2f32179c7d1b..17a29184884c 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -5152,7 +5152,7 @@ msi-controller@17a40000 {
};
slimbam: dma-controller@17184000 {
- compatible = "qcom,bam-v1.7.0";
+ compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
qcom,controlled-remotely;
reg = <0 0x17184000 0 0x2a000>;
num-channels = <31>;
--
2.38.1
Currently the compatible list available in 'qce' dt-bindings does not
support SM8150 and IPQ4019 SoCs directly which may lead to potential
'dtbs_check' error(s).
Fix the same.
Fixes: 00f3bc2db351 ("dt-bindings: qcom-qce: Add new SoC compatible strings for Qualcomm QCE IP")
Reviewed-by: Vladimir Zapolskiy <[email protected]>
Signed-off-by: Bhupesh Sharma <[email protected]>
---
Documentation/devicetree/bindings/crypto/qcom-qce.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
index e375bd981300..90ddf98a6df9 100644
--- a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
+++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
@@ -24,6 +24,12 @@ properties:
deprecated: true
description: Kept only for ABI backward compatibility
+ - items:
+ - enum:
+ - qcom,ipq4019-qce
+ - qcom,sm8150-qce
+ - const: qcom,qce
+
- items:
- enum:
- qcom,ipq6018-qce
--
2.38.1
Add crypto engine (CE) and CE BAM related nodes and definitions to
'sm6115.dtsi'.
Signed-off-by: Bhupesh Sharma <[email protected]>
---
arch/arm64/boot/dts/qcom/sm6115.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index 2a51c938bbcb..ebac026b4cc7 100644
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -650,6 +650,28 @@ usb_hsphy: phy@1613000 {
status = "disabled";
};
+ cryptobam: dma-controller@1b04000 {
+ compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
+ reg = <0x0 0x01b04000 0x0 0x24000>;
+ interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ qcom,controlled-remotely;
+ num-channels = <8>;
+ qcom,num-ees = <2>;
+ iommus = <&apps_smmu 0x94 0x11>,
+ <&apps_smmu 0x96 0x11>;
+ };
+
+ crypto: crypto@1b3a000 {
+ compatible = "qcom,sm6115-qce", "qcom,sm8150-qce", "qcom,qce";
+ reg = <0x0 0x01b3a000 0x0 0x6000>;
+ dmas = <&cryptobam 6>, <&cryptobam 7>;
+ dma-names = "rx", "tx";
+ iommus = <&apps_smmu 0x94 0x11>,
+ <&apps_smmu 0x96 0x11>;
+ };
+
qfprom@1b40000 {
compatible = "qcom,sm6115-qfprom", "qcom,qfprom";
reg = <0x0 0x01b40000 0x0 0x7000>;
--
2.38.1
Add crypto engine (CE) and CE BAM related nodes and definitions to
'sm8350.dtsi'.
Co-developed-by and Signed-off-by: Robert Foss <[email protected]>
[Bhupesh: Switch to '#interconnect-cells = <2>', available since commit 4f287e31ff5f]
Signed-off-by: Bhupesh Sharma <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index 7fbc288eca58..d0677d9076a5 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -1730,6 +1730,28 @@ ufs_mem_phy_lanes: phy@1d87400 {
};
};
+ cryptobam: dma-controller@1dc4000 {
+ compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
+ reg = <0 0x01dc4000 0 0x24000>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ qcom,controlled-remotely;
+ iommus = <&apps_smmu 0x594 0x0011>,
+ <&apps_smmu 0x596 0x0011>;
+ };
+
+ crypto: crypto@1dfa000 {
+ compatible = "qcom,sm8350-qce", "qcom,sm8150-qce", "qcom,qce";
+ reg = <0 0x01dfa000 0 0x6000>;
+ dmas = <&cryptobam 4>, <&cryptobam 5>;
+ dma-names = "rx", "tx";
+ iommus = <&apps_smmu 0x594 0x0011>,
+ <&apps_smmu 0x596 0x0011>;
+ interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>;
+ interconnect-names = "memory";
+ };
+
ipa: ipa@1e40000 {
compatible = "qcom,sm8350-ipa";
--
2.38.1
On 5.04.2023 09:28, Bhupesh Sharma wrote:
> Add crypto engine (CE) and CE BAM related nodes and definitions to
> 'sm6115.dtsi'.
>
> Signed-off-by: Bhupesh Sharma <[email protected]>
> ---
Reviewed-by: Konrad Dybcio <[email protected]>
Tested-by: Konrad Dybcio <[email protected]>
Konrad
> arch/arm64/boot/dts/qcom/sm6115.dtsi | 22 ++++++++++++++++++++++
> 1 file changed, 22 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> index 2a51c938bbcb..ebac026b4cc7 100644
> --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> @@ -650,6 +650,28 @@ usb_hsphy: phy@1613000 {
> status = "disabled";
> };
>
> + cryptobam: dma-controller@1b04000 {
> + compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
> + reg = <0x0 0x01b04000 0x0 0x24000>;
> + interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
> + #dma-cells = <1>;
> + qcom,ee = <0>;
> + qcom,controlled-remotely;
> + num-channels = <8>;
> + qcom,num-ees = <2>;
> + iommus = <&apps_smmu 0x94 0x11>,
> + <&apps_smmu 0x96 0x11>;
> + };
> +
> + crypto: crypto@1b3a000 {
> + compatible = "qcom,sm6115-qce", "qcom,sm8150-qce", "qcom,qce";
> + reg = <0x0 0x01b3a000 0x0 0x6000>;
> + dmas = <&cryptobam 6>, <&cryptobam 7>;
> + dma-names = "rx", "tx";
> + iommus = <&apps_smmu 0x94 0x11>,
> + <&apps_smmu 0x96 0x11>;
> + };
> +
> qfprom@1b40000 {
> compatible = "qcom,sm6115-qfprom", "qcom,qfprom";
> reg = <0x0 0x01b40000 0x0 0x7000>;
> This patchset enables Crypto Engine support for Qualcomm SoCs like
> SM6115, SM8150, SM8250, SM8350 and SM8450.
>
> Note that:
> - SM8250 crypto engine patch utilizes the work already done by myself and
> Vladimir.
> - SM8350 crypto engine patch utilizes the work already done by Robert.
> - SM8450 crypto engine patch utilizes the work already done by Neil.
>
> Also this patchset is rebased on linux-next/master.
These patches tested on top of Linux next-20230406.
Tested-by: Anders Roxell <[email protected]>
Tested-by: Linux Kernel Functional Testing <[email protected]>
--
Linaro LKFT
https://lkft.linaro.org
On Wed, 05 Apr 2023 12:58:30 +0530, Bhupesh Sharma wrote:
> Currently the compatible list available in 'qce' dt-bindings does not
> support SM8150 and IPQ4019 SoCs directly which may lead to potential
> 'dtbs_check' error(s).
>
> Fix the same.
>
> Fixes: 00f3bc2db351 ("dt-bindings: qcom-qce: Add new SoC compatible strings for Qualcomm QCE IP")
> Reviewed-by: Vladimir Zapolskiy <[email protected]>
> Signed-off-by: Bhupesh Sharma <[email protected]>
> ---
> Documentation/devicetree/bindings/crypto/qcom-qce.yaml | 6 ++++++
> 1 file changed, 6 insertions(+)
>
Acked-by: Rob Herring <[email protected]>