2023-04-21 22:34:37

by Krzysztof Kozlowski

Subject: [PATCH] arm64: dts: freescale: add missing cache properties

As all level 2 and level 3 caches are unified, add required
cache-unified properties to fix warnings like:

fsl-ls2080a-simu.dtb: l2-cache3: 'cache-unified' is a required property

Signed-off-by: Krzysztof Kozlowski <[email protected]>

---

Please take the patch via sub-arch SoC tree.
---
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 1 +
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 1 +
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 1 +
arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 4 ++++
arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 4 ++++
5 files changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 678bb0358751..9cbb31191cf9 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -47,6 +47,7 @@ cpu1: cpu@1 {
l2: l2-cache {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
};

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index b9fd24cdc919..f8acbefc805b 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -85,6 +85,7 @@ cpu3: cpu@3 {
l2: l2-cache {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
};

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index a01e3cfec77f..50f68ca5a9af 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -80,6 +80,7 @@ cpu3: cpu@3 {
l2: l2-cache {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
};

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
index 1e5d76c4d83d..1aa38ed09aa4 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
@@ -96,21 +96,25 @@ cpu7: cpu@301 {
cluster0_l2: l2-cache0 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};

cluster1_l2: l2-cache1 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};

cluster2_l2: l2-cache2 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};

cluster3_l2: l2-cache3 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};

CPU_PW20: cpu-pw20 {
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
index c12c86915ec8..8581ea55d254 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
@@ -96,21 +96,25 @@ cpu7: cpu@301 {
cluster0_l2: l2-cache0 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};

cluster1_l2: l2-cache1 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};

cluster2_l2: l2-cache2 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};

cluster3_l2: l2-cache3 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};

CPU_PW20: cpu-pw20 {
--
2.34.1

2023-05-14 03:54:39

by Shawn Guo

Subject: Re: [PATCH] arm64: dts: freescale: add missing cache properties

On Sat, Apr 22, 2023 at 12:32:06AM +0200, Krzysztof Kozlowski wrote:
> As all level 2 and level 3 caches are unified, add required
> cache-unified properties to fix warnings like:
>
> fsl-ls2080a-simu.dtb: l2-cache3: 'cache-unified' is a required property
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>

Applied, thanks!