2023-05-10 02:01:33

by Changhuang Liang

[permalink] [raw]
Subject: [PATCH v3 0/5] Add JH7110 AON PMU support

This patchset adds aon power domain driver for the StarFive JH7110 SoC.
It is used to turn on/off dphy rx/tx power switch. It also can use syscon
operation. The series has been tested on the VisionFive 2 board.

This patchset should be applied after the patchset [1]:
[1] https://lore.kernel.org/all/[email protected]/

changes since v2:
- Updated commit message.
- Changed "starfive,jh7110-aon-pmu" to "starfive,jh7110-aon-syscon".
- Dropped patch 3: Modify ioremap to regmap.
- Changed "pmu_parse_dt" to "pmu_parse_irq".
- Dropped "pmu_parse_dt" function in aon pmu.
- Changed copyright to "2022-2023" in "starfive,jh7110-pmu.h".
- Replaced regread/regwrite operation with io_read/io_write operation.

v2: https://lore.kernel.org/all/[email protected]/

changes since v1:
- Updated commit message.
- Changed "starfive,jh7110-pmu-dphy" to "starfive,jh7110-aon-pmu".
- Put if condition under allOf in .yaml file.
- Updated spelling error.
- Dropped patch 4: Add pmu type operation.
- Changed "jh71xx_pmu_general_set_state" to "jh7110_pmu_set_state" and moved it in call back.
- Changed "jh7110_pmu_general_parse_dt" to "jh7110_pmu_parse_dt" and moved it in call back.
- Used pmu_status save the pmu status offset.
- Changed "JH71XX_PMU_DPHY_SWITCH" to "JH71XX_AON_PMU_SWITCH"
- Changed copyright to "2022-2023"

v1: https://lore.kernel.org/all/[email protected]/


Changhuang Liang (5):
dt-bindings: power: Add JH7110 AON PMU support
soc: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE
soc: starfive: Extract JH7110 pmu private operations
soc: starfive: Add JH7110 AON PMU support
riscv: dts: starfive: jh7110: Add AON PMU node

.../bindings/power/starfive,jh7110-pmu.yaml | 28 +++-
MAINTAINERS | 1 +
arch/riscv/boot/dts/starfive/jh7110.dtsi | 6 +
drivers/soc/starfive/Kconfig | 4 +-
drivers/soc/starfive/jh71xx_pmu.c | 138 ++++++++++++++----
.../dt-bindings/power/starfive,jh7110-pmu.h | 5 +-
6 files changed, 148 insertions(+), 34 deletions(-)


base-commit: 197b6b60ae7bc51dd0814953c562833143b292aa
--
2.25.1


2023-05-10 02:02:22

by Changhuang Liang

[permalink] [raw]
Subject: [PATCH v3 4/5] soc: starfive: Add JH7110 AON PMU support

Add AON PMU for StarFive JH7110 SoC. It can be used to turn on/off the
dphy rx/tx power switch.

Reviewed-by: Walker Chen <[email protected]>
Signed-off-by: Changhuang Liang <[email protected]>
---
MAINTAINERS | 1 +
drivers/soc/starfive/jh71xx_pmu.c | 57 ++++++++++++++++++++++++++++---
2 files changed, 53 insertions(+), 5 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 4c0b39c44957..ce0befe39394 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -19939,6 +19939,7 @@ F: include/dt-bindings/reset/starfive?jh71*.h

STARFIVE JH71XX PMU CONTROLLER DRIVER
M: Walker Chen <[email protected]>
+M: Changhuang Liang <[email protected]>
S: Supported
F: Documentation/devicetree/bindings/power/starfive*
F: drivers/soc/starfive/jh71xx_pmu.c
diff --git a/drivers/soc/starfive/jh71xx_pmu.c b/drivers/soc/starfive/jh71xx_pmu.c
index 0dbdcc0d2c91..c7b474409cf7 100644
--- a/drivers/soc/starfive/jh71xx_pmu.c
+++ b/drivers/soc/starfive/jh71xx_pmu.c
@@ -2,7 +2,7 @@
/*
* StarFive JH71XX PMU (Power Management Unit) Controller Driver
*
- * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ * Copyright (C) 2022-2023 StarFive Technology Co., Ltd.
*/

#include <linux/interrupt.h>
@@ -24,6 +24,9 @@
#define JH71XX_PMU_EVENT_STATUS 0x88
#define JH71XX_PMU_INT_STATUS 0x8C

+/* aon pmu register offset */
+#define JH71XX_AON_PMU_SWITCH 0x00
+
/* sw encourage cfg */
#define JH71XX_PMU_SW_ENCOURAGE_EN_LO 0x05
#define JH71XX_PMU_SW_ENCOURAGE_EN_HI 0x50
@@ -160,6 +163,26 @@ static int jh7110_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
return 0;
}

+static int jh7110_aon_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
+{
+ struct jh71xx_pmu *pmu = pmd->pmu;
+ unsigned long flags;
+ u32 val;
+
+ spin_lock_irqsave(&pmu->lock, flags);
+ val = readl(pmu->base + JH71XX_AON_PMU_SWITCH);
+
+ if (on)
+ val |= mask;
+ else
+ val &= ~mask;
+
+ writel(val, pmu->base + JH71XX_AON_PMU_SWITCH);
+ spin_unlock_irqrestore(&pmu->lock, flags);
+
+ return 0;
+}
+
static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
{
struct jh71xx_pmu *pmu = pmd->pmu;
@@ -317,10 +340,12 @@ static int jh71xx_pmu_probe(struct platform_device *pdev)
if (!match_data)
return -EINVAL;

- ret = match_data->pmu_parse_irq(pdev, pmu);
- if (ret) {
- dev_err(dev, "failed to parse irq\n");
- return ret;
+ if (match_data->pmu_parse_irq) {
+ ret = match_data->pmu_parse_irq(pdev, pmu);
+ if (ret) {
+ dev_err(dev, "failed to parse irq\n");
+ return ret;
+ }
}

pmu->genpd = devm_kcalloc(dev, match_data->num_domains,
@@ -394,10 +419,31 @@ static const struct jh71xx_pmu_match_data jh7110_pmu = {
.pmu_set_state = jh7110_pmu_set_state,
};

+static const struct jh71xx_domain_info jh7110_aon_power_domains[] = {
+ [JH7110_PD_DPHY_TX] = {
+ .name = "DPHY-TX",
+ .bit = 30,
+ },
+ [JH7110_PD_DPHY_RX] = {
+ .name = "DPHY-RX",
+ .bit = 31,
+ },
+};
+
+static const struct jh71xx_pmu_match_data jh7110_aon_pmu = {
+ .num_domains = ARRAY_SIZE(jh7110_aon_power_domains),
+ .domain_info = jh7110_aon_power_domains,
+ .pmu_status = JH71XX_AON_PMU_SWITCH,
+ .pmu_set_state = jh7110_aon_pmu_set_state,
+};
+
static const struct of_device_id jh71xx_pmu_of_match[] = {
{
.compatible = "starfive,jh7110-pmu",
.data = (void *)&jh7110_pmu,
+ }, {
+ .compatible = "starfive,jh7110-aon-syscon",
+ .data = (void *)&jh7110_aon_pmu,
}, {
/* sentinel */
}
@@ -414,5 +460,6 @@ static struct platform_driver jh71xx_pmu_driver = {
builtin_platform_driver(jh71xx_pmu_driver);

MODULE_AUTHOR("Walker Chen <[email protected]>");
+MODULE_AUTHOR("Changhuang Liang <[email protected]>");
MODULE_DESCRIPTION("StarFive JH71XX PMU Driver");
MODULE_LICENSE("GPL");
--
2.25.1

2023-05-10 02:02:50

by Changhuang Liang

[permalink] [raw]
Subject: [PATCH v3 1/5] dt-bindings: power: Add JH7110 AON PMU support

Add AON PMU for StarFive JH7110 SoC, it can be used to turn on/off DPHY
rx/tx power switch, and it don't need the property of interrupts. It
also can use syscon operation.

Signed-off-by: Changhuang Liang <[email protected]>
---
.../bindings/power/starfive,jh7110-pmu.yaml | 28 +++++++++++++++++--
.../dt-bindings/power/starfive,jh7110-pmu.h | 5 +++-
2 files changed, 29 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml b/Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml
index 98eb8b4110e7..0591a4e9db6c 100644
--- a/Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml
+++ b/Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml
@@ -8,6 +8,7 @@ title: StarFive JH7110 Power Management Unit

maintainers:
- Walker Chen <[email protected]>
+ - Changhuang Liang <[email protected]>

description: |
StarFive JH7110 SoC includes support for multiple power domains which can be
@@ -15,8 +16,13 @@ description: |

properties:
compatible:
- enum:
- - starfive,jh7110-pmu
+ oneOf:
+ - enum:
+ - starfive,jh7110-pmu
+ - items:
+ - enum:
+ - starfive,jh7110-aon-syscon
+ - const: syscon

reg:
maxItems: 1
@@ -30,9 +36,18 @@ properties:
required:
- compatible
- reg
- - interrupts
- "#power-domain-cells"

+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: starfive,jh7110-pmu
+ then:
+ required:
+ - interrupts
+
additionalProperties: false

examples:
@@ -43,3 +58,10 @@ examples:
interrupts = <111>;
#power-domain-cells = <1>;
};
+
+ - |
+ aon_syscon: syscon@17010000 {
+ compatible = "starfive,jh7110-aon-syscon", "syscon";
+ reg = <0x17010000 0x1000>;
+ #power-domain-cells = <1>;
+ };
diff --git a/include/dt-bindings/power/starfive,jh7110-pmu.h b/include/dt-bindings/power/starfive,jh7110-pmu.h
index 132bfe401fc8..341e2a0676ba 100644
--- a/include/dt-bindings/power/starfive,jh7110-pmu.h
+++ b/include/dt-bindings/power/starfive,jh7110-pmu.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
/*
- * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ * Copyright (C) 2022-2023 StarFive Technology Co., Ltd.
* Author: Walker Chen <[email protected]>
*/
#ifndef __DT_BINDINGS_POWER_JH7110_POWER_H__
@@ -14,4 +14,7 @@
#define JH7110_PD_ISP 5
#define JH7110_PD_VENC 6

+#define JH7110_PD_DPHY_TX 0
+#define JH7110_PD_DPHY_RX 1
+
#endif
--
2.25.1

2023-05-10 07:30:08

by Conor Dooley

[permalink] [raw]
Subject: Re: [PATCH v3 1/5] dt-bindings: power: Add JH7110 AON PMU support

On Tue, May 09, 2023 at 06:53:07PM -0700, Changhuang Liang wrote:
> Add AON PMU for StarFive JH7110 SoC, it can be used to turn on/off DPHY
> rx/tx power switch, and it don't need the property of interrupts. It
> also can use syscon operation.
>
> Signed-off-by: Changhuang Liang <[email protected]>
> ---
> .../bindings/power/starfive,jh7110-pmu.yaml | 28 +++++++++++++++++--
> .../dt-bindings/power/starfive,jh7110-pmu.h | 5 +++-
> 2 files changed, 29 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml b/Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml
> index 98eb8b4110e7..0591a4e9db6c 100644
> --- a/Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml
> +++ b/Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml
> @@ -8,6 +8,7 @@ title: StarFive JH7110 Power Management Unit
>
> maintainers:
> - Walker Chen <[email protected]>
> + - Changhuang Liang <[email protected]>
>
> description: |
> StarFive JH7110 SoC includes support for multiple power domains which can be
> @@ -15,8 +16,13 @@ description: |
>
> properties:
> compatible:
> - enum:
> - - starfive,jh7110-pmu
> + oneOf:
> + - enum:
> + - starfive,jh7110-pmu
> + - items:
> + - enum:
> + - starfive,jh7110-aon-syscon
> + - const: syscon

Unfortunately, this is not what was wanted.
This syscon, of which power domain control is just one of the things that
it can do, should be documented in
Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
alongside it's brethern "starfive,jh7110-sys-syscon" &
"starfive,jh7110-stg-syscon".

Thanks,
Conor.


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2023-05-10 07:44:15

by Changhuang Liang

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Subject: Re: [PATCH v3 1/5] dt-bindings: power: Add JH7110 AON PMU support



On 2023/5/10 15:06, Conor Dooley wrote:
> On Tue, May 09, 2023 at 06:53:07PM -0700, Changhuang Liang wrote:
>> + - starfive,jh7110-pmu
>> + - items:
>> + - enum:
>> + - starfive,jh7110-aon-syscon
>> + - const: syscon
>
> Unfortunately, this is not what was wanted.
> This syscon, of which power domain control is just one of the things that
> it can do, should be documented in
> Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
> alongside it's brethern "starfive,jh7110-sys-syscon" &
> "starfive,jh7110-stg-syscon".
>

That means that I don't need to modify this original yaml file?
I just need to move current changes in this patch into
"Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml"?

Thanks,
Changhuang

2023-05-10 19:58:56

by Conor Dooley

[permalink] [raw]
Subject: Re: [PATCH v3 1/5] dt-bindings: power: Add JH7110 AON PMU support

On Wed, May 10, 2023 at 03:20:14PM +0800, Changhuang Liang wrote:
> On 2023/5/10 15:06, Conor Dooley wrote:
> > On Tue, May 09, 2023 at 06:53:07PM -0700, Changhuang Liang wrote:
> >> + - starfive,jh7110-pmu
> >> + - items:
> >> + - enum:
> >> + - starfive,jh7110-aon-syscon
> >> + - const: syscon
> >
> > Unfortunately, this is not what was wanted.
> > This syscon, of which power domain control is just one of the things that
> > it can do, should be documented in
> > Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
> > alongside it's brethern "starfive,jh7110-sys-syscon" &
> > "starfive,jh7110-stg-syscon".
> >
>
> That means that I don't need to modify this original yaml file?

Does "this original" mean starfive,jh7100-pmu.yaml?
If so then...

> I just need to move current changes in this patch into
> "Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml"?

Correct.
It makes most sense for that binding, as it depends on the pll binding
(because it has a ref: to it), to go through the clock tree in Xingyu's
series.
I'll apply the driver changes once the binding has been applied.

Thanks,
Conor.


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2023-05-11 02:19:06

by Changhuang Liang

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Subject: Re: [PATCH v3 1/5] dt-bindings: power: Add JH7110 AON PMU support



On 2023/5/11 3:51, Conor Dooley wrote:
> On Wed, May 10, 2023 at 03:20:14PM +0800, Changhuang Liang wrote:
>> On 2023/5/10 15:06, Conor Dooley wrote:
>>> On Tue, May 09, 2023 at 06:53:07PM -0700, Changhuang Liang wrote:
>>>> + - starfive,jh7110-pmu
>>>> + - items:
>>>> + - enum:
>>>> + - starfive,jh7110-aon-syscon
>>>> + - const: syscon
>>>
>>> Unfortunately, this is not what was wanted.
>>> This syscon, of which power domain control is just one of the things that
>>> it can do, should be documented in
>>> Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
>>> alongside it's brethern "starfive,jh7110-sys-syscon" &
>>> "starfive,jh7110-stg-syscon".
>>>
>>
>> That means that I don't need to modify this original yaml file?
>
> Does "this original" mean starfive,jh7100-pmu.yaml?
> If so then...
>

Yes.

>> I just need to move current changes in this patch into
>> "Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml"?
>
> Correct.
> It makes most sense for that binding, as it depends on the pll binding
> (because it has a ref: to it), to go through the clock tree in Xingyu's
> series.
> I'll apply the driver changes once the binding has been applied.
>

I think that I have to send v4 after Xingyu's series resend new version.
If drivers have no other comments. I will make the following changes:

patch 1/5: Only keep the content in starfive,jh7110-pmu.h, move other content into Xingyu's PLL series.
patch 5/5: Drop this patch, move the content into Xingyu's PLL series.
other patch: no change.

Thanks,
Changhuang