Add support to boot up mainline kernel on the QCM6490-based Fairphone 5
smartphone.
These patches only cover a part of the functionality brought up on
mainline so far, with the rest needing larger dts and driver changes or
depend on patches that are not yet merged. I will work on sending those
once these base patches here have settled.
Since QCM6490, like SC7280 are 'yupik' in the vendor-provided kernel, we
can base the dts on it and leverage existing support. Though current
sc7280 support mostly assumes ChromeOS devices which have a different
TrustZone setup, so we need to move some ChromeOS-specific bits to the
sc7280-chrome-common.dtsi file to make it boot on a standard TZ board.
Depends on (just for the #include in sc7280.dtsi):
https://lore.kernel.org/linux-arm-msm/[email protected]/
The pm7250b patch has been picked up from this series:
https://lore.kernel.org/linux-arm-msm/[email protected]/
Signed-off-by: Luca Weiss <[email protected]>
---
Changes in v2:
- Add comments why nodes in sc7280.dtsi get disabled (Konrad)
- Mark more nodes in sc7280.dtsi as reserved
- Don't allow writing qfprom when (optional) clock isn't found
- Device dts changes:
- Stylistic changes in device dts
- Remove qcom,msm-id & qcom,board-id properties
- Add regulator-initial-mode
- Pick up tags
- Drop patch 03 "arm64: dts: qcom: sc7280: Move qfprom clock to
chrome-common", it's actually not needed with qfprom-clock-optional
patch
- Drop patch 07 "dt-bindings: arm: qcom,ids: Add SoC ID for QCM6490",
patch 08 "soc: qcom: socinfo: Add SoC ID for QCM6490" and patch 09
"cpufreq: Add QCM6490 to cpufreq-dt-platdev blocklist", all applied.
- Link to v1: https://lore.kernel.org/r/[email protected]
---
Luca Weiss (7):
arm64: dts: qcom: sc7280: Mark some nodes as 'reserved'
nvmem: qfprom: Mark core clk as optional
arm64: dts: qcom: pm7250b: make SID configurable
arm64: dts: qcom: pm8350c: Add flash led node
dt-bindings: pinctrl: qcom,sc7280: Allow gpio-reserved-ranges
dt-bindings: arm: qcom: Add QCM6490 Fairphone 5
arm64: dts: qcom: qcm6490: Add device-tree for Fairphone 5
Documentation/devicetree/bindings/arm/qcom.yaml | 6 +
.../bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 4 +
arch/arm64/boot/dts/qcom/Makefile | 1 +
arch/arm64/boot/dts/qcom/pm7250b.dtsi | 14 +-
arch/arm64/boot/dts/qcom/pm8350c.dtsi | 6 +
arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts | 667 +++++++++++++++++++++
arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi | 24 +
arch/arm64/boot/dts/qcom/sc7280.dtsi | 8 +-
arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts | 4 +
drivers/nvmem/qfprom.c | 6 +-
10 files changed, 729 insertions(+), 11 deletions(-)
---
base-commit: b3b1378016952541463ef2369da780d4f9bf02b3
change-id: 20230818-fp5-initial-b6c8210ba9c8
Best regards,
--
Luca Weiss <[email protected]>
Like other Qualcomm PMICs the PM7250B can be used on different addresses
on the SPMI bus. Use similar defines like the PMK8350 to make this
possible but skip the ifndef based on maintainer feedback.
Signed-off-by: Luca Weiss <[email protected]>
---
arch/arm64/boot/dts/qcom/pm7250b.dtsi | 14 +++++++-------
arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts | 4 ++++
2 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/pm7250b.dtsi b/arch/arm64/boot/dts/qcom/pm7250b.dtsi
index e8540c36bd99..df0afe82f250 100644
--- a/arch/arm64/boot/dts/qcom/pm7250b.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm7250b.dtsi
@@ -39,16 +39,16 @@ trip2 {
};
&spmi_bus {
- pmic@2 {
+ pmic@PM7250B_SID {
compatible = "qcom,pm7250b", "qcom,spmi-pmic";
- reg = <0x2 SPMI_USID>;
+ reg = <PM7250B_SID SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm7250b_temp: temp-alarm@2400 {
compatible = "qcom,spmi-temp-alarm";
reg = <0x2400>;
- interrupts = <0x2 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
+ interrupts = <PM7250B_SID 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
io-channels = <&pm7250b_adc ADC5_DIE_TEMP>;
io-channel-names = "thermal";
#thermal-sensor-cells = <0>;
@@ -60,7 +60,7 @@ pm7250b_adc: adc@3100 {
#address-cells = <1>;
#size-cells = <0>;
#io-channel-cells = <1>;
- interrupts = <0x2 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
+ interrupts = <PM7250B_SID 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
channel@0 {
reg = <ADC5_REF_GND>;
@@ -141,7 +141,7 @@ channel@99 {
pm7250b_adc_tm: adc-tm@3500 {
compatible = "qcom,spmi-adc-tm5";
reg = <0x3500>;
- interrupts = <0x2 0x35 0x0 IRQ_TYPE_EDGE_RISING>;
+ interrupts = <PM7250B_SID 0x35 0x0 IRQ_TYPE_EDGE_RISING>;
#thermal-sensor-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
@@ -159,9 +159,9 @@ pm7250b_gpios: pinctrl@c000 {
};
};
- pmic@3 {
+ pmic@PM7250B_SID1 {
compatible = "qcom,pm7250b", "qcom,spmi-pmic";
- reg = <0x3 SPMI_USID>;
+ reg = <PM7250B_SID1 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
};
diff --git a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
index 136e273d09a7..943d5a150b64 100644
--- a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
+++ b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
@@ -5,6 +5,10 @@
/dts-v1/;
+/* PM7250B is configured to use SID2/3 */
+#define PM7250B_SID 2
+#define PM7250B_SID1 3
+
/* PMK8350 (in reality a PMK8003) is configured to use SID6 instead of 0 */
#define PMK8350_SID 6
--
2.42.0
Fairphone 5 is a smartphone based on the QCM6490 SoC.
Signed-off-by: Luca Weiss <[email protected]>
---
Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
index adbfaea32343..76934f4772e9 100644
--- a/Documentation/devicetree/bindings/arm/qcom.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom.yaml
@@ -50,6 +50,7 @@ description: |
msm8998
qcs404
qcm2290
+ qcm6490
qdu1000
qrb2210
qrb4210
@@ -391,6 +392,11 @@ properties:
- const: qcom,qrb2210
- const: qcom,qcm2290
+ - items:
+ - enum:
+ - fairphone,fp5
+ - const: qcom,qcm6490
+
- description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform
items:
- enum:
--
2.42.0
On 19/09/2023 14:45, Luca Weiss wrote:
> Like other Qualcomm PMICs the PM7250B can be used on different addresses
> on the SPMI bus. Use similar defines like the PMK8350 to make this
> possible but skip the ifndef based on maintainer feedback.
>
> Signed-off-by: Luca Weiss <[email protected]>
> ---
Matches our discussion offline today. Looks good, thank you!
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On Tue, 19 Sep 2023 14:45:54 +0200, Luca Weiss wrote:
> Add support to boot up mainline kernel on the QCM6490-based Fairphone 5
> smartphone.
>
> These patches only cover a part of the functionality brought up on
> mainline so far, with the rest needing larger dts and driver changes or
> depend on patches that are not yet merged. I will work on sending those
> once these base patches here have settled.
>
> [...]
Applied, thanks!
[1/7] arm64: dts: qcom: sc7280: Mark some nodes as 'reserved'
commit: 6da24ba932082bae110feb917a64bb54637fa7c0
[3/7] arm64: dts: qcom: pm7250b: make SID configurable
commit: 8e2d56f64572e0432c355093a7601bde29677490
[4/7] arm64: dts: qcom: pm8350c: Add flash led node
commit: bfd4412a023b2a3a2f858f2ffc13705aaeef5737
[6/7] dt-bindings: arm: qcom: Add QCM6490 Fairphone 5
commit: 4b1a16d776b474345b12f834de1fd42bca226d90
[7/7] arm64: dts: qcom: qcm6490: Add device-tree for Fairphone 5
commit: eee9602ad6498eee9ddab1b7eb6aede288f0b934
Best regards,
--
Bjorn Andersson <[email protected]>
On Tue, 19 Sep 2023 14:45:54 +0200, Luca Weiss wrote:
> Add support to boot up mainline kernel on the QCM6490-based Fairphone 5
> smartphone.
>
> These patches only cover a part of the functionality brought up on
> mainline so far, with the rest needing larger dts and driver changes or
> depend on patches that are not yet merged. I will work on sending those
> once these base patches here have settled.
>
> [...]
Applied, thanks!
[2/7] nvmem: qfprom: Mark core clk as optional
commit: 844ac302b2aa81c47a4323fc34a0a454cc749dbc
Best regards,
--
Srinivas Kandagatla <[email protected]>