2023-09-20 22:00:47

by Anup Patel

[permalink] [raw]
Subject: [PATCH v2 0/4] KVM RISC-V fixes for ONE_REG interface

This series includes few assorted fixes for KVM RISC-V ONE_REG interface
and KVM_GET_REG_LIST API.

These patches can also be found in riscv_kvm_onereg_fixes_v2 branch at:
https://github.com/avpatel/linux.git

Changes since v1:
- Addressed Drew's comments in PATCH4

Anup Patel (4):
RISC-V: KVM: Fix KVM_GET_REG_LIST API for ISA_EXT registers
RISC-V: KVM: Fix riscv_vcpu_get_isa_ext_single() for missing
extensions
KVM: riscv: selftests: Fix ISA_EXT register handling in get-reg-list
KVM: riscv: selftests: Selectively filter-out AIA registers

arch/riscv/kvm/vcpu_onereg.c | 7 ++-
.../selftests/kvm/riscv/get-reg-list.c | 58 ++++++++++++++-----
2 files changed, 47 insertions(+), 18 deletions(-)

--
2.34.1


2023-09-21 02:20:47

by Anup Patel

[permalink] [raw]
Subject: [PATCH v2 4/4] KVM: riscv: selftests: Selectively filter-out AIA registers

Currently the AIA ONE_REG registers are reported by get-reg-list
as new registers for various vcpu_reg_list configs whenever Ssaia
is available on the host because Ssaia extension can only be
disabled by Smstateen extension which is not always available.

To tackle this, we should filter-out AIA ONE_REG registers only
when Ssaia can't be disabled for a VCPU.

Fixes: 477069398ed6 ("KVM: riscv: selftests: Add get-reg-list test")
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
---
.../selftests/kvm/riscv/get-reg-list.c | 23 +++++++++++++++++--
1 file changed, 21 insertions(+), 2 deletions(-)

diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c
index 76c0ad11e423..9f99ea42f45f 100644
--- a/tools/testing/selftests/kvm/riscv/get-reg-list.c
+++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c
@@ -12,6 +12,8 @@

#define REG_MASK (KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK)

+static bool isa_ext_cant_disable[KVM_RISCV_ISA_EXT_MAX];
+
bool filter_reg(__u64 reg)
{
switch (reg & ~REG_MASK) {
@@ -48,6 +50,15 @@ bool filter_reg(__u64 reg)
case KVM_REG_RISCV_ISA_EXT | KVM_RISCV_ISA_EXT_ZIFENCEI:
case KVM_REG_RISCV_ISA_EXT | KVM_RISCV_ISA_EXT_ZIHPM:
return true;
+ /* AIA registers are always available when Ssaia can't be disabled */
+ case KVM_REG_RISCV_CSR | KVM_REG_RISCV_CSR_AIA | KVM_REG_RISCV_CSR_AIA_REG(siselect):
+ case KVM_REG_RISCV_CSR | KVM_REG_RISCV_CSR_AIA | KVM_REG_RISCV_CSR_AIA_REG(iprio1):
+ case KVM_REG_RISCV_CSR | KVM_REG_RISCV_CSR_AIA | KVM_REG_RISCV_CSR_AIA_REG(iprio2):
+ case KVM_REG_RISCV_CSR | KVM_REG_RISCV_CSR_AIA | KVM_REG_RISCV_CSR_AIA_REG(sieh):
+ case KVM_REG_RISCV_CSR | KVM_REG_RISCV_CSR_AIA | KVM_REG_RISCV_CSR_AIA_REG(siph):
+ case KVM_REG_RISCV_CSR | KVM_REG_RISCV_CSR_AIA | KVM_REG_RISCV_CSR_AIA_REG(iprio1h):
+ case KVM_REG_RISCV_CSR | KVM_REG_RISCV_CSR_AIA | KVM_REG_RISCV_CSR_AIA_REG(iprio2h):
+ return isa_ext_cant_disable[KVM_RISCV_ISA_EXT_SSAIA];
default:
break;
}
@@ -71,14 +82,22 @@ static inline bool vcpu_has_ext(struct kvm_vcpu *vcpu, int ext)

void finalize_vcpu(struct kvm_vcpu *vcpu, struct vcpu_reg_list *c)
{
+ unsigned long isa_ext_state[KVM_RISCV_ISA_EXT_MAX] = { 0 };
struct vcpu_reg_sublist *s;
+ int rc;
+
+ for (int i = 0; i < KVM_RISCV_ISA_EXT_MAX; i++)
+ __vcpu_get_reg(vcpu, RISCV_ISA_EXT_REG(i), &isa_ext_state[i]);

/*
* Disable all extensions which were enabled by default
* if they were available in the risc-v host.
*/
- for (int i = 0; i < KVM_RISCV_ISA_EXT_MAX; i++)
- __vcpu_set_reg(vcpu, RISCV_ISA_EXT_REG(i), 0);
+ for (int i = 0; i < KVM_RISCV_ISA_EXT_MAX; i++) {
+ rc = __vcpu_set_reg(vcpu, RISCV_ISA_EXT_REG(i), 0);
+ if (rc && isa_ext_state[i])
+ isa_ext_cant_disable[i] = true;
+ }

for_each_sublist(c, s) {
if (!s->feature)
--
2.34.1

2023-09-21 18:59:07

by Anup Patel

[permalink] [raw]
Subject: Re: [PATCH v2 0/4] KVM RISC-V fixes for ONE_REG interface

On Wed, Sep 20, 2023 at 9:16 PM Anup Patel <[email protected]> wrote:
>
> This series includes few assorted fixes for KVM RISC-V ONE_REG interface
> and KVM_GET_REG_LIST API.
>
> These patches can also be found in riscv_kvm_onereg_fixes_v2 branch at:
> https://github.com/avpatel/linux.git
>
> Changes since v1:
> - Addressed Drew's comments in PATCH4
>
> Anup Patel (4):
> RISC-V: KVM: Fix KVM_GET_REG_LIST API for ISA_EXT registers
> RISC-V: KVM: Fix riscv_vcpu_get_isa_ext_single() for missing
> extensions
> KVM: riscv: selftests: Fix ISA_EXT register handling in get-reg-list
> KVM: riscv: selftests: Selectively filter-out AIA registers

Queued this series for 6.6-rcX fixes

Thanks,
Anup

>
> arch/riscv/kvm/vcpu_onereg.c | 7 ++-
> .../selftests/kvm/riscv/get-reg-list.c | 58 ++++++++++++++-----
> 2 files changed, 47 insertions(+), 18 deletions(-)
>
> --
> 2.34.1
>