Due to the different PMIC configuration found in the SA8295P platform,
compared to SC8280XP, the VDD_GFX pads are supplied by an dedicated
MAX20411 LDO.
Support for expressing the regulator supply is added to the binding, the
support for enabling the parent supply for GX is added, the missing
gfx.lvl power-domain is dropped, and the DeviceTree is wired up to
enable the GPU in this configuration.
Signed-off-by: Bjorn Andersson <[email protected]>
---
Changes in v4:
- Updated qcom,gpucc.yaml binding check that both power-domains and
vdd-gfx-supply isn't used together. Updated related comment as well.
- Link to v3: https://lore.kernel.org/r/[email protected]
Changes in v3:
- Removed one unnecessary empty line in DT node
- Rebased series to v6.8-rc1
- Link to v2: https://lore.kernel.org/r/[email protected]
Changes in v2:
- Made gpucc binding accept either power-domain or vdd-gfx-supply
- Updated comment in gdsc_gx_do_nothing_enable()
- Added a comment for the /delete-property/ power-domains
- Fixed node and property sort order in dts
- Switched zap firmware to use mbn file
- Link to v1: https://lore.kernel.org/r/[email protected]
---
Bjorn Andersson (8):
dt-bindings: clock: qcom: Allow VDD_GFX supply to GX
clk: qcom: gdsc: Enable supply reglator in GPU GX handler
clk: qcom: gpucc-sc8280xp: Add external supply for GX gdsc
soc: qcom: rpmhpd: Drop SA8540P gfx.lvl
arm64: dts: qcom: sa8540p: Drop gfx.lvl as power-domain for gpucc
arm64: dts: qcom: sa8295p-adp: add max20411
arm64: dts: qcom: sa8295p-adp: Enable GPU
arm64: defconfig: Enable MAX20411 regulator driver
.../devicetree/bindings/clock/qcom,gpucc.yaml | 9 +++
arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 68 ++++++++++++++++++++++
arch/arm64/boot/dts/qcom/sa8540p.dtsi | 3 +
arch/arm64/configs/defconfig | 1 +
drivers/clk/qcom/gdsc.c | 12 +++-
drivers/clk/qcom/gpucc-sc8280xp.c | 1 +
drivers/pmdomain/qcom/rpmhpd.c | 1 -
7 files changed, 92 insertions(+), 3 deletions(-)
---
base-commit: 6613476e225e090cc9aad49be7fa504e290dd33d
change-id: 20231220-sa8295p-gpu-51c5f343e3ec
Best regards,
--
Bjorn Andersson <[email protected]>
With the necessary support in place for supplying VDD_GFX from the
MAX20411 regulator, enable the GPU clock controller, GMU, Adreno SMMU
and the GPU on the SA8295P ADP.
Reviewed-by: Dmitry Baryshkov <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
---
arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
index bd0962f39fc5..78e933c42c31 100644
--- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
+++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
@@ -108,6 +108,13 @@ edp3_connector_in: endpoint {
};
};
};
+
+ reserved-memory {
+ gpu_mem: gpu-mem@8bf00000 {
+ reg = <0 0x8bf00000 0 0x2000>;
+ no-map;
+ };
+ };
};
&apps_rsc {
@@ -286,6 +293,28 @@ vdd_gfx: regulator@39 {
};
};
+&gpucc {
+ vdd-gfx-supply = <&vdd_gfx>;
+ status = "okay";
+};
+
+&gmu {
+ status = "okay";
+};
+
+&gpu {
+ status = "okay";
+
+ zap-shader {
+ memory-region = <&gpu_mem>;
+ firmware-name = "qcom/sa8295p/a690_zap.mbn";
+ };
+};
+
+&gpu_smmu {
+ status = "okay";
+};
+
&mdss0 {
status = "okay";
};
--
2.25.1
From: Bjorn Andersson <[email protected]>
The SA8295P ADP has a MAX20411 LDO regulator on I2C 12, supplying the
VDD_GFX pads. Enable the bus and add the maxim,max20411 device on the
bus.
Signed-off-by: Bjorn Andersson <[email protected]>
---
arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 39 ++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
index fd253942e5e5..bd0962f39fc5 100644
--- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
+++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
@@ -266,6 +266,26 @@ &dispcc1 {
status = "okay";
};
+&i2c12 {
+ pinctrl-0 = <&qup1_i2c4_state>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ vdd_gfx: regulator@39 {
+ compatible = "maxim,max20411";
+ reg = <0x39>;
+
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <800000>;
+
+ enable-gpios = <&pmm8540a_gpios 2 GPIO_ACTIVE_HIGH>;
+
+ pinctrl-0 = <&max20411_en>;
+ pinctrl-names = "default";
+ };
+};
+
&mdss0 {
status = "okay";
};
@@ -476,6 +496,10 @@ &pcie4_phy {
status = "okay";
};
+&qup1 {
+ status = "okay";
+};
+
&qup2 {
status = "okay";
};
@@ -636,6 +660,14 @@ &xo_board_clk {
/* PINCTRL */
+&pmm8540a_gpios {
+ max20411_en: max20411-en-state {
+ pins = "gpio2";
+ function = "normal";
+ output-enable;
+ };
+};
+
&tlmm {
pcie2a_default: pcie2a-default-state {
clkreq-n-pins {
@@ -728,4 +760,11 @@ wake-n-pins {
bias-pull-up;
};
};
+
+ qup1_i2c4_state: qup1-i2c4-state {
+ pins = "gpio0", "gpio1";
+ function = "qup12";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
};
--
2.25.1
The SA8295P and SA8540P uses an external regulator (max20411), and
gfx.lvl is not provided by rpmh. Drop the power-domains property of the
gpucc node to reflect this.
Fixes: eec51ab2fd6f ("arm64: dts: qcom: sc8280xp: Add GPU related nodes")
Reviewed-by: Dmitry Baryshkov <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
---
arch/arm64/boot/dts/qcom/sa8540p.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sa8540p.dtsi b/arch/arm64/boot/dts/qcom/sa8540p.dtsi
index 96b2c59ad02b..23888029cc11 100644
--- a/arch/arm64/boot/dts/qcom/sa8540p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8540p.dtsi
@@ -168,6 +168,9 @@ opp-2592000000 {
};
&gpucc {
+ /* SA8295P and SA8540P doesn't provide gfx.lvl */
+ /delete-property/ power-domains;
+
status = "disabled";
};
--
2.25.1
On SA8295P and SA8540P gfx.lvl is not provdied by rpmh, but rather is
handled by an external regulator (max20411). Drop gfx.lvl from the list
of power-domains exposed on this platform.
Fixes: f68f1cb3437d ("soc: qcom: rpmhpd: add sc8280xp & sa8540p rpmh power-domains")
Reviewed-by: Dmitry Baryshkov <[email protected]>
Acked-by: Ulf Hansson <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
---
drivers/pmdomain/qcom/rpmhpd.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/pmdomain/qcom/rpmhpd.c b/drivers/pmdomain/qcom/rpmhpd.c
index 3078896b1300..27a73ff72614 100644
--- a/drivers/pmdomain/qcom/rpmhpd.c
+++ b/drivers/pmdomain/qcom/rpmhpd.c
@@ -217,7 +217,6 @@ static struct rpmhpd *sa8540p_rpmhpds[] = {
[SC8280XP_CX] = &cx,
[SC8280XP_CX_AO] = &cx_ao,
[SC8280XP_EBI] = &ebi,
- [SC8280XP_GFX] = &gfx,
[SC8280XP_LCX] = &lcx,
[SC8280XP_LMX] = &lmx,
[SC8280XP_MMCX] = &mmcx,
--
2.25.1
On Thu, Jan 25, 2024 at 01:05:06PM -0800, Bjorn Andersson wrote:
> Due to the different PMIC configuration found in the SA8295P platform,
> compared to SC8280XP, the VDD_GFX pads are supplied by an dedicated
> MAX20411 LDO.
>
> Support for expressing the regulator supply is added to the binding, the
> support for enabling the parent supply for GX is added, the missing
> gfx.lvl power-domain is dropped, and the DeviceTree is wired up to
> enable the GPU in this configuration.
>
> Signed-off-by: Bjorn Andersson <[email protected]>
Sorry, I forgot to change the subject prefix of the rpmhpd patch, and
pick up Konrad's two r-b.
Regards,
Bjorn
> ---
> Changes in v4:
> - Updated qcom,gpucc.yaml binding check that both power-domains and
> vdd-gfx-supply isn't used together. Updated related comment as well.
> - Link to v3: https://lore.kernel.org/r/[email protected]
>
> Changes in v3:
> - Removed one unnecessary empty line in DT node
> - Rebased series to v6.8-rc1
> - Link to v2: https://lore.kernel.org/r/[email protected]
>
> Changes in v2:
> - Made gpucc binding accept either power-domain or vdd-gfx-supply
> - Updated comment in gdsc_gx_do_nothing_enable()
> - Added a comment for the /delete-property/ power-domains
> - Fixed node and property sort order in dts
> - Switched zap firmware to use mbn file
> - Link to v1: https://lore.kernel.org/r/[email protected]
>
> ---
> Bjorn Andersson (8):
> dt-bindings: clock: qcom: Allow VDD_GFX supply to GX
> clk: qcom: gdsc: Enable supply reglator in GPU GX handler
> clk: qcom: gpucc-sc8280xp: Add external supply for GX gdsc
> soc: qcom: rpmhpd: Drop SA8540P gfx.lvl
> arm64: dts: qcom: sa8540p: Drop gfx.lvl as power-domain for gpucc
> arm64: dts: qcom: sa8295p-adp: add max20411
> arm64: dts: qcom: sa8295p-adp: Enable GPU
> arm64: defconfig: Enable MAX20411 regulator driver
>
> .../devicetree/bindings/clock/qcom,gpucc.yaml | 9 +++
> arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 68 ++++++++++++++++++++++
> arch/arm64/boot/dts/qcom/sa8540p.dtsi | 3 +
> arch/arm64/configs/defconfig | 1 +
> drivers/clk/qcom/gdsc.c | 12 +++-
> drivers/clk/qcom/gpucc-sc8280xp.c | 1 +
> drivers/pmdomain/qcom/rpmhpd.c | 1 -
> 7 files changed, 92 insertions(+), 3 deletions(-)
> ---
> base-commit: 6613476e225e090cc9aad49be7fa504e290dd33d
> change-id: 20231220-sa8295p-gpu-51c5f343e3ec
>
> Best regards,
> --
> Bjorn Andersson <[email protected]>
>
On Thu, 25 Jan 2024 at 23:06, Bjorn Andersson <[email protected]> wrote:
>
> From: Bjorn Andersson <[email protected]>
>
> The SA8295P ADP has a MAX20411 LDO regulator on I2C 12, supplying the
> VDD_GFX pads. Enable the bus and add the maxim,max20411 device on the
> bus.
>
> Signed-off-by: Bjorn Andersson <[email protected]>
This doesn't match the From header.
> ---
> arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 39 ++++++++++++++++++++++++++++++++
> 1 file changed, 39 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
> index fd253942e5e5..bd0962f39fc5 100644
> --- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
> +++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
> @@ -266,6 +266,26 @@ &dispcc1 {
> status = "okay";
> };
>
> +&i2c12 {
> + pinctrl-0 = <&qup1_i2c4_state>;
> + pinctrl-names = "default";
> +
> + status = "okay";
> +
> + vdd_gfx: regulator@39 {
> + compatible = "maxim,max20411";
> + reg = <0x39>;
> +
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <800000>;
> +
> + enable-gpios = <&pmm8540a_gpios 2 GPIO_ACTIVE_HIGH>;
> +
> + pinctrl-0 = <&max20411_en>;
> + pinctrl-names = "default";
> + };
> +};
> +
> &mdss0 {
> status = "okay";
> };
> @@ -476,6 +496,10 @@ &pcie4_phy {
> status = "okay";
> };
>
> +&qup1 {
> + status = "okay";
> +};
> +
> &qup2 {
> status = "okay";
> };
> @@ -636,6 +660,14 @@ &xo_board_clk {
>
> /* PINCTRL */
>
> +&pmm8540a_gpios {
> + max20411_en: max20411-en-state {
> + pins = "gpio2";
> + function = "normal";
> + output-enable;
> + };
> +};
> +
> &tlmm {
> pcie2a_default: pcie2a-default-state {
> clkreq-n-pins {
> @@ -728,4 +760,11 @@ wake-n-pins {
> bias-pull-up;
> };
> };
> +
> + qup1_i2c4_state: qup1-i2c4-state {
> + pins = "gpio0", "gpio1";
> + function = "qup12";
> + drive-strength = <2>;
> + bias-pull-up;
> + };
> };
>
> --
> 2.25.1
>
>
--
With best wishes
Dmitry
On Thu, 25 Jan 2024 13:05:06 -0800, Bjorn Andersson wrote:
> Due to the different PMIC configuration found in the SA8295P platform,
> compared to SC8280XP, the VDD_GFX pads are supplied by an dedicated
> MAX20411 LDO.
>
> Support for expressing the regulator supply is added to the binding, the
> support for enabling the parent supply for GX is added, the missing
> gfx.lvl power-domain is dropped, and the DeviceTree is wired up to
> enable the GPU in this configuration.
>
> [...]
Applied, thanks!
[8/8] arm64: defconfig: Enable MAX20411 regulator driver
commit: 42945eb663d88471a0c394d9f466401b1a8d791f
Best regards,
--
Bjorn Andersson <[email protected]>