Add Support for CQHCI (Command Queuing Host Controller Interface)
for each of the host controllers present in TI's J721E devices.
Add cqhci_ops and a .irq() callback to handle cqhci specific interrupts.
Signed-off-by: Faiz Abbas <[email protected]>
---
drivers/mmc/host/Kconfig | 1 +
drivers/mmc/host/sdhci_am654.c | 71 +++++++++++++++++++++++++++++++++-
2 files changed, 71 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 49ea02c467bf..25f12ef813ff 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -1011,6 +1011,7 @@ config MMC_SDHCI_AM654
tristate "Support for the SDHCI Controller in TI's AM654 SOCs"
depends on MMC_SDHCI_PLTFM && OF && REGMAP_MMIO
select MMC_SDHCI_IO_ACCESSORS
+ select CONFIG_MMC_CQHCI
help
This selects the Secure Digital Host Controller Interface (SDHCI)
support present in TI's AM654 SOCs. The controller supports
diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c
index bb90757ecace..b8e897e31e2e 100644
--- a/drivers/mmc/host/sdhci_am654.c
+++ b/drivers/mmc/host/sdhci_am654.c
@@ -12,6 +12,7 @@
#include <linux/property.h>
#include <linux/regmap.h>
+#include "cqhci.h"
#include "sdhci-pltfm.h"
/* CTL_CFG Registers */
@@ -68,6 +69,9 @@
#define CLOCK_TOO_SLOW_HZ 400000
+/* Command Queue Host Controller Interface Base address */
+#define SDHCI_AM654_CQE_BASE_ADDR 0x200
+
static struct regmap_config sdhci_am654_regmap_config = {
.reg_bits = 32,
.val_bits = 32,
@@ -259,6 +263,19 @@ static const struct sdhci_am654_driver_data sdhci_am654_drvdata = {
.flags = IOMUX_PRESENT | FREQSEL_2_BIT | STRBSEL_4_BIT | DLL_PRESENT,
};
+static u32 sdhci_am654_cqhci_irq(struct sdhci_host *host, u32 intmask)
+{
+ int cmd_error = 0;
+ int data_error = 0;
+
+ if (!sdhci_cqe_irq(host, intmask, &cmd_error, &data_error))
+ return intmask;
+
+ cqhci_irq(host->mmc, intmask, cmd_error, data_error);
+
+ return 0;
+}
+
static struct sdhci_ops sdhci_j721e_8bit_ops = {
.get_max_clock = sdhci_pltfm_clk_get_max_clock,
.get_timeout_clock = sdhci_pltfm_clk_get_max_clock,
@@ -267,6 +284,7 @@ static struct sdhci_ops sdhci_j721e_8bit_ops = {
.set_power = sdhci_am654_set_power,
.set_clock = sdhci_am654_set_clock,
.write_b = sdhci_am654_write_b,
+ .irq = sdhci_am654_cqhci_irq,
.reset = sdhci_reset,
};
@@ -290,6 +308,7 @@ static struct sdhci_ops sdhci_j721e_4bit_ops = {
.set_power = sdhci_am654_set_power,
.set_clock = sdhci_j721e_4bit_set_clock,
.write_b = sdhci_am654_write_b,
+ .irq = sdhci_am654_cqhci_irq,
.reset = sdhci_reset,
};
@@ -304,6 +323,40 @@ static const struct sdhci_am654_driver_data sdhci_j721e_4bit_drvdata = {
.pdata = &sdhci_j721e_4bit_pdata,
.flags = IOMUX_PRESENT,
};
+
+static void sdhci_am654_dumpregs(struct mmc_host *mmc)
+{
+ sdhci_dumpregs(mmc_priv(mmc));
+}
+
+static const struct cqhci_host_ops sdhci_am654_cqhci_ops = {
+ .enable = sdhci_cqe_enable,
+ .disable = sdhci_cqe_disable,
+ .dumpregs = sdhci_am654_dumpregs,
+};
+
+static int sdhci_am654_cqe_add_host(struct sdhci_host *host)
+{
+ struct cqhci_host *cq_host;
+ int ret;
+
+ cq_host = devm_kzalloc(host->mmc->parent, sizeof(struct cqhci_host),
+ GFP_KERNEL);
+ if (!cq_host)
+ return -ENOMEM;
+
+ cq_host->mmio = host->ioaddr + SDHCI_AM654_CQE_BASE_ADDR;
+ cq_host->quirks |= CQHCI_QUIRK_SHORT_TXFR_DESC_SZ;
+ cq_host->caps |= CQHCI_TASK_DESC_SZ_128;
+ cq_host->ops = &sdhci_am654_cqhci_ops;
+
+ host->mmc->caps2 |= MMC_CAP2_CQE;
+
+ ret = cqhci_init(cq_host, host->mmc, 1);
+
+ return ret;
+}
+
static int sdhci_am654_init(struct sdhci_host *host)
{
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
@@ -344,7 +397,23 @@ static int sdhci_am654_init(struct sdhci_host *host)
regmap_update_bits(sdhci_am654->base, CTL_CFG_2, SLOTTYPE_MASK,
ctl_cfg_2);
- return sdhci_add_host(host);
+ ret = sdhci_setup_host(host);
+ if (ret)
+ return ret;
+
+ ret = sdhci_am654_cqe_add_host(host);
+ if (ret)
+ goto err_cleanup_host;
+
+ ret = __sdhci_add_host(host);
+ if (ret)
+ goto err_cleanup_host;
+
+ return 0;
+
+err_cleanup_host:
+ sdhci_cleanup_host(host);
+ return ret;
}
static int sdhci_am654_get_of_property(struct platform_device *pdev,
--
2.19.2
Hi Faiz,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on v5.4-rc7 next-20191115]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Faiz-Abbas/mmc-sdhci_am654-Add-Support-for-Command-Queuing-Engine-to-J721E/20191115-215537
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 96b95eff4a591dbac582c2590d067e356a18aacb
config: x86_64-randconfig-g001-20191117 (attached as .config)
compiler: gcc-7 (Debian 7.4.0-14) 7.4.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <[email protected]>
All errors (new ones prefixed by >>):
ld: drivers/mmc/host/sdhci_am654.o: in function `sdhci_am654_cqhci_irq':
>> drivers/mmc/host/sdhci_am654.c:274: undefined reference to `cqhci_irq'
ld: drivers/mmc/host/sdhci_am654.o: in function `sdhci_am654_cqe_add_host':
>> drivers/mmc/host/sdhci_am654.c:355: undefined reference to `cqhci_init'
vim +274 drivers/mmc/host/sdhci_am654.c
265
266 static u32 sdhci_am654_cqhci_irq(struct sdhci_host *host, u32 intmask)
267 {
268 int cmd_error = 0;
269 int data_error = 0;
270
271 if (!sdhci_cqe_irq(host, intmask, &cmd_error, &data_error))
272 return intmask;
273
> 274 cqhci_irq(host->mmc, intmask, cmd_error, data_error);
275
276 return 0;
277 }
278
279 static struct sdhci_ops sdhci_j721e_8bit_ops = {
280 .get_max_clock = sdhci_pltfm_clk_get_max_clock,
281 .get_timeout_clock = sdhci_pltfm_clk_get_max_clock,
282 .set_uhs_signaling = sdhci_set_uhs_signaling,
283 .set_bus_width = sdhci_set_bus_width,
284 .set_power = sdhci_am654_set_power,
285 .set_clock = sdhci_am654_set_clock,
286 .write_b = sdhci_am654_write_b,
287 .irq = sdhci_am654_cqhci_irq,
288 .reset = sdhci_reset,
289 };
290
291 static const struct sdhci_pltfm_data sdhci_j721e_8bit_pdata = {
292 .ops = &sdhci_j721e_8bit_ops,
293 .quirks = SDHCI_QUIRK_INVERTED_WRITE_PROTECT |
294 SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12,
295 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
296 };
297
298 static const struct sdhci_am654_driver_data sdhci_j721e_8bit_drvdata = {
299 .pdata = &sdhci_j721e_8bit_pdata,
300 .flags = DLL_PRESENT,
301 };
302
303 static struct sdhci_ops sdhci_j721e_4bit_ops = {
304 .get_max_clock = sdhci_pltfm_clk_get_max_clock,
305 .get_timeout_clock = sdhci_pltfm_clk_get_max_clock,
306 .set_uhs_signaling = sdhci_set_uhs_signaling,
307 .set_bus_width = sdhci_set_bus_width,
308 .set_power = sdhci_am654_set_power,
309 .set_clock = sdhci_j721e_4bit_set_clock,
310 .write_b = sdhci_am654_write_b,
311 .irq = sdhci_am654_cqhci_irq,
312 .reset = sdhci_reset,
313 };
314
315 static const struct sdhci_pltfm_data sdhci_j721e_4bit_pdata = {
316 .ops = &sdhci_j721e_4bit_ops,
317 .quirks = SDHCI_QUIRK_INVERTED_WRITE_PROTECT |
318 SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12,
319 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
320 };
321
322 static const struct sdhci_am654_driver_data sdhci_j721e_4bit_drvdata = {
323 .pdata = &sdhci_j721e_4bit_pdata,
324 .flags = IOMUX_PRESENT,
325 };
326
327 static void sdhci_am654_dumpregs(struct mmc_host *mmc)
328 {
329 sdhci_dumpregs(mmc_priv(mmc));
330 }
331
332 static const struct cqhci_host_ops sdhci_am654_cqhci_ops = {
333 .enable = sdhci_cqe_enable,
334 .disable = sdhci_cqe_disable,
335 .dumpregs = sdhci_am654_dumpregs,
336 };
337
338 static int sdhci_am654_cqe_add_host(struct sdhci_host *host)
339 {
340 struct cqhci_host *cq_host;
341 int ret;
342
343 cq_host = devm_kzalloc(host->mmc->parent, sizeof(struct cqhci_host),
344 GFP_KERNEL);
345 if (!cq_host)
346 return -ENOMEM;
347
348 cq_host->mmio = host->ioaddr + SDHCI_AM654_CQE_BASE_ADDR;
349 cq_host->quirks |= CQHCI_QUIRK_SHORT_TXFR_DESC_SZ;
350 cq_host->caps |= CQHCI_TASK_DESC_SZ_128;
351 cq_host->ops = &sdhci_am654_cqhci_ops;
352
353 host->mmc->caps2 |= MMC_CAP2_CQE;
354
> 355 ret = cqhci_init(cq_host, host->mmc, 1);
356
357 return ret;
358 }
359
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/hyperkitty/list/[email protected] Intel Corporation
Hi,
On 15/11/19 5:10 PM, Faiz Abbas wrote:
> Add Support for CQHCI (Command Queuing Host Controller Interface)
> for each of the host controllers present in TI's J721E devices.
> Add cqhci_ops and a .irq() callback to handle cqhci specific interrupts.
>
> Signed-off-by: Faiz Abbas <[email protected]>
> ---
> drivers/mmc/host/Kconfig | 1 +
> drivers/mmc/host/sdhci_am654.c | 71 +++++++++++++++++++++++++++++++++-
> 2 files changed, 71 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
> index 49ea02c467bf..25f12ef813ff 100644
> --- a/drivers/mmc/host/Kconfig
> +++ b/drivers/mmc/host/Kconfig
> @@ -1011,6 +1011,7 @@ config MMC_SDHCI_AM654
> tristate "Support for the SDHCI Controller in TI's AM654 SOCs"
> depends on MMC_SDHCI_PLTFM && OF && REGMAP_MMIO
> select MMC_SDHCI_IO_ACCESSORS
> + select CONFIG_MMC_CQHCI
Oops, this should just be select MMC_CQHCI. Sending v2.
Thanks,
Faiz