From: Sean Wang <[email protected]>
Changes since v2:
- reduce code duplication of scpsys_probe across all SoCs
Changes since v1:
- rebase to Linux v4.13-rc1
There are four power domains on MediaTek MT7622 SoC which are respectively
ETHSYS for Ethernet including extra embedded switch, HIF0SYS for PCI-E and
SATA, HIF1SYS for USB and WBSYS for WIFI and Bluetooth.
Those functions could be selectively powered gated when the corresponding
function is no longer to use in order to reach more minimal power
dissipation through the patch series introduced here.
Chen Zhong (1):
soc: mediatek: add header files required for MT7622 SCPSYS dt-binding
Sean Wang (3):
dt-bindings: soc: update the binding document for SCPSYS on MediaTek
MT7622 SoC
soc: mediatek: reduce code duplication of scpsys_probe across all SoCs
soc: mediatek: add SCPSYS power domain driver for MediaTek MT7622 SoC
.../devicetree/bindings/soc/mediatek/scpsys.txt | 3 +
drivers/soc/mediatek/mtk-scpsys.c | 247 ++++++++++++---------
include/dt-bindings/power/mt7622-power.h | 22 ++
include/linux/soc/mediatek/infracfg.h | 7 +
4 files changed, 179 insertions(+), 100 deletions(-)
create mode 100644 include/dt-bindings/power/mt7622-power.h
--
2.7.4
From: Chen Zhong <[email protected]>
Add relevant header files required for dt-bindings of SCPSYS power domain
control for all subsystems found on MT7622 SoC.
Signed-off-by: Chen Zhong <[email protected]>
Signed-off-by: Sean Wang <[email protected]>
---
include/dt-bindings/power/mt7622-power.h | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
create mode 100644 include/dt-bindings/power/mt7622-power.h
diff --git a/include/dt-bindings/power/mt7622-power.h b/include/dt-bindings/power/mt7622-power.h
new file mode 100644
index 0000000..1b63926
--- /dev/null
+++ b/include/dt-bindings/power/mt7622-power.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2017 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See http://www.gnu.org/licenses/gpl-2.0.html for more details.
+ */
+
+#ifndef _DT_BINDINGS_POWER_MT7622_POWER_H
+#define _DT_BINDINGS_POWER_MT7622_POWER_H
+
+#define MT7622_POWER_DOMAIN_ETHSYS 0
+#define MT7622_POWER_DOMAIN_HIF0 1
+#define MT7622_POWER_DOMAIN_HIF1 2
+#define MT7622_POWER_DOMAIN_WB 3
+
+#endif /* _DT_BINDINGS_POWER_MT7622_POWER_H */
--
2.7.4
From: Sean Wang <[email protected]>
Update the binding document for enabling SCPSYS on MediaTek MT7622 SoC.
Signed-off-by: Sean Wang <[email protected]>
Signed-off-by: Chen Zhong <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
Documentation/devicetree/bindings/soc/mediatek/scpsys.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
index b1d165b..40056f7 100644
--- a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
+++ b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
@@ -12,11 +12,13 @@ power/power_domain.txt. It provides the power domains defined in
- include/dt-bindings/power/mt8173-power.h
- include/dt-bindings/power/mt6797-power.h
- include/dt-bindings/power/mt2701-power.h
+- include/dt-bindings/power/mt7622-power.h
Required properties:
- compatible: Should be one of:
- "mediatek,mt2701-scpsys"
- "mediatek,mt6797-scpsys"
+ - "mediatek,mt7622-scpsys"
- "mediatek,mt8173-scpsys"
- #power-domain-cells: Must be 1
- reg: Address range of the SCPSYS unit
@@ -26,6 +28,7 @@ Required properties:
enabled before enabling certain power domains.
Required clocks for MT2701: "mm", "mfg", "ethif"
Required clocks for MT6797: "mm", "mfg", "vdec"
+ Required clocks for MT7622: "hif_sel"
Required clocks for MT8173: "mm", "mfg", "venc", "venc_lt"
Optional properties:
--
2.7.4
From: Sean Wang <[email protected]>
Add SCPSYS power domain driver for MT7622 SoC having four power domains
which are respectively ETHSYS for Ethernet including embedded switch,
WBSYS for WIFI and Bluetooth, HIF0SYS for PCI-E and SATA, and HIF1SYS for
USB. Those functions could be selectively powered gated when the
corresponding function is no longer to use in order to reach more minimal
power dissipation.
Signed-off-by: Chen Zhong <[email protected]>
Signed-off-by: Sean Wang <[email protected]>
---
drivers/soc/mediatek/mtk-scpsys.c | 71 +++++++++++++++++++++++++++++++++++
include/linux/soc/mediatek/infracfg.h | 7 ++++
2 files changed, 78 insertions(+)
diff --git a/drivers/soc/mediatek/mtk-scpsys.c b/drivers/soc/mediatek/mtk-scpsys.c
index 6268b28..e1ce8b1 100644
--- a/drivers/soc/mediatek/mtk-scpsys.c
+++ b/drivers/soc/mediatek/mtk-scpsys.c
@@ -22,6 +22,7 @@
#include <dt-bindings/power/mt2701-power.h>
#include <dt-bindings/power/mt6797-power.h>
+#include <dt-bindings/power/mt7622-power.h>
#include <dt-bindings/power/mt8173-power.h>
#define SPM_VDE_PWR_CON 0x0210
@@ -39,6 +40,11 @@
#define SPM_MFG_2D_PWR_CON 0x02c0
#define SPM_MFG_ASYNC_PWR_CON 0x02c4
#define SPM_USB_PWR_CON 0x02cc
+#define SPM_ETHSYS_PWR_CON 0x02e0 /* MT7622 */
+#define SPM_HIF0_PWR_CON 0x02e4 /* MT7622 */
+#define SPM_HIF1_PWR_CON 0x02e8 /* MT7622 */
+#define SPM_WB_PWR_CON 0x02ec /* MT7622 */
+
#define SPM_PWR_STATUS 0x060c
#define SPM_PWR_STATUS_2ND 0x0610
@@ -64,6 +70,10 @@
#define PWR_STATUS_MFG_ASYNC BIT(23)
#define PWR_STATUS_AUDIO BIT(24)
#define PWR_STATUS_USB BIT(25)
+#define PWR_STATUS_ETHSYS BIT(24) /* MT7622 */
+#define PWR_STATUS_HIF0 BIT(25) /* MT7622 */
+#define PWR_STATUS_HIF1 BIT(26) /* MT7622 */
+#define PWR_STATUS_WB BIT(27) /* MT7622 */
enum clk_id {
CLK_NONE,
@@ -73,6 +83,7 @@ enum clk_id {
CLK_VENC_LT,
CLK_ETHIF,
CLK_VDEC,
+ CLK_HIFSEL,
CLK_MAX,
};
@@ -84,6 +95,7 @@ static const char * const clk_names[] = {
"venc_lt",
"ethif",
"vdec",
+ "hif_sel",
NULL,
};
@@ -653,6 +665,53 @@ static const struct scp_subdomain scp_subdomain_mt6797[] = {
};
/*
+ * MT7622 power domain support
+ */
+
+static const struct scp_domain_data scp_domain_data_mt7622[] = {
+ [MT7622_POWER_DOMAIN_ETHSYS] = {
+ .name = "ethsys",
+ .sta_mask = PWR_STATUS_ETHSYS,
+ .ctl_offs = SPM_ETHSYS_PWR_CON,
+ .sram_pdn_bits = GENMASK(11, 8),
+ .sram_pdn_ack_bits = GENMASK(15, 12),
+ .clk_id = {CLK_NONE},
+ .bus_prot_mask = MT7622_TOP_AXI_PROT_EN_ETHSYS,
+ .active_wakeup = true,
+ },
+ [MT7622_POWER_DOMAIN_HIF0] = {
+ .name = "hif0",
+ .sta_mask = PWR_STATUS_HIF0,
+ .ctl_offs = SPM_HIF0_PWR_CON,
+ .sram_pdn_bits = GENMASK(11, 8),
+ .sram_pdn_ack_bits = GENMASK(15, 12),
+ .clk_id = {CLK_HIFSEL},
+ .bus_prot_mask = MT7622_TOP_AXI_PROT_EN_HIF0,
+ .active_wakeup = true,
+ },
+ [MT7622_POWER_DOMAIN_HIF1] = {
+ .name = "hif1",
+ .sta_mask = PWR_STATUS_HIF1,
+ .ctl_offs = SPM_HIF1_PWR_CON,
+ .sram_pdn_bits = GENMASK(11, 8),
+ .sram_pdn_ack_bits = GENMASK(15, 12),
+ .clk_id = {CLK_HIFSEL},
+ .bus_prot_mask = MT7622_TOP_AXI_PROT_EN_HIF1,
+ .active_wakeup = true,
+ },
+ [MT7622_POWER_DOMAIN_WB] = {
+ .name = "wb",
+ .sta_mask = PWR_STATUS_WB,
+ .ctl_offs = SPM_WB_PWR_CON,
+ .sram_pdn_bits = 0,
+ .sram_pdn_ack_bits = 0,
+ .clk_id = {CLK_NONE},
+ .bus_prot_mask = MT7622_TOP_AXI_PROT_EN_WB,
+ .active_wakeup = true,
+ },
+};
+
+/*
* MT8173 power domain support
*/
@@ -771,6 +830,15 @@ static const struct scp_soc_data mt6797_data = {
}
};
+static const struct scp_soc_data mt7622_data = {
+ .domains = scp_domain_data_mt7622,
+ .num_domains = ARRAY_SIZE(scp_domain_data_mt7622),
+ .regs = {
+ .pwr_sta_offs = SPM_PWR_STATUS,
+ .pwr_sta2nd_offs = SPM_PWR_STATUS_2ND
+ }
+};
+
static const struct scp_soc_data mt8173_data = {
.domains = scp_domain_data_mt8173,
.num_domains = ARRAY_SIZE(scp_domain_data_mt8173),
@@ -794,6 +862,9 @@ static const struct of_device_id of_scpsys_match_tbl[] = {
.compatible = "mediatek,mt6797-scpsys",
.data = &mt6797_data,
}, {
+ .compatible = "mediatek,mt7622-scpsys",
+ .data = &mt7622_data,
+ }, {
.compatible = "mediatek,mt8173-scpsys",
.data = &mt8173_data,
}, {
diff --git a/include/linux/soc/mediatek/infracfg.h b/include/linux/soc/mediatek/infracfg.h
index a5714e9..a0182ec 100644
--- a/include/linux/soc/mediatek/infracfg.h
+++ b/include/linux/soc/mediatek/infracfg.h
@@ -20,6 +20,13 @@
#define MT8173_TOP_AXI_PROT_EN_MFG_M1 BIT(22)
#define MT8173_TOP_AXI_PROT_EN_MFG_SNOOP_OUT BIT(23)
+#define MT7622_TOP_AXI_PROT_EN_ETHSYS (BIT(3) | BIT(17))
+#define MT7622_TOP_AXI_PROT_EN_HIF0 (BIT(24) | BIT(25))
+#define MT7622_TOP_AXI_PROT_EN_HIF1 (BIT(26) | BIT(27) | \
+ BIT(28))
+#define MT7622_TOP_AXI_PROT_EN_WB (BIT(2) | BIT(6) | \
+ BIT(7) | BIT(8))
+
int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask);
int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask);
--
2.7.4
From: Sean Wang <[email protected]>
Reduce code duplication of scpsys_probe_mtXXXX across all SoCs using
the more generic scpsys_probe all covering all cases to avoid starting
to bloat the driver when more MediaTek SoCs supported are added.
Suggested-by: Matthias Brugger <[email protected]>
Signed-off-by: Sean Wang <[email protected]>
---
drivers/soc/mediatek/mtk-scpsys.c | 182 +++++++++++++++++---------------------
1 file changed, 79 insertions(+), 103 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-scpsys.c b/drivers/soc/mediatek/mtk-scpsys.c
index ceb2cc4..6268b28 100644
--- a/drivers/soc/mediatek/mtk-scpsys.c
+++ b/drivers/soc/mediatek/mtk-scpsys.c
@@ -124,6 +124,19 @@ struct scp {
struct scp_ctrl_reg ctrl_reg;
};
+struct scp_subdomain {
+ int origin;
+ int subdomain;
+};
+
+struct scp_soc_data {
+ const struct scp_domain_data *domains;
+ int num_domains;
+ const struct scp_subdomain *subdomains;
+ int num_subdomains;
+ const struct scp_ctrl_reg regs;
+};
+
static int scpsys_domain_is_on(struct scp_domain *scpd)
{
struct scp *scp = scpd->scp;
@@ -357,7 +370,7 @@ static void init_clks(struct platform_device *pdev, struct clk **clk)
static struct scp *init_scp(struct platform_device *pdev,
const struct scp_domain_data *scp_domain_data, int num,
- struct scp_ctrl_reg *scp_ctrl_reg)
+ const struct scp_ctrl_reg *scp_ctrl_reg)
{
struct genpd_onecell_data *pd_data;
struct resource *res;
@@ -565,26 +578,6 @@ static const struct scp_domain_data scp_domain_data_mt2701[] = {
},
};
-#define NUM_DOMAINS_MT2701 ARRAY_SIZE(scp_domain_data_mt2701)
-
-static int __init scpsys_probe_mt2701(struct platform_device *pdev)
-{
- struct scp *scp;
- struct scp_ctrl_reg scp_reg;
-
- scp_reg.pwr_sta_offs = SPM_PWR_STATUS;
- scp_reg.pwr_sta2nd_offs = SPM_PWR_STATUS_2ND;
-
- scp = init_scp(pdev, scp_domain_data_mt2701, NUM_DOMAINS_MT2701,
- &scp_reg);
- if (IS_ERR(scp))
- return PTR_ERR(scp);
-
- mtk_register_power_domains(pdev, scp, NUM_DOMAINS_MT2701);
-
- return 0;
-}
-
/*
* MT6797 power domain support
*/
@@ -649,51 +642,15 @@ static const struct scp_domain_data scp_domain_data_mt6797[] = {
},
};
-#define NUM_DOMAINS_MT6797 ARRAY_SIZE(scp_domain_data_mt6797)
#define SPM_PWR_STATUS_MT6797 0x0180
#define SPM_PWR_STATUS_2ND_MT6797 0x0184
-static int __init scpsys_probe_mt6797(struct platform_device *pdev)
-{
- struct scp *scp;
- struct genpd_onecell_data *pd_data;
- int ret;
- struct scp_ctrl_reg scp_reg;
-
- scp_reg.pwr_sta_offs = SPM_PWR_STATUS_MT6797;
- scp_reg.pwr_sta2nd_offs = SPM_PWR_STATUS_2ND_MT6797;
-
- scp = init_scp(pdev, scp_domain_data_mt6797, NUM_DOMAINS_MT6797,
- &scp_reg);
- if (IS_ERR(scp))
- return PTR_ERR(scp);
-
- mtk_register_power_domains(pdev, scp, NUM_DOMAINS_MT6797);
-
- pd_data = &scp->pd_data;
-
- ret = pm_genpd_add_subdomain(pd_data->domains[MT6797_POWER_DOMAIN_MM],
- pd_data->domains[MT6797_POWER_DOMAIN_VDEC]);
- if (ret && IS_ENABLED(CONFIG_PM))
- dev_err(&pdev->dev, "Failed to add subdomain: %d\n", ret);
-
- ret = pm_genpd_add_subdomain(pd_data->domains[MT6797_POWER_DOMAIN_MM],
- pd_data->domains[MT6797_POWER_DOMAIN_ISP]);
- if (ret && IS_ENABLED(CONFIG_PM))
- dev_err(&pdev->dev, "Failed to add subdomain: %d\n", ret);
-
- ret = pm_genpd_add_subdomain(pd_data->domains[MT6797_POWER_DOMAIN_MM],
- pd_data->domains[MT6797_POWER_DOMAIN_VENC]);
- if (ret && IS_ENABLED(CONFIG_PM))
- dev_err(&pdev->dev, "Failed to add subdomain: %d\n", ret);
-
- ret = pm_genpd_add_subdomain(pd_data->domains[MT6797_POWER_DOMAIN_MM],
- pd_data->domains[MT6797_POWER_DOMAIN_MJC]);
- if (ret && IS_ENABLED(CONFIG_PM))
- dev_err(&pdev->dev, "Failed to add subdomain: %d\n", ret);
-
- return 0;
-}
+static const struct scp_subdomain scp_subdomain_mt6797[] = {
+ {MT6797_POWER_DOMAIN_MM, MT6797_POWER_DOMAIN_VDEC},
+ {MT6797_POWER_DOMAIN_MM, MT6797_POWER_DOMAIN_ISP},
+ {MT6797_POWER_DOMAIN_MM, MT6797_POWER_DOMAIN_VENC},
+ {MT6797_POWER_DOMAIN_MM, MT6797_POWER_DOMAIN_MJC},
+};
/*
* MT8173 power domain support
@@ -789,39 +746,41 @@ static const struct scp_domain_data scp_domain_data_mt8173[] = {
},
};
-#define NUM_DOMAINS_MT8173 ARRAY_SIZE(scp_domain_data_mt8173)
-
-static int __init scpsys_probe_mt8173(struct platform_device *pdev)
-{
- struct scp *scp;
- struct genpd_onecell_data *pd_data;
- int ret;
- struct scp_ctrl_reg scp_reg;
-
- scp_reg.pwr_sta_offs = SPM_PWR_STATUS;
- scp_reg.pwr_sta2nd_offs = SPM_PWR_STATUS_2ND;
-
- scp = init_scp(pdev, scp_domain_data_mt8173, NUM_DOMAINS_MT8173,
- &scp_reg);
- if (IS_ERR(scp))
- return PTR_ERR(scp);
-
- mtk_register_power_domains(pdev, scp, NUM_DOMAINS_MT8173);
-
- pd_data = &scp->pd_data;
+static const struct scp_subdomain scp_subdomain_mt8173[] = {
+ {MT8173_POWER_DOMAIN_MFG_ASYNC, MT8173_POWER_DOMAIN_MFG_2D},
+ {MT8173_POWER_DOMAIN_MFG_2D, MT8173_POWER_DOMAIN_MFG},
+};
- ret = pm_genpd_add_subdomain(pd_data->domains[MT8173_POWER_DOMAIN_MFG_ASYNC],
- pd_data->domains[MT8173_POWER_DOMAIN_MFG_2D]);
- if (ret && IS_ENABLED(CONFIG_PM))
- dev_err(&pdev->dev, "Failed to add subdomain: %d\n", ret);
+static const struct scp_soc_data mt2701_data = {
+ .domains = scp_domain_data_mt2701,
+ .num_domains = ARRAY_SIZE(scp_domain_data_mt2701),
+ .regs = {
+ .pwr_sta_offs = SPM_PWR_STATUS,
+ .pwr_sta2nd_offs = SPM_PWR_STATUS_2ND
+ }
+};
- ret = pm_genpd_add_subdomain(pd_data->domains[MT8173_POWER_DOMAIN_MFG_2D],
- pd_data->domains[MT8173_POWER_DOMAIN_MFG]);
- if (ret && IS_ENABLED(CONFIG_PM))
- dev_err(&pdev->dev, "Failed to add subdomain: %d\n", ret);
+static const struct scp_soc_data mt6797_data = {
+ .domains = scp_domain_data_mt6797,
+ .num_domains = ARRAY_SIZE(scp_domain_data_mt6797),
+ .subdomains = scp_subdomain_mt6797,
+ .num_subdomains = ARRAY_SIZE(scp_subdomain_mt6797),
+ .regs = {
+ .pwr_sta_offs = SPM_PWR_STATUS_MT6797,
+ .pwr_sta2nd_offs = SPM_PWR_STATUS_2ND_MT6797
+ }
+};
- return 0;
-}
+static const struct scp_soc_data mt8173_data = {
+ .domains = scp_domain_data_mt8173,
+ .num_domains = ARRAY_SIZE(scp_domain_data_mt8173),
+ .subdomains = scp_subdomain_mt8173,
+ .num_subdomains = ARRAY_SIZE(scp_subdomain_mt8173),
+ .regs = {
+ .pwr_sta_offs = SPM_PWR_STATUS,
+ .pwr_sta2nd_offs = SPM_PWR_STATUS_2ND
+ }
+};
/*
* scpsys driver init
@@ -830,13 +789,13 @@ static int __init scpsys_probe_mt8173(struct platform_device *pdev)
static const struct of_device_id of_scpsys_match_tbl[] = {
{
.compatible = "mediatek,mt2701-scpsys",
- .data = scpsys_probe_mt2701,
+ .data = &mt2701_data,
}, {
.compatible = "mediatek,mt6797-scpsys",
- .data = scpsys_probe_mt6797,
+ .data = &mt6797_data,
}, {
.compatible = "mediatek,mt8173-scpsys",
- .data = scpsys_probe_mt8173,
+ .data = &mt8173_data,
}, {
/* sentinel */
}
@@ -844,16 +803,33 @@ static const struct of_device_id of_scpsys_match_tbl[] = {
static int scpsys_probe(struct platform_device *pdev)
{
- int (*probe)(struct platform_device *);
- const struct of_device_id *of_id;
+ const struct of_device_id *match;
+ const struct scp_subdomain *sd;
+ const struct scp_soc_data *soc;
+ struct scp *scp;
+ struct genpd_onecell_data *pd_data;
+ int i, ret;
- of_id = of_match_node(of_scpsys_match_tbl, pdev->dev.of_node);
- if (!of_id || !of_id->data)
- return -EINVAL;
+ match = of_match_device(of_scpsys_match_tbl, &pdev->dev);
+ soc = (const struct scp_soc_data *)match->data;
- probe = of_id->data;
+ scp = init_scp(pdev, soc->domains, soc->num_domains, &soc->regs);
+ if (IS_ERR(scp))
+ return PTR_ERR(scp);
+
+ mtk_register_power_domains(pdev, scp, soc->num_domains);
+
+ pd_data = &scp->pd_data;
+
+ for (i = 0, sd = soc->subdomains ; i < soc->num_subdomains ; i++) {
+ ret = pm_genpd_add_subdomain(pd_data->domains[sd->origin],
+ pd_data->domains[sd->subdomain]);
+ if (ret && IS_ENABLED(CONFIG_PM))
+ dev_err(&pdev->dev, "Failed to add subdomain: %d\n",
+ ret);
+ }
- return probe(pdev);
+ return 0;
}
static struct platform_driver scpsys_drv = {
--
2.7.4
On 7 August 2017 at 09:24, <[email protected]> wrote:
> From: Sean Wang <[email protected]>
>
> Changes since v2:
> - reduce code duplication of scpsys_probe across all SoCs
>
> Changes since v1:
> - rebase to Linux v4.13-rc1
>
> There are four power domains on MediaTek MT7622 SoC which are respectively
> ETHSYS for Ethernet including extra embedded switch, HIF0SYS for PCI-E and
> SATA, HIF1SYS for USB and WBSYS for WIFI and Bluetooth.
>
> Those functions could be selectively powered gated when the corresponding
> function is no longer to use in order to reach more minimal power
> dissipation through the patch series introduced here.
>
> Chen Zhong (1):
> soc: mediatek: add header files required for MT7622 SCPSYS dt-binding
>
> Sean Wang (3):
> dt-bindings: soc: update the binding document for SCPSYS on MediaTek
> MT7622 SoC
> soc: mediatek: reduce code duplication of scpsys_probe across all SoCs
> soc: mediatek: add SCPSYS power domain driver for MediaTek MT7622 SoC
>
> .../devicetree/bindings/soc/mediatek/scpsys.txt | 3 +
> drivers/soc/mediatek/mtk-scpsys.c | 247 ++++++++++++---------
> include/dt-bindings/power/mt7622-power.h | 22 ++
> include/linux/soc/mediatek/infracfg.h | 7 +
> 4 files changed, 179 insertions(+), 100 deletions(-)
> create mode 100644 include/dt-bindings/power/mt7622-power.h
>
> --
> 2.7.4
>
Looks good to me! Feel free to add:
Reviewed-by: Ulf Hansson <[email protected]>
Kind regards
Uffe
On 08/08/2017 01:41 PM, Ulf Hansson wrote:
> On 7 August 2017 at 09:24, <[email protected]> wrote:
>> From: Sean Wang <[email protected]>
>>
>> Changes since v2:
>> - reduce code duplication of scpsys_probe across all SoCs
>>
>> Changes since v1:
>> - rebase to Linux v4.13-rc1
>>
>> There are four power domains on MediaTek MT7622 SoC which are respectively
>> ETHSYS for Ethernet including extra embedded switch, HIF0SYS for PCI-E and
>> SATA, HIF1SYS for USB and WBSYS for WIFI and Bluetooth.
>>
>> Those functions could be selectively powered gated when the corresponding
>> function is no longer to use in order to reach more minimal power
>> dissipation through the patch series introduced here.
>>
>> Chen Zhong (1):
>> soc: mediatek: add header files required for MT7622 SCPSYS dt-binding
>>
>> Sean Wang (3):
>> dt-bindings: soc: update the binding document for SCPSYS on MediaTek
>> MT7622 SoC
>> soc: mediatek: reduce code duplication of scpsys_probe across all SoCs
>> soc: mediatek: add SCPSYS power domain driver for MediaTek MT7622 SoC
>>
>> .../devicetree/bindings/soc/mediatek/scpsys.txt | 3 +
>> drivers/soc/mediatek/mtk-scpsys.c | 247 ++++++++++++---------
>> include/dt-bindings/power/mt7622-power.h | 22 ++
>> include/linux/soc/mediatek/infracfg.h | 7 +
>> 4 files changed, 179 insertions(+), 100 deletions(-)
>> create mode 100644 include/dt-bindings/power/mt7622-power.h
>>
>> --
>> 2.7.4
>>
>
> Looks good to me! Feel free to add:
>
> Reviewed-by: Ulf Hansson <[email protected]>
>
Pushed to v4.13-next/soc with the Reviewed-by.
Thanks!