From: Peng Fan <[email protected]>
V5:
Add R-b for dt-bindings
Tune order of vpu blk ctrl node per unit address
Update commit log of patch 5.
- Per HRV, this should be detailed explained in HDMI HRV driver, so here
I only say HRV_MWR(HDMI RX Video Memory Write Master for RX validation).
V4:
Add R-b for patch 2
Add a new patch 3 to introduce interconnect property for i.MX8MM VPU blk ctrl,
same to other properties, i.MX8MM/P could use their own names in patch 4
V3:
Per DT maitainer, add a new patch to clean up minItems, see patch 2
V2:
- Add A-b from DT maintainer for patch 1
- Per DT maintainer, I added description for items. To
make it consistent, I also added description to i.MX8MM.
- Per Adam, change VPU H1/h1 to VC8000E/vc8000e in the patchset.
This patchset is to add more blk ctrl support for i.MX8MP
- Add HDMI HDCP/HRV BLK CTRL support
- Add VPU BLK CTRL support
- Add PGC VPU node which supplies power domain for VPU BLK
Peng Fan (8):
dt-bindings: power: imx8mp-power: add HDMI HDCP/HRV
dt-bindings: soc: imx: drop minItems for i.MX8MM vpu blk ctrl
dt-bindings: soc: imx: add interconnect property for i.MX8MM vpu blk
ctrl
dt-bindings: soc: imx: add i.MX8MP vpu blk ctrl
soc: imx: add i.MX8MP HDMI blk ctrl HDCP/HRV_MWR
soc: imx: imx8m-blk-ctrl: add i.MX8MP VPU blk ctrl
arm64: dts: imx8mp: add vpu pgc nodes
arm64: dts: imx8mp: add VPU blk ctrl node
.../soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml | 110 ++++++++++++++++--
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 44 +++++++
drivers/soc/imx/imx8m-blk-ctrl.c | 43 +++++++
drivers/soc/imx/imx8mp-blk-ctrl.c | 30 +++++
include/dt-bindings/power/imx8mp-power.h | 6 +
5 files changed, 222 insertions(+), 11 deletions(-)
--
2.37.1
From: Peng Fan <[email protected]>
Add i.MX8MP PGC nodes for vpu, which are used to supply power for VPU.
Signed-off-by: Peng Fan <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 27 +++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 0b165f98a82c..34af983b0210 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -598,6 +598,33 @@ pgc_ispdwp: power-domain@18 {
reg = <IMX8MP_POWER_DOMAIN_MEDIAMIX_ISPDWP>;
clocks = <&clk IMX8MP_CLK_MEDIA_ISP_ROOT>;
};
+
+ pgc_vpumix: power-domain@19 {
+ #power-domain-cells = <0>;
+ reg = <IMX8MP_POWER_DOMAIN_VPUMIX>;
+ clocks =<&clk IMX8MP_CLK_VPU_ROOT>;
+ };
+
+ pgc_vpu_g1: power-domain@20 {
+ #power-domain-cells = <0>;
+ power-domains = <&pgc_vpumix>;
+ reg = <IMX8MP_POWER_DOMAIN_VPU_G1>;
+ clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>;
+ };
+
+ pgc_vpu_g2: power-domain@21 {
+ #power-domain-cells = <0>;
+ power-domains = <&pgc_vpumix>;
+ reg = <IMX8MP_POWER_DOMAIN_VPU_G2>;
+ clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>;
+ };
+
+ pgc_vpu_vc8000e: power-domain@22 {
+ #power-domain-cells = <0>;
+ power-domains = <&pgc_vpumix>;
+ reg = <IMX8MP_POWER_DOMAIN_VPU_VC8000E>;
+ clocks = <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
+ };
};
};
};
--
2.37.1
From: Peng Fan <[email protected]>
Add i.MX8MP HDMI HDCP and HRV entries.
Acked-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
---
include/dt-bindings/power/imx8mp-power.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/dt-bindings/power/imx8mp-power.h b/include/dt-bindings/power/imx8mp-power.h
index 7789bcca3223..14b9c5ac9c82 100644
--- a/include/dt-bindings/power/imx8mp-power.h
+++ b/include/dt-bindings/power/imx8mp-power.h
@@ -49,5 +49,7 @@
#define IMX8MP_HDMIBLK_PD_TRNG 4
#define IMX8MP_HDMIBLK_PD_HDMI_TX 5
#define IMX8MP_HDMIBLK_PD_HDMI_TX_PHY 6
+#define IMX8MP_HDMIBLK_PD_HDCP 7
+#define IMX8MP_HDMIBLK_PD_HRV 8
#endif
--
2.37.1
From: Peng Fan <[email protected]>
minItems and maxItems are set as the same value. In such case minItems is
not necessary. So drop it.
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
---
.../devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml | 2 --
1 file changed, 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml
index 26487daa64d9..b3fb529b399c 100644
--- a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml
+++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml
@@ -27,7 +27,6 @@ properties:
const: 1
power-domains:
- minItems: 4
maxItems: 4
power-domain-names:
@@ -38,7 +37,6 @@ properties:
- const: h1
clocks:
- minItems: 3
maxItems: 3
clock-names:
--
2.37.1
From: Peng Fan <[email protected]>
i.MX8MP HDMI supports HDCP and HRV_MWR(HDMI RX Video Memory Write Master
for RXRX validation), so add them.
Signed-off-by: Peng Fan <[email protected]>
---
drivers/soc/imx/imx8mp-blk-ctrl.c | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/drivers/soc/imx/imx8mp-blk-ctrl.c b/drivers/soc/imx/imx8mp-blk-ctrl.c
index 6f983adcb47c..527d45d12a54 100644
--- a/drivers/soc/imx/imx8mp-blk-ctrl.c
+++ b/drivers/soc/imx/imx8mp-blk-ctrl.c
@@ -235,6 +235,13 @@ static void imx8mp_hdmi_blk_ctrl_power_on(struct imx8mp_blk_ctrl *bc,
regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(12));
regmap_clear_bits(bc->regmap, HDMI_TX_CONTROL0, BIT(3));
break;
+ case IMX8MP_HDMIBLK_PD_HDCP:
+ regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(11));
+ break;
+ case IMX8MP_HDMIBLK_PD_HRV:
+ regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(3) | BIT(4) | BIT(5));
+ regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(15));
+ break;
default:
break;
}
@@ -283,6 +290,13 @@ static void imx8mp_hdmi_blk_ctrl_power_off(struct imx8mp_blk_ctrl *bc,
regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(12));
regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(22) | BIT(24));
break;
+ case IMX8MP_HDMIBLK_PD_HDCP:
+ regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(11));
+ break;
+ case IMX8MP_HDMIBLK_PD_HRV:
+ regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(15));
+ regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(3) | BIT(4) | BIT(5));
+ break;
default:
break;
}
@@ -365,6 +379,22 @@ static const struct imx8mp_blk_ctrl_domain_data imx8mp_hdmi_domain_data[] = {
.num_clks = 2,
.gpc_name = "hdmi-tx-phy",
},
+ [IMX8MP_HDMIBLK_PD_HRV] = {
+ .name = "hdmiblk-hrv",
+ .clk_names = (const char *[]){ "axi", "apb" },
+ .num_clks = 2,
+ .gpc_name = "hrv",
+ .path_names = (const char *[]){"hrv"},
+ .num_paths = 1,
+ },
+ [IMX8MP_HDMIBLK_PD_HDCP] = {
+ .name = "hdmiblk-hdcp",
+ .clk_names = (const char *[]){ "axi", "apb" },
+ .num_clks = 2,
+ .gpc_name = "hdcp",
+ .path_names = (const char *[]){"hdcp"},
+ .num_paths = 1,
+ },
};
static const struct imx8mp_blk_ctrl_data imx8mp_hdmi_blk_ctl_dev_data = {
--
2.37.1
From: Peng Fan <[email protected]>
i.MX8MM VPU support NoC QoS setting, so add interconnect property
for i.MX8MM VPU blk ctrl
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
---
.../bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml
index b3fb529b399c..d79e5d2634d6 100644
--- a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml
+++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml
@@ -45,6 +45,18 @@ properties:
- const: g2
- const: h1
+ interconnects:
+ items:
+ - description: G1 decoder interconnect
+ - description: G2 decoder interconnect
+ - description: H1 encoder power domain
+
+ interconnect-names:
+ items:
+ - const: g1
+ - const: g2
+ - const: h1
+
required:
- compatible
- reg
--
2.37.1
From: Peng Fan <[email protected]>
i.MX8MP VPU blk ctrl module has similar design as i.MX8MM, so reuse
the i.MX8MM VPU blk ctrl yaml file. And add description for the items.
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
---
.../soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml | 112 +++++++++++++++---
include/dt-bindings/power/imx8mp-power.h | 4 +
2 files changed, 99 insertions(+), 17 deletions(-)
diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml
index d79e5d2634d6..d71bb20d4907 100644
--- a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml
+++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml
@@ -30,32 +30,19 @@ properties:
maxItems: 4
power-domain-names:
- items:
- - const: bus
- - const: g1
- - const: g2
- - const: h1
+ maxItems: 4
clocks:
maxItems: 3
clock-names:
- items:
- - const: g1
- - const: g2
- - const: h1
+ maxItems: 3
interconnects:
- items:
- - description: G1 decoder interconnect
- - description: G2 decoder interconnect
- - description: H1 encoder power domain
+ maxItems: 3
interconnect-names:
- items:
- - const: g1
- - const: g2
- - const: h1
+ maxItems: 3
required:
- compatible
@@ -65,6 +52,97 @@ required:
- clocks
- clock-names
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: fsl,imx8mm-vpu-blk-ctrl
+ then:
+ properties:
+ power-domains:
+ items:
+ - description: bus power domain
+ - description: G1 decoder power domain
+ - description: G2 decoder power domain
+ - description: H1 encoder power domain
+
+ power-domain-names:
+ items:
+ - const: bus
+ - const: g1
+ - const: g2
+ - const: h1
+
+ clocks:
+ items:
+ - description: G1 decoder clk
+ - description: G2 decoder clk
+ - description: H1 encoder clk
+
+ clock-names:
+ items:
+ - const: g1
+ - const: g2
+ - const: h1
+
+ interconnects:
+ items:
+ - description: G1 decoder interconnect
+ - description: G2 decoder interconnect
+ - description: H1 encoder power domain
+
+ interconnect-names:
+ items:
+ - const: g1
+ - const: g2
+ - const: h1
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: fsl,imx8mp-vpu-blk-ctrl
+ then:
+ properties:
+ power-domains:
+ items:
+ - description: bus power domain
+ - description: G1 decoder power domain
+ - description: G2 decoder power domain
+ - description: VC8000E encoder power domain
+
+ power-domain-names:
+ items:
+ - const: bus
+ - const: g1
+ - const: g2
+ - const: vc8000e
+
+ clocks:
+ items:
+ - description: G1 decoder clk
+ - description: G2 decoder clk
+ - description: VC8000E encoder clk
+
+ clock-names:
+ items:
+ - const: g1
+ - const: g2
+ - const: vc8000e
+
+ interconnects:
+ items:
+ - description: G1 decoder interconnect
+ - description: G2 decoder interconnect
+ - description: VC8000E encoder interconnect
+
+ interconnect-names:
+ items:
+ - const: g1
+ - const: g2
+ - const: vc8000e
+
additionalProperties: false
examples:
diff --git a/include/dt-bindings/power/imx8mp-power.h b/include/dt-bindings/power/imx8mp-power.h
index 14b9c5ac9c82..2fe3c2abad13 100644
--- a/include/dt-bindings/power/imx8mp-power.h
+++ b/include/dt-bindings/power/imx8mp-power.h
@@ -52,4 +52,8 @@
#define IMX8MP_HDMIBLK_PD_HDCP 7
#define IMX8MP_HDMIBLK_PD_HRV 8
+#define IMX8MP_VPUBLK_PD_G1 0
+#define IMX8MP_VPUBLK_PD_G2 1
+#define IMX8MP_VPUBLK_PD_VC8000E 2
+
#endif
--
2.37.1
On Mon, Aug 22, 2022 at 02:45:28PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <[email protected]>
>
> V5:
> Add R-b for dt-bindings
> Tune order of vpu blk ctrl node per unit address
> Update commit log of patch 5.
> - Per HRV, this should be detailed explained in HDMI HRV driver, so here
> I only say HRV_MWR(HDMI RX Video Memory Write Master for RX validation).
>
> V4:
> Add R-b for patch 2
> Add a new patch 3 to introduce interconnect property for i.MX8MM VPU blk ctrl,
> same to other properties, i.MX8MM/P could use their own names in patch 4
>
> V3:
> Per DT maitainer, add a new patch to clean up minItems, see patch 2
>
> V2:
> - Add A-b from DT maintainer for patch 1
> - Per DT maintainer, I added description for items. To
> make it consistent, I also added description to i.MX8MM.
> - Per Adam, change VPU H1/h1 to VC8000E/vc8000e in the patchset.
>
> This patchset is to add more blk ctrl support for i.MX8MP
> - Add HDMI HDCP/HRV BLK CTRL support
> - Add VPU BLK CTRL support
> - Add PGC VPU node which supplies power domain for VPU BLK
>
> Peng Fan (8):
> dt-bindings: power: imx8mp-power: add HDMI HDCP/HRV
> dt-bindings: soc: imx: drop minItems for i.MX8MM vpu blk ctrl
> dt-bindings: soc: imx: add interconnect property for i.MX8MM vpu blk
> ctrl
> dt-bindings: soc: imx: add i.MX8MP vpu blk ctrl
> soc: imx: add i.MX8MP HDMI blk ctrl HDCP/HRV_MWR
> soc: imx: imx8m-blk-ctrl: add i.MX8MP VPU blk ctrl
> arm64: dts: imx8mp: add vpu pgc nodes
> arm64: dts: imx8mp: add VPU blk ctrl node
Applied all, thanks!
Hello,
Am Montag, 22. August 2022, 08:45:33 CEST schrieb Peng Fan (OSS):
> From: Peng Fan <[email protected]>
>
> i.MX8MP HDMI supports HDCP and HRV_MWR(HDMI RX Video Memory Write Master
> for RXRX validation), so add them.
>
> Signed-off-by: Peng Fan <[email protected]>
> ---
> drivers/soc/imx/imx8mp-blk-ctrl.c | 30 ++++++++++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
> diff --git a/drivers/soc/imx/imx8mp-blk-ctrl.c
> b/drivers/soc/imx/imx8mp-blk-ctrl.c index 6f983adcb47c..527d45d12a54 100644
> --- a/drivers/soc/imx/imx8mp-blk-ctrl.c
> +++ b/drivers/soc/imx/imx8mp-blk-ctrl.c
> @@ -235,6 +235,13 @@ static void imx8mp_hdmi_blk_ctrl_power_on(struct
> imx8mp_blk_ctrl *bc, regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0,
> BIT(12));
> regmap_clear_bits(bc->regmap, HDMI_TX_CONTROL0, BIT(3));
> break;
> + case IMX8MP_HDMIBLK_PD_HDCP:
> + regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(11));
> + break;
> + case IMX8MP_HDMIBLK_PD_HRV:
> + regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(3) |
BIT(4) | BIT(5));
> + regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0,
BIT(15));
> + break;
> default:
> break;
> }
> @@ -283,6 +290,13 @@ static void imx8mp_hdmi_blk_ctrl_power_off(struct
> imx8mp_blk_ctrl *bc, regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0,
> BIT(12));
> regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(22)
| BIT(24));
> break;
> + case IMX8MP_HDMIBLK_PD_HDCP:
> + regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0,
BIT(11));
> + break;
> + case IMX8MP_HDMIBLK_PD_HRV:
> + regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0,
BIT(15));
> + regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(3)
| BIT(4) |
> BIT(5)); + break;
> default:
> break;
> }
> @@ -365,6 +379,22 @@ static const struct imx8mp_blk_ctrl_domain_data
> imx8mp_hdmi_domain_data[] = { .num_clks = 2,
> .gpc_name = "hdmi-tx-phy",
> },
> + [IMX8MP_HDMIBLK_PD_HRV] = {
> + .name = "hdmiblk-hrv",
> + .clk_names = (const char *[]){ "axi", "apb" },
> + .num_clks = 2,
> + .gpc_name = "hrv",
> + .path_names = (const char *[]){"hrv"},
> + .num_paths = 1,
> + },
> + [IMX8MP_HDMIBLK_PD_HDCP] = {
> + .name = "hdmiblk-hdcp",
> + .clk_names = (const char *[]){ "axi", "apb" },
> + .num_clks = 2,
> + .gpc_name = "hdcp",
> + .path_names = (const char *[]){"hdcp"},
> + .num_paths = 1,
> + },
> };
>
> static const struct imx8mp_blk_ctrl_data imx8mp_hdmi_blk_ctl_dev_data = {
Something is missing here. Iget the following error during boot:
[ 0.886211] Unable to handle kernel NULL pointer dereference at virtual
address 0000000000000000
[ 0.895043] Mem abort info:
[ 0.897841] ESR = 0x0000000096000004
[ 0.901606] EC = 0x25: DABT (current EL), IL = 32 bits
[ 0.906942] SET = 0, FnV = 0
[ 0.910003] EA = 0, S1PTW = 0
[ 0.913159] FSC = 0x04: level 0 translation fault
[ 0.918054] Data abort info:
[ 0.920943] ISV = 0, ISS = 0x00000004
[ 0.924791] CM = 0, WnR = 0
[ 0.927761] [0000000000000000] user address but active_mm is swapper
[ 0.934157] Internal error: Oops: 96000004 [#1] PREEMPT SMP
[ 0.939749] Modules linked in:
[ 0.942813] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 6.0.0-rc4-
next-20220906+ #674 2c55fa642ba20b0dbb66c0e78dacc9ca96d5e733
[ 0.954099] Hardware name: TQ-Systems i.MX8MPlus TQMa8MPxL on MBa8MPxL (DT)
[ 0.961100] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[ 0.968099] pc : kobject_set_name_vargs+0x10/0xd0
[ 0.972823] lr : dev_set_name+0x58/0x80
[ 0.976674] sp : ffff800009c7b860
[ 0.979997] x29: ffff800009c7b860 x28: ffff000002d728f8 x27:
0000000000000150
[ 0.987172] x26: 0000000000000009 x25: 0000000000000007 x24:
ffff800009ab8958
[ 0.994347] x23: ffff0000000a0000 x22: ffff800008eb77d8 x21:
ffff000000225410
[ 1.001524] x20: ffff800008eb7808 x19: 0000000000000000 x18:
0000000000000000
[ 1.008697] x17: 702d78742d696d64 x16: 682d6b6c62696d64 x15:
68203a656d616e3e
[ 1.015872] x14: 0000000000000000 x13: 70636468203a656d x12:
616e5f6370673e2d
[ 1.023047] x11: 61746164203a6c72 x10: 74632d6b6c622e30 x9 :
7274632d6b6c622e
[ 1.030222] x8 : 3030303063663233 x7 : 205d353039393738 x6 :
ffff800009a240e0
[ 1.037397] x5 : 00000000ffffffd0 x4 : ffff800009c7b920 x3 :
00000000ffffffd0
[ 1.044572] x2 : ffff800009c7b8d0 x1 : ffff80000936ca78 x0 :
0000000000000000
[ 1.051749] Call trace:
[ 1.054199] kobject_set_name_vargs+0x10/0xd0
[ 1.058574] dev_set_name+0x58/0x80
[ 1.062072] imx8mp_blk_ctrl_probe+0x5c0/0x660
[ 1.066534] platform_probe+0x64/0x100
[ 1.070297] call_driver_probe+0x28/0x140
[ 1.074322] really_probe+0xc0/0x334
[ 1.077909] __driver_probe_device+0x84/0x144
[ 1.082284] driver_probe_device+0x38/0x130
[ 1.086486] __driver_attach+0xac/0x244
[ 1.090334] bus_for_each_dev+0x6c/0xc0
[ 1.094184] driver_attach+0x20/0x30
[ 1.097772] bus_add_driver+0x174/0x244
[ 1.101622] driver_register+0x74/0x120
[ 1.105474] __platform_driver_register+0x24/0x30
[ 1.110197] imx8mp_blk_ctrl_driver_init+0x18/0x20
[ 1.115009] do_one_initcall+0x58/0x200
[ 1.118861] do_initcalls+0x164/0x19c
[ 1.122534] kernel_init_freeable+0x134/0x17c
[ 1.126909] kernel_init+0x2c/0x150
[ 1.130411] ret_from_fork+0x10/0x20
[ 1.134003] Code: a9bb7bfd 910003fd a90153f3 aa0003f3 (f9400000)
[ 1.140127] ---[ end trace 0000000000000000 ]---
Adding some debug out shows:
[ 0.866795] imx8mp-blk-ctrl 32fc0000.blk-ctrl: domain->power_dev: 0x0
[ 0.873257] imx8mp-blk-ctrl 32fc0000.blk-ctrl: data->name: hdmiblk-hdcp
[ 0.879905] imx8mp-blk-ctrl 32fc0000.blk-ctrl: data->gpc_name: hdcp
AFAICS the power domains 'hrv' and 'hdcp' are missing in the 'hdmi_blk_ctrl:
blk-ctrl@32fc0000' node thus resulting in a NULL pointer from calling
dev_pm_domain_attach_by_name().
Is there a patch I am missing.
Best regards,
Alexander
On 9/6/2022 10:37 PM, Alexander Stein wrote:
> Hello,
>
> Am Montag, 22. August 2022, 08:45:33 CEST schrieb Peng Fan (OSS):
>> From: Peng Fan <[email protected]>
>>
>> i.MX8MP HDMI supports HDCP and HRV_MWR(HDMI RX Video Memory Write Master
>> for RXRX validation), so add them.
>>
>> Signed-off-by: Peng Fan <[email protected]>
>> ---
>> drivers/soc/imx/imx8mp-blk-ctrl.c | 30 ++++++++++++++++++++++++++++++
>> 1 file changed, 30 insertions(+)
>>
>> diff --git a/drivers/soc/imx/imx8mp-blk-ctrl.c
>> b/drivers/soc/imx/imx8mp-blk-ctrl.c index 6f983adcb47c..527d45d12a54 100644
>> --- a/drivers/soc/imx/imx8mp-blk-ctrl.c
>> +++ b/drivers/soc/imx/imx8mp-blk-ctrl.c
>> @@ -235,6 +235,13 @@ static void imx8mp_hdmi_blk_ctrl_power_on(struct
>> imx8mp_blk_ctrl *bc, regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0,
>> BIT(12));
>> regmap_clear_bits(bc->regmap, HDMI_TX_CONTROL0, BIT(3));
>> break;
>> + case IMX8MP_HDMIBLK_PD_HDCP:
>> + regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(11));
>> + break;
>> + case IMX8MP_HDMIBLK_PD_HRV:
>> + regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(3) |
> BIT(4) | BIT(5));
>> + regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0,
> BIT(15));
>> + break;
>> default:
>> break;
>> }
>> @@ -283,6 +290,13 @@ static void imx8mp_hdmi_blk_ctrl_power_off(struct
>> imx8mp_blk_ctrl *bc, regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0,
>> BIT(12));
>> regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(22)
> | BIT(24));
>> break;
>> + case IMX8MP_HDMIBLK_PD_HDCP:
>> + regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0,
> BIT(11));
>> + break;
>> + case IMX8MP_HDMIBLK_PD_HRV:
>> + regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0,
> BIT(15));
>> + regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(3)
> | BIT(4) |
>> BIT(5)); + break;
>> default:
>> break;
>> }
>> @@ -365,6 +379,22 @@ static const struct imx8mp_blk_ctrl_domain_data
>> imx8mp_hdmi_domain_data[] = { .num_clks = 2,
>> .gpc_name = "hdmi-tx-phy",
>> },
>> + [IMX8MP_HDMIBLK_PD_HRV] = {
>> + .name = "hdmiblk-hrv",
>> + .clk_names = (const char *[]){ "axi", "apb" },
>> + .num_clks = 2,
>> + .gpc_name = "hrv",
>> + .path_names = (const char *[]){"hrv"},
>> + .num_paths = 1,
>> + },
>> + [IMX8MP_HDMIBLK_PD_HDCP] = {
>> + .name = "hdmiblk-hdcp",
>> + .clk_names = (const char *[]){ "axi", "apb" },
>> + .num_clks = 2,
>> + .gpc_name = "hdcp",
>> + .path_names = (const char *[]){"hdcp"},
>> + .num_paths = 1,
>> + },
>> };
>>
>> static const struct imx8mp_blk_ctrl_data imx8mp_hdmi_blk_ctl_dev_data = {
>
> Something is missing here. Iget the following error during boot:
> [ 0.886211] Unable to handle kernel NULL pointer dereference at virtual
> address 0000000000000000
> [ 0.895043] Mem abort info:
> [ 0.897841] ESR = 0x0000000096000004
> [ 0.901606] EC = 0x25: DABT (current EL), IL = 32 bits
> [ 0.906942] SET = 0, FnV = 0
> [ 0.910003] EA = 0, S1PTW = 0
> [ 0.913159] FSC = 0x04: level 0 translation fault
> [ 0.918054] Data abort info:
> [ 0.920943] ISV = 0, ISS = 0x00000004
> [ 0.924791] CM = 0, WnR = 0
> [ 0.927761] [0000000000000000] user address but active_mm is swapper
> [ 0.934157] Internal error: Oops: 96000004 [#1] PREEMPT SMP
> [ 0.939749] Modules linked in:
> [ 0.942813] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 6.0.0-rc4-
> next-20220906+ #674 2c55fa642ba20b0dbb66c0e78dacc9ca96d5e733
> [ 0.954099] Hardware name: TQ-Systems i.MX8MPlus TQMa8MPxL on MBa8MPxL (DT)
> [ 0.961100] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
> [ 0.968099] pc : kobject_set_name_vargs+0x10/0xd0
> [ 0.972823] lr : dev_set_name+0x58/0x80
> [ 0.976674] sp : ffff800009c7b860
> [ 0.979997] x29: ffff800009c7b860 x28: ffff000002d728f8 x27:
> 0000000000000150
> [ 0.987172] x26: 0000000000000009 x25: 0000000000000007 x24:
> ffff800009ab8958
> [ 0.994347] x23: ffff0000000a0000 x22: ffff800008eb77d8 x21:
> ffff000000225410
> [ 1.001524] x20: ffff800008eb7808 x19: 0000000000000000 x18:
> 0000000000000000
> [ 1.008697] x17: 702d78742d696d64 x16: 682d6b6c62696d64 x15:
> 68203a656d616e3e
> [ 1.015872] x14: 0000000000000000 x13: 70636468203a656d x12:
> 616e5f6370673e2d
> [ 1.023047] x11: 61746164203a6c72 x10: 74632d6b6c622e30 x9 :
> 7274632d6b6c622e
> [ 1.030222] x8 : 3030303063663233 x7 : 205d353039393738 x6 :
> ffff800009a240e0
> [ 1.037397] x5 : 00000000ffffffd0 x4 : ffff800009c7b920 x3 :
> 00000000ffffffd0
> [ 1.044572] x2 : ffff800009c7b8d0 x1 : ffff80000936ca78 x0 :
> 0000000000000000
> [ 1.051749] Call trace:
> [ 1.054199] kobject_set_name_vargs+0x10/0xd0
> [ 1.058574] dev_set_name+0x58/0x80
> [ 1.062072] imx8mp_blk_ctrl_probe+0x5c0/0x660
> [ 1.066534] platform_probe+0x64/0x100
> [ 1.070297] call_driver_probe+0x28/0x140
> [ 1.074322] really_probe+0xc0/0x334
> [ 1.077909] __driver_probe_device+0x84/0x144
> [ 1.082284] driver_probe_device+0x38/0x130
> [ 1.086486] __driver_attach+0xac/0x244
> [ 1.090334] bus_for_each_dev+0x6c/0xc0
> [ 1.094184] driver_attach+0x20/0x30
> [ 1.097772] bus_add_driver+0x174/0x244
> [ 1.101622] driver_register+0x74/0x120
> [ 1.105474] __platform_driver_register+0x24/0x30
> [ 1.110197] imx8mp_blk_ctrl_driver_init+0x18/0x20
> [ 1.115009] do_one_initcall+0x58/0x200
> [ 1.118861] do_initcalls+0x164/0x19c
> [ 1.122534] kernel_init_freeable+0x134/0x17c
> [ 1.126909] kernel_init+0x2c/0x150
> [ 1.130411] ret_from_fork+0x10/0x20
> [ 1.134003] Code: a9bb7bfd 910003fd a90153f3 aa0003f3 (f9400000)
> [ 1.140127] ---[ end trace 0000000000000000 ]---
>
> Adding some debug out shows:
> [ 0.866795] imx8mp-blk-ctrl 32fc0000.blk-ctrl: domain->power_dev: 0x0
> [ 0.873257] imx8mp-blk-ctrl 32fc0000.blk-ctrl: data->name: hdmiblk-hdcp
> [ 0.879905] imx8mp-blk-ctrl 32fc0000.blk-ctrl: data->gpc_name: hdcp
>
> AFAICS the power domains 'hrv' and 'hdcp' are missing in the 'hdmi_blk_ctrl:
> blk-ctrl@32fc0000' node thus resulting in a NULL pointer from calling
> dev_pm_domain_attach_by_name().
The HDMI blk ctrl dts not landed in Shawn's branch, could you share me
your dts change?
And dev_set_name, as I recall, Lucas has a patch to remove that.
Regards,
Peng.
>
> Is there a patch I am missing.
>
> Best regards,
> Alexander
>
>
Hello,
Am Mittwoch, 7. September 2022, 04:41:46 CEST schrieb Peng Fan:
> On 9/6/2022 10:37 PM, Alexander Stein wrote:
> > Hello,
> >
> > Am Montag, 22. August 2022, 08:45:33 CEST schrieb Peng Fan (OSS):
> >> From: Peng Fan <[email protected]>
> >>
> >> i.MX8MP HDMI supports HDCP and HRV_MWR(HDMI RX Video Memory Write Master
> >> for RXRX validation), so add them.
> >>
> >> Signed-off-by: Peng Fan <[email protected]>
> >> ---
> >>
> >> drivers/soc/imx/imx8mp-blk-ctrl.c | 30 ++++++++++++++++++++++++++++++
> >> 1 file changed, 30 insertions(+)
> >>
> >> diff --git a/drivers/soc/imx/imx8mp-blk-ctrl.c
> >> b/drivers/soc/imx/imx8mp-blk-ctrl.c index 6f983adcb47c..527d45d12a54
> >> 100644
> >> --- a/drivers/soc/imx/imx8mp-blk-ctrl.c
> >> +++ b/drivers/soc/imx/imx8mp-blk-ctrl.c
> >> @@ -235,6 +235,13 @@ static void imx8mp_hdmi_blk_ctrl_power_on(struct
> >> imx8mp_blk_ctrl *bc, regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0,
> >> BIT(12));
> >>
> >> regmap_clear_bits(bc->regmap, HDMI_TX_CONTROL0, BIT(3));
> >> break;
> >>
> >> + case IMX8MP_HDMIBLK_PD_HDCP:
> >> + regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(11));
> >> + break;
> >> + case IMX8MP_HDMIBLK_PD_HRV:
> >> + regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(3) |
> >
> > BIT(4) | BIT(5));
> >
> >> + regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0,
> >
> > BIT(15));
> >
> >> + break;
> >>
> >> default:
> >> break;
> >>
> >> }
> >>
> >> @@ -283,6 +290,13 @@ static void imx8mp_hdmi_blk_ctrl_power_off(struct
> >> imx8mp_blk_ctrl *bc, regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0,
> >> BIT(12));
> >>
> >> regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(22)
> > |
> > | BIT(24));
> > |
> >> break;
> >>
> >> + case IMX8MP_HDMIBLK_PD_HDCP:
> >> + regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0,
> >
> > BIT(11));
> >
> >> + break;
> >> + case IMX8MP_HDMIBLK_PD_HRV:
> >> + regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0,
> >
> > BIT(15));
> >
> >> + regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(3)
> >>
> > | BIT(4) |
> >>
> >> BIT(5)); + break;
> >>
> >> default:
> >> break;
> >>
> >> }
> >>
> >> @@ -365,6 +379,22 @@ static const struct imx8mp_blk_ctrl_domain_data
> >> imx8mp_hdmi_domain_data[] = { .num_clks = 2,
> >>
> >> .gpc_name = "hdmi-tx-phy",
> >>
> >> },
> >>
> >> + [IMX8MP_HDMIBLK_PD_HRV] = {
> >> + .name = "hdmiblk-hrv",
> >> + .clk_names = (const char *[]){ "axi", "apb" },
> >> + .num_clks = 2,
> >> + .gpc_name = "hrv",
> >> + .path_names = (const char *[]){"hrv"},
> >> + .num_paths = 1,
> >> + },
> >> + [IMX8MP_HDMIBLK_PD_HDCP] = {
> >> + .name = "hdmiblk-hdcp",
> >> + .clk_names = (const char *[]){ "axi", "apb" },
> >> + .num_clks = 2,
> >> + .gpc_name = "hdcp",
> >> + .path_names = (const char *[]){"hdcp"},
> >> + .num_paths = 1,
> >> + },
> >>
> >> };
> >>
> >> static const struct imx8mp_blk_ctrl_data imx8mp_hdmi_blk_ctl_dev_data =
> >> {
> >
> > Something is missing here. Iget the following error during boot:
> > [ 0.886211] Unable to handle kernel NULL pointer dereference at virtual
> > address 0000000000000000
> > [ 0.895043] Mem abort info:
> > [ 0.897841] ESR = 0x0000000096000004
> > [ 0.901606] EC = 0x25: DABT (current EL), IL = 32 bits
> > [ 0.906942] SET = 0, FnV = 0
> > [ 0.910003] EA = 0, S1PTW = 0
> > [ 0.913159] FSC = 0x04: level 0 translation fault
> > [ 0.918054] Data abort info:
> > [ 0.920943] ISV = 0, ISS = 0x00000004
> > [ 0.924791] CM = 0, WnR = 0
> > [ 0.927761] [0000000000000000] user address but active_mm is swapper
> > [ 0.934157] Internal error: Oops: 96000004 [#1] PREEMPT SMP
> > [ 0.939749] Modules linked in:
> > [ 0.942813] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 6.0.0-rc4-
> > next-20220906+ #674 2c55fa642ba20b0dbb66c0e78dacc9ca96d5e733
> > [ 0.954099] Hardware name: TQ-Systems i.MX8MPlus TQMa8MPxL on MBa8MPxL
> > (DT) [ 0.961100] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS
> > BTYPE=--) [ 0.968099] pc : kobject_set_name_vargs+0x10/0xd0
> > [ 0.972823] lr : dev_set_name+0x58/0x80
> > [ 0.976674] sp : ffff800009c7b860
> > [ 0.979997] x29: ffff800009c7b860 x28: ffff000002d728f8 x27:
> > 0000000000000150
> > [ 0.987172] x26: 0000000000000009 x25: 0000000000000007 x24:
> > ffff800009ab8958
> > [ 0.994347] x23: ffff0000000a0000 x22: ffff800008eb77d8 x21:
> > ffff000000225410
> > [ 1.001524] x20: ffff800008eb7808 x19: 0000000000000000 x18:
> > 0000000000000000
> > [ 1.008697] x17: 702d78742d696d64 x16: 682d6b6c62696d64 x15:
> > 68203a656d616e3e
> > [ 1.015872] x14: 0000000000000000 x13: 70636468203a656d x12:
> > 616e5f6370673e2d
> > [ 1.023047] x11: 61746164203a6c72 x10: 74632d6b6c622e30 x9 :
> > 7274632d6b6c622e
> > [ 1.030222] x8 : 3030303063663233 x7 : 205d353039393738 x6 :
> > ffff800009a240e0
> > [ 1.037397] x5 : 00000000ffffffd0 x4 : ffff800009c7b920 x3 :
> > 00000000ffffffd0
> > [ 1.044572] x2 : ffff800009c7b8d0 x1 : ffff80000936ca78 x0 :
> > 0000000000000000
> > [ 1.051749] Call trace:
> > [ 1.054199] kobject_set_name_vargs+0x10/0xd0
> > [ 1.058574] dev_set_name+0x58/0x80
> > [ 1.062072] imx8mp_blk_ctrl_probe+0x5c0/0x660
> > [ 1.066534] platform_probe+0x64/0x100
> > [ 1.070297] call_driver_probe+0x28/0x140
> > [ 1.074322] really_probe+0xc0/0x334
> > [ 1.077909] __driver_probe_device+0x84/0x144
> > [ 1.082284] driver_probe_device+0x38/0x130
> > [ 1.086486] __driver_attach+0xac/0x244
> > [ 1.090334] bus_for_each_dev+0x6c/0xc0
> > [ 1.094184] driver_attach+0x20/0x30
> > [ 1.097772] bus_add_driver+0x174/0x244
> > [ 1.101622] driver_register+0x74/0x120
> > [ 1.105474] __platform_driver_register+0x24/0x30
> > [ 1.110197] imx8mp_blk_ctrl_driver_init+0x18/0x20
> > [ 1.115009] do_one_initcall+0x58/0x200
> > [ 1.118861] do_initcalls+0x164/0x19c
> > [ 1.122534] kernel_init_freeable+0x134/0x17c
> > [ 1.126909] kernel_init+0x2c/0x150
> > [ 1.130411] ret_from_fork+0x10/0x20
> > [ 1.134003] Code: a9bb7bfd 910003fd a90153f3 aa0003f3 (f9400000)
> > [ 1.140127] ---[ end trace 0000000000000000 ]---
> >
> > Adding some debug out shows:
> > [ 0.866795] imx8mp-blk-ctrl 32fc0000.blk-ctrl: domain->power_dev: 0x0
> > [ 0.873257] imx8mp-blk-ctrl 32fc0000.blk-ctrl: data->name: hdmiblk-hdcp
> > [ 0.879905] imx8mp-blk-ctrl 32fc0000.blk-ctrl: data->gpc_name: hdcp
> >
> > AFAICS the power domains 'hrv' and 'hdcp' are missing in the
> > 'hdmi_blk_ctrl: blk-ctrl@32fc0000' node thus resulting in a NULL pointer
> > from calling dev_pm_domain_attach_by_name().
>
> The HDMI blk ctrl dts not landed in Shawn's branch, could you share me
> your dts change?
I don't have any dts changes for this matter. To get a bootable device, for
now, I just removed the IMX8MP_HDMIBLK_PD_HRV and IMX8MP_HDMIBLK_PD_HDCP power
domains from imx8mp_hdmi_domain_data.
> And dev_set_name, as I recall, Lucas has a patch to remove that.
Is this removal a fix or just a workaround?
Best regards,
Alexander
> Subject: Re: Re: [PATCH V5 5/8] soc: imx: add i.MX8MP HDMI blk ctrl
> HDCP/HRV_MWR
>
> Hello,
>
> Am Mittwoch, 7. September 2022, 04:41:46 CEST schrieb Peng Fan:
> > On 9/6/2022 10:37 PM, Alexander Stein wrote:
> > > Hello,
> > >
> > > Am Montag, 22. August 2022, 08:45:33 CEST schrieb Peng Fan (OSS):
> > >> From: Peng Fan <[email protected]>
> > >>
> > >> i.MX8MP HDMI supports HDCP and HRV_MWR(HDMI RX Video
> Memory Write
> > >> Master for RXRX validation), so add them.
> > >>
> > >> Signed-off-by: Peng Fan <[email protected]>
> > >> ---
> > >>
> > >> drivers/soc/imx/imx8mp-blk-ctrl.c | 30
> ++++++++++++++++++++++++++++++
> > >> 1 file changed, 30 insertions(+)
> > >>
> > >> diff --git a/drivers/soc/imx/imx8mp-blk-ctrl.c
> > >> b/drivers/soc/imx/imx8mp-blk-ctrl.c index
> > >> 6f983adcb47c..527d45d12a54
> > >> 100644
> > >> --- a/drivers/soc/imx/imx8mp-blk-ctrl.c
> > >> +++ b/drivers/soc/imx/imx8mp-blk-ctrl.c
> > >> @@ -235,6 +235,13 @@ static void
> > >> imx8mp_hdmi_blk_ctrl_power_on(struct
> > >> imx8mp_blk_ctrl *bc, regmap_set_bits(bc->regmap,
> > >> HDMI_RTX_RESET_CTL0, BIT(12));
> > >>
> > >> regmap_clear_bits(bc->regmap, HDMI_TX_CONTROL0,
> BIT(3));
> > >> break;
> > >>
> > >> + case IMX8MP_HDMIBLK_PD_HDCP:
> > >> + regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0,
> BIT(11));
> > >> + break;
> > >> + case IMX8MP_HDMIBLK_PD_HRV:
> > >> + regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(3)
> |
> > >
> > > BIT(4) | BIT(5));
> > >
> > >> + regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0,
> > >
> > > BIT(15));
> > >
> > >> + break;
> > >>
> > >> default:
> > >> break;
> > >>
> > >> }
> > >>
> > >> @@ -283,6 +290,13 @@ static void
> > >> imx8mp_hdmi_blk_ctrl_power_off(struct
> > >> imx8mp_blk_ctrl *bc, regmap_clear_bits(bc->regmap,
> > >> HDMI_RTX_RESET_CTL0, BIT(12));
> > >>
> > >> regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1,
> BIT(22)
> > > |
> > > | BIT(24));
> > > |
> > >> break;
> > >>
> > >> + case IMX8MP_HDMIBLK_PD_HDCP:
> > >> + regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0,
> > >
> > > BIT(11));
> > >
> > >> + break;
> > >> + case IMX8MP_HDMIBLK_PD_HRV:
> > >> + regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0,
> > >
> > > BIT(15));
> > >
> > >> + regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(3)
> > >>
> > > | BIT(4) |
> > >>
> > >> BIT(5)); + break;
> > >>
> > >> default:
> > >> break;
> > >>
> > >> }
> > >>
> > >> @@ -365,6 +379,22 @@ static const struct
> > >> imx8mp_blk_ctrl_domain_data imx8mp_hdmi_domain_data[] =
> { .num_clks
> > >> = 2,
> > >>
> > >> .gpc_name = "hdmi-tx-phy",
> > >>
> > >> },
> > >>
> > >> + [IMX8MP_HDMIBLK_PD_HRV] = {
> > >> + .name = "hdmiblk-hrv",
> > >> + .clk_names = (const char *[]){ "axi", "apb" },
> > >> + .num_clks = 2,
> > >> + .gpc_name = "hrv",
> > >> + .path_names = (const char *[]){"hrv"},
> > >> + .num_paths = 1,
> > >> + },
> > >> + [IMX8MP_HDMIBLK_PD_HDCP] = {
> > >> + .name = "hdmiblk-hdcp",
> > >> + .clk_names = (const char *[]){ "axi", "apb" },
> > >> + .num_clks = 2,
> > >> + .gpc_name = "hdcp",
> > >> + .path_names = (const char *[]){"hdcp"},
> > >> + .num_paths = 1,
> > >> + },
> > >>
> > >> };
> > >>
> > >> static const struct imx8mp_blk_ctrl_data
> imx8mp_hdmi_blk_ctl_dev_data =
> > >> {
> > >
> > > Something is missing here. Iget the following error during boot:
> > > [ 0.886211] Unable to handle kernel NULL pointer dereference at
> virtual
> > > address 0000000000000000
> > > [ 0.895043] Mem abort info:
> > > [ 0.897841] ESR = 0x0000000096000004
> > > [ 0.901606] EC = 0x25: DABT (current EL), IL = 32 bits
> > > [ 0.906942] SET = 0, FnV = 0
> > > [ 0.910003] EA = 0, S1PTW = 0
> > > [ 0.913159] FSC = 0x04: level 0 translation fault
> > > [ 0.918054] Data abort info:
> > > [ 0.920943] ISV = 0, ISS = 0x00000004
> > > [ 0.924791] CM = 0, WnR = 0
> > > [ 0.927761] [0000000000000000] user address but active_mm is
> swapper
> > > [ 0.934157] Internal error: Oops: 96000004 [#1] PREEMPT SMP
> > > [ 0.939749] Modules linked in:
> > > [ 0.942813] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 6.0.0-rc4-
> > > next-20220906+ #674 2c55fa642ba20b0dbb66c0e78dacc9ca96d5e733
> > > [ 0.954099] Hardware name: TQ-Systems i.MX8MPlus TQMa8MPxL on
> MBa8MPxL
> > > (DT) [ 0.961100] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -
> SSBS
> > > BTYPE=--) [ 0.968099] pc : kobject_set_name_vargs+0x10/0xd0
> > > [ 0.972823] lr : dev_set_name+0x58/0x80
> > > [ 0.976674] sp : ffff800009c7b860
> > > [ 0.979997] x29: ffff800009c7b860 x28: ffff000002d728f8 x27:
> > > 0000000000000150
> > > [ 0.987172] x26: 0000000000000009 x25: 0000000000000007 x24:
> > > ffff800009ab8958
> > > [ 0.994347] x23: ffff0000000a0000 x22: ffff800008eb77d8 x21:
> > > ffff000000225410
> > > [ 1.001524] x20: ffff800008eb7808 x19: 0000000000000000 x18:
> > > 0000000000000000
> > > [ 1.008697] x17: 702d78742d696d64 x16: 682d6b6c62696d64 x15:
> > > 68203a656d616e3e
> > > [ 1.015872] x14: 0000000000000000 x13: 70636468203a656d x12:
> > > 616e5f6370673e2d
> > > [ 1.023047] x11: 61746164203a6c72 x10: 74632d6b6c622e30 x9 :
> > > 7274632d6b6c622e
> > > [ 1.030222] x8 : 3030303063663233 x7 : 205d353039393738 x6 :
> > > ffff800009a240e0
> > > [ 1.037397] x5 : 00000000ffffffd0 x4 : ffff800009c7b920 x3 :
> > > 00000000ffffffd0
> > > [ 1.044572] x2 : ffff800009c7b8d0 x1 : ffff80000936ca78 x0 :
> > > 0000000000000000
> > > [ 1.051749] Call trace:
> > > [ 1.054199] kobject_set_name_vargs+0x10/0xd0
> > > [ 1.058574] dev_set_name+0x58/0x80
> > > [ 1.062072] imx8mp_blk_ctrl_probe+0x5c0/0x660
> > > [ 1.066534] platform_probe+0x64/0x100
> > > [ 1.070297] call_driver_probe+0x28/0x140
> > > [ 1.074322] really_probe+0xc0/0x334
> > > [ 1.077909] __driver_probe_device+0x84/0x144
> > > [ 1.082284] driver_probe_device+0x38/0x130
> > > [ 1.086486] __driver_attach+0xac/0x244
> > > [ 1.090334] bus_for_each_dev+0x6c/0xc0
> > > [ 1.094184] driver_attach+0x20/0x30
> > > [ 1.097772] bus_add_driver+0x174/0x244
> > > [ 1.101622] driver_register+0x74/0x120
> > > [ 1.105474] __platform_driver_register+0x24/0x30
> > > [ 1.110197] imx8mp_blk_ctrl_driver_init+0x18/0x20
> > > [ 1.115009] do_one_initcall+0x58/0x200
> > > [ 1.118861] do_initcalls+0x164/0x19c
> > > [ 1.122534] kernel_init_freeable+0x134/0x17c
> > > [ 1.126909] kernel_init+0x2c/0x150
> > > [ 1.130411] ret_from_fork+0x10/0x20
> > > [ 1.134003] Code: a9bb7bfd 910003fd a90153f3 aa0003f3 (f9400000)
> > > [ 1.140127] ---[ end trace 0000000000000000 ]---
> > >
> > > Adding some debug out shows:
> > > [ 0.866795] imx8mp-blk-ctrl 32fc0000.blk-ctrl: domain->power_dev:
> 0x0
> > > [ 0.873257] imx8mp-blk-ctrl 32fc0000.blk-ctrl: data->name: hdmiblk-
> hdcp
> > > [ 0.879905] imx8mp-blk-ctrl 32fc0000.blk-ctrl: data->gpc_name: hdcp
> > >
> > > AFAICS the power domains 'hrv' and 'hdcp' are missing in the
> > > 'hdmi_blk_ctrl: blk-ctrl@32fc0000' node thus resulting in a NULL
> > > pointer from calling dev_pm_domain_attach_by_name().
> >
> > The HDMI blk ctrl dts not landed in Shawn's branch, could you share me
> > your dts change?
>
> I don't have any dts changes for this matter. To get a bootable device, for
> now, I just removed the IMX8MP_HDMIBLK_PD_HRV and
> IMX8MP_HDMIBLK_PD_HDCP power domains from
> imx8mp_hdmi_domain_data.
Ah. There is no hdmi-blk-ctrl node in linux/next tree. Anyway, let me
have a check.
Thanks,
Peng.
>
> > And dev_set_name, as I recall, Lucas has a patch to remove that.
>
> Is this removal a fix or just a workaround?
Fix:
https://lore.kernel.org/all/[email protected]/
>
> Best regards,
> Alexander
>
>
Hi,
Am Mittwoch, 7. September 2022, 13:53:26 CEST schrieb Peng Fan:
> > Subject: Re: Re: [PATCH V5 5/8] soc: imx: add i.MX8MP HDMI blk ctrl
> > HDCP/HRV_MWR
> >
> > Hello,
> >
> > Am Mittwoch, 7. September 2022, 04:41:46 CEST schrieb Peng Fan:
> > > On 9/6/2022 10:37 PM, Alexander Stein wrote:
> > > > Hello,
> > > >
> > > > Am Montag, 22. August 2022, 08:45:33 CEST schrieb Peng Fan (OSS):
> > > >> From: Peng Fan <[email protected]>
> > > >>
> > > >> i.MX8MP HDMI supports HDCP and HRV_MWR(HDMI RX Video
> >
> > Memory Write
> >
> > > >> Master for RXRX validation), so add them.
> > > >>
> > > >> Signed-off-by: Peng Fan <[email protected]>
> > > >> ---
> > > >>
> > > >> drivers/soc/imx/imx8mp-blk-ctrl.c | 30
> >
> > ++++++++++++++++++++++++++++++
> >
> > > >> 1 file changed, 30 insertions(+)
> > > >>
> > > >> diff --git a/drivers/soc/imx/imx8mp-blk-ctrl.c
> > > >> b/drivers/soc/imx/imx8mp-blk-ctrl.c index
> > > >> 6f983adcb47c..527d45d12a54
> > > >> 100644
> > > >> --- a/drivers/soc/imx/imx8mp-blk-ctrl.c
> > > >> +++ b/drivers/soc/imx/imx8mp-blk-ctrl.c
> > > >> @@ -235,6 +235,13 @@ static void
> > > >> imx8mp_hdmi_blk_ctrl_power_on(struct
> > > >> imx8mp_blk_ctrl *bc, regmap_set_bits(bc->regmap,
> > > >> HDMI_RTX_RESET_CTL0, BIT(12));
> > > >>
> > > >> regmap_clear_bits(bc->regmap,
HDMI_TX_CONTROL0,
> >
> > BIT(3));
> >
> > > >> break;
> > > >>
> > > >> + case IMX8MP_HDMIBLK_PD_HDCP:
> > > >> + regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0,
> >
> > BIT(11));
> >
> > > >> + break;
> > > >> + case IMX8MP_HDMIBLK_PD_HRV:
> > > >> + regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(3)
> > > >
> > > > BIT(4) | BIT(5));
> > > >
> > > >> + regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0,
> > > >
> > > > BIT(15));
> > > >
> > > >> + break;
> > > >>
> > > >> default:
> > > >> break;
> > > >>
> > > >> }
> > > >>
> > > >> @@ -283,6 +290,13 @@ static void
> > > >> imx8mp_hdmi_blk_ctrl_power_off(struct
> > > >> imx8mp_blk_ctrl *bc, regmap_clear_bits(bc->regmap,
> > > >> HDMI_RTX_RESET_CTL0, BIT(12));
> > > >>
> > > >> regmap_clear_bits(bc->regmap,
HDMI_RTX_CLK_CTL1,
> >
> > BIT(22)
> >
> > > > | BIT(24));
> > > > |
> > > >> break;
> > > >>
> > > >> + case IMX8MP_HDMIBLK_PD_HDCP:
> > > >> + regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0,
> > > >
> > > > BIT(11));
> > > >
> > > >> + break;
> > > >> + case IMX8MP_HDMIBLK_PD_HRV:
> > > >> + regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0,
> > > >
> > > > BIT(15));
> > > >
> > > >> + regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(3)
> > > >>
> > > > | BIT(4) |
> > > >>
> > > >> BIT(5)); + break;
> > > >>
> > > >> default:
> > > >> break;
> > > >>
> > > >> }
> > > >>
> > > >> @@ -365,6 +379,22 @@ static const struct
> > > >> imx8mp_blk_ctrl_domain_data imx8mp_hdmi_domain_data[] =
> >
> > { .num_clks
> >
> > > >> = 2,
> > > >>
> > > >> .gpc_name = "hdmi-tx-phy",
> > > >>
> > > >> },
> > > >>
> > > >> + [IMX8MP_HDMIBLK_PD_HRV] = {
> > > >> + .name = "hdmiblk-hrv",
> > > >> + .clk_names = (const char *[]){ "axi", "apb" },
> > > >> + .num_clks = 2,
> > > >> + .gpc_name = "hrv",
> > > >> + .path_names = (const char *[]){"hrv"},
> > > >> + .num_paths = 1,
> > > >> + },
> > > >> + [IMX8MP_HDMIBLK_PD_HDCP] = {
> > > >> + .name = "hdmiblk-hdcp",
> > > >> + .clk_names = (const char *[]){ "axi", "apb" },
> > > >> + .num_clks = 2,
> > > >> + .gpc_name = "hdcp",
> > > >> + .path_names = (const char *[]){"hdcp"},
> > > >> + .num_paths = 1,
> > > >> + },
> > > >>
> > > >> };
> > > >>
> > > >> static const struct imx8mp_blk_ctrl_data
> >
> > imx8mp_hdmi_blk_ctl_dev_data =
> >
> > > >> {
> > > >
> > > > Something is missing here. Iget the following error during boot:
> > > > [ 0.886211] Unable to handle kernel NULL pointer dereference at
> >
> > virtual
> >
> > > > address 0000000000000000
> > > > [ 0.895043] Mem abort info:
> > > > [ 0.897841] ESR = 0x0000000096000004
> > > > [ 0.901606] EC = 0x25: DABT (current EL), IL = 32 bits
> > > > [ 0.906942] SET = 0, FnV = 0
> > > > [ 0.910003] EA = 0, S1PTW = 0
> > > > [ 0.913159] FSC = 0x04: level 0 translation fault
> > > > [ 0.918054] Data abort info:
> > > > [ 0.920943] ISV = 0, ISS = 0x00000004
> > > > [ 0.924791] CM = 0, WnR = 0
> > > > [ 0.927761] [0000000000000000] user address but active_mm is
> >
> > swapper
> >
> > > > [ 0.934157] Internal error: Oops: 96000004 [#1] PREEMPT SMP
> > > > [ 0.939749] Modules linked in:
> > > > [ 0.942813] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 6.0.0-rc4-
> > > > next-20220906+ #674 2c55fa642ba20b0dbb66c0e78dacc9ca96d5e733
> > > > [ 0.954099] Hardware name: TQ-Systems i.MX8MPlus TQMa8MPxL on
> >
> > MBa8MPxL
> >
> > > > (DT) [ 0.961100] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -
> >
> > SSBS
> >
> > > > BTYPE=--) [ 0.968099] pc : kobject_set_name_vargs+0x10/0xd0
> > > > [ 0.972823] lr : dev_set_name+0x58/0x80
> > > > [ 0.976674] sp : ffff800009c7b860
> > > > [ 0.979997] x29: ffff800009c7b860 x28: ffff000002d728f8 x27:
> > > > 0000000000000150
> > > > [ 0.987172] x26: 0000000000000009 x25: 0000000000000007 x24:
> > > > ffff800009ab8958
> > > > [ 0.994347] x23: ffff0000000a0000 x22: ffff800008eb77d8 x21:
> > > > ffff000000225410
> > > > [ 1.001524] x20: ffff800008eb7808 x19: 0000000000000000 x18:
> > > > 0000000000000000
> > > > [ 1.008697] x17: 702d78742d696d64 x16: 682d6b6c62696d64 x15:
> > > > 68203a656d616e3e
> > > > [ 1.015872] x14: 0000000000000000 x13: 70636468203a656d x12:
> > > > 616e5f6370673e2d
> > > > [ 1.023047] x11: 61746164203a6c72 x10: 74632d6b6c622e30 x9 :
> > > > 7274632d6b6c622e
> > > > [ 1.030222] x8 : 3030303063663233 x7 : 205d353039393738 x6 :
> > > > ffff800009a240e0
> > > > [ 1.037397] x5 : 00000000ffffffd0 x4 : ffff800009c7b920 x3 :
> > > > 00000000ffffffd0
> > > > [ 1.044572] x2 : ffff800009c7b8d0 x1 : ffff80000936ca78 x0 :
> > > > 0000000000000000
> > > > [ 1.051749] Call trace:
> > > > [ 1.054199] kobject_set_name_vargs+0x10/0xd0
> > > > [ 1.058574] dev_set_name+0x58/0x80
> > > > [ 1.062072] imx8mp_blk_ctrl_probe+0x5c0/0x660
> > > > [ 1.066534] platform_probe+0x64/0x100
> > > > [ 1.070297] call_driver_probe+0x28/0x140
> > > > [ 1.074322] really_probe+0xc0/0x334
> > > > [ 1.077909] __driver_probe_device+0x84/0x144
> > > > [ 1.082284] driver_probe_device+0x38/0x130
> > > > [ 1.086486] __driver_attach+0xac/0x244
> > > > [ 1.090334] bus_for_each_dev+0x6c/0xc0
> > > > [ 1.094184] driver_attach+0x20/0x30
> > > > [ 1.097772] bus_add_driver+0x174/0x244
> > > > [ 1.101622] driver_register+0x74/0x120
> > > > [ 1.105474] __platform_driver_register+0x24/0x30
> > > > [ 1.110197] imx8mp_blk_ctrl_driver_init+0x18/0x20
> > > > [ 1.115009] do_one_initcall+0x58/0x200
> > > > [ 1.118861] do_initcalls+0x164/0x19c
> > > > [ 1.122534] kernel_init_freeable+0x134/0x17c
> > > > [ 1.126909] kernel_init+0x2c/0x150
> > > > [ 1.130411] ret_from_fork+0x10/0x20
> > > > [ 1.134003] Code: a9bb7bfd 910003fd a90153f3 aa0003f3 (f9400000)
> > > > [ 1.140127] ---[ end trace 0000000000000000 ]---
> > > >
> > > > Adding some debug out shows:
> >
> > > > [ 0.866795] imx8mp-blk-ctrl 32fc0000.blk-ctrl: domain->power_dev:
> > 0x0
> >
> > > > [ 0.873257] imx8mp-blk-ctrl 32fc0000.blk-ctrl: data->name: hdmiblk-
> >
> > hdcp
> >
> > > > [ 0.879905] imx8mp-blk-ctrl 32fc0000.blk-ctrl: data->gpc_name: hdcp
> > > >
> > > > AFAICS the power domains 'hrv' and 'hdcp' are missing in the
> > > > 'hdmi_blk_ctrl: blk-ctrl@32fc0000' node thus resulting in a NULL
> > > > pointer from calling dev_pm_domain_attach_by_name().
> > >
> > > The HDMI blk ctrl dts not landed in Shawn's branch, could you share me
> > > your dts change?
> >
> > I don't have any dts changes for this matter. To get a bootable device,
> > for
> > now, I just removed the IMX8MP_HDMIBLK_PD_HRV and
> > IMX8MP_HDMIBLK_PD_HDCP power domains from
> > imx8mp_hdmi_domain_data.
>
> Ah. There is no hdmi-blk-ctrl node in linux/next tree. Anyway, let me
> have a check.
This is rather important. Without DT nodes, suspend panics with a NULL pointer
dereference.
[ 57.345915] Unable to handle kernel NULL pointer dereference at virtual
address 0000000000000300
[ 57.354823] Mem abort info:
[ 57.357633] ESR = 0x0000000096000004
[ 57.361441] EC = 0x25: DABT (current EL), IL = 32 bits
[ 57.366808] SET = 0, FnV = 0
[ 57.369877] EA = 0, S1PTW = 0
[ 57.373066] FSC = 0x04: level 0 translation fault
[ 57.377997] Data abort info:
[ 57.380922] ISV = 0, ISS = 0x00000004
[ 57.384811] CM = 0, WnR = 0
[ 57.387827] user pgtable: 4k pages, 48-bit VAs, pgdp=0000000046d55000
[ 57.394347] [0000000000000300] pgd=0000000000000000, p4d=0000000000000000
[ 57.401394] Internal error: Oops: 96000004 [#1] PREEMPT SMP
[ 57.406972] Modules linked in: cfg80211 8021q garp stp mrp llc mcp320x
crct10dif_ce governor_userspace imx_bus snd_soc_tlv320aic32
x4_spi imx_sdma snd_soc_tlv320aic32x4_i2c snd_soc_tlv320aic32x4 flexcan
can_dev clk_renesas_pcie imx8mm_thermal fuse ipv6
[ 57.429303] CPU: 2 PID: 422 Comm: sh Not tainted 6.0.0-rc4-next-20220907+
#696 f995e5a57a48e9e1bd6cb136b557c332a85db611
[ 57.440089] Hardware name: TQ-Systems i.MX8MPlus TQMa8MPxL on MBa8MPxL (DT)
[ 57.447051] pstate: 20000005 (nzCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[ 57.454017] pc : __pm_runtime_resume+0x1c/0xa0
[ 57.458470] lr : imx8mp_blk_ctrl_suspend+0x60/0x190
[ 57.463354] sp : ffff80000bf13810
[ 57.466669] x29: ffff80000bf13810 x28: ffff00000036e010 x27:
ffff800008972d54
[ 57.473814] x26: ffff80000a1196f8 x25: 0000000000000000 x24:
ffff80000ab9e000
[ 57.480958] x23: ffff000003fcc080 x22: 00000000000007e8 x21:
ffff000003fa37d8
[ 57.488104] x20: 0000000000000004 x19: 0000000000000000 x18:
0000000000000000
[ 57.495249] x17: 000000008d822290 x16: 00000000fca00fb3 x15:
000000007a08336e
[ 57.502395] x14: 0000000000000000 x13: 6e776f4420736920 x12:
6b6e694c203a3068
[ 57.509540] x11: 0000000000000002 x10: 0000000000000028 x9 :
0000000000000001
[ 57.516683] x8 : ffff000004486ae0 x7 : ffff80000bf137f0 x6 :
ffff80000bf13800
[ 57.523829] x5 : ffff80000bf14000 x4 : 0000000000000005 x3 :
00000000000000d6
[ 57.530974] x2 : 0000000000000001 x1 : 0000000000000004 x0 :
0000000000000000
[ 57.538119] Call trace:
[ 57.540566] __pm_runtime_resume+0x1c/0xa0
[ 57.544665] imx8mp_blk_ctrl_suspend+0x60/0x190
[ 57.549200] platform_pm_suspend+0x28/0x64
[ 57.553306] dpm_run_callback+0x70/0x140
[ 57.557231] __device_suspend+0x11c/0x3e4
[ 57.561244] dpm_suspend+0x15c/0x270
[ 57.564826] dpm_suspend_start+0xa8/0xcc
[ 57.568753] suspend_devices_and_enter+0x138/0x250
[ 57.573547] enter_state+0xf0/0x3b0
[ 57.577038] pm_suspend+0x5c/0x130
[ 57.580442] state_store+0x2c/0x70
[ 57.583852] kobj_attr_store+0x14/0x2c
[ 57.587605] sysfs_kf_write+0x48/0x70
[ 57.591271] kernfs_fop_write_iter+0x118/0x1ac
[ 57.595717] new_sync_write+0x8c/0xf0
[ 57.599384] vfs_write+0x19c/0x1e4
[ 57.602793] ksys_write+0x68/0xf4
[ 57.606112] __arm64_sys_write+0x18/0x20
[ 57.610040] invoke_syscall+0x6c/0xf0
[ 57.613710] el0_svc_common.constprop.0+0xf0/0x110
[ 57.618505] do_el0_svc+0x24/0x30
[ 57.621825] el0_svc+0x38/0x90
[ 57.624883] el0t_64_sync_handler+0xb0/0xb4
[ 57.629070] el0t_64_sync+0x148/0x14c
[ 57.632740] Code: aa0003f3 2a0103f4 f90013f5 37000074 (79460000)
[ 57.638835] ---[ end trace 0000000000000000 ]---
So I currently have to disable these two power domains.
> > > And dev_set_name, as I recall, Lucas has a patch to remove that.
> >
> > Is this removal a fix or just a workaround?
>
> Fix:
> https://lore.kernel.org/all/[email protected]/
Ah, I saw this patch, but I was unsure whether I am affected by this. Thanks
for the link.
Best regards,
Alexander
On 9/7/2022 10:41 AM, Peng Fan wrote:
>
>
> On 9/6/2022 10:37 PM, Alexander Stein wrote:
>> Hello,
>>
>> Am Montag, 22. August 2022, 08:45:33 CEST schrieb Peng Fan (OSS):
>>> From: Peng Fan <[email protected]>
>>>
>>> i.MX8MP HDMI supports HDCP and HRV_MWR(HDMI RX Video Memory Write Master
>>> for RXRX validation), so add them.
>>>
>>> Signed-off-by: Peng Fan <[email protected]>
>>> ---
>>> drivers/soc/imx/imx8mp-blk-ctrl.c | 30 ++++++++++++++++++++++++++++++
>>> 1 file changed, 30 insertions(+)
>>>
>>> diff --git a/drivers/soc/imx/imx8mp-blk-ctrl.c
>>> b/drivers/soc/imx/imx8mp-blk-ctrl.c index 6f983adcb47c..527d45d12a54
>>> 100644
>>> --- a/drivers/soc/imx/imx8mp-blk-ctrl.c
>>> +++ b/drivers/soc/imx/imx8mp-blk-ctrl.c
>>> @@ -235,6 +235,13 @@ static void imx8mp_hdmi_blk_ctrl_power_on(struct
>>> imx8mp_blk_ctrl *bc, regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0,
>>> BIT(12));
>>> regmap_clear_bits(bc->regmap, HDMI_TX_CONTROL0, BIT(3));
>>> break;
>>> + case IMX8MP_HDMIBLK_PD_HDCP:
>>> + regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(11));
>>> + break;
>>> + case IMX8MP_HDMIBLK_PD_HRV:
>>> + regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(3) |
>> BIT(4) | BIT(5));
>>> + regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0,
>> BIT(15));
>>> + break;
>>> default:
>>> break;
>>> }
>>> @@ -283,6 +290,13 @@ static void imx8mp_hdmi_blk_ctrl_power_off(struct
>>> imx8mp_blk_ctrl *bc, regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0,
>>> BIT(12));
>>> regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(22)
>> | BIT(24));
>>> break;
>>> + case IMX8MP_HDMIBLK_PD_HDCP:
>>> + regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0,
>> BIT(11));
>>> + break;
>>> + case IMX8MP_HDMIBLK_PD_HRV:
>>> + regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0,
>> BIT(15));
>>> + regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(3)
>> | BIT(4) |
>>> BIT(5)); + break;
>>> default:
>>> break;
>>> }
>>> @@ -365,6 +379,22 @@ static const struct imx8mp_blk_ctrl_domain_data
>>> imx8mp_hdmi_domain_data[] = { .num_clks = 2,
>>> .gpc_name = "hdmi-tx-phy",
>>> },
>>> + [IMX8MP_HDMIBLK_PD_HRV] = {
>>> + .name = "hdmiblk-hrv",
>>> + .clk_names = (const char *[]){ "axi", "apb" },
>>> + .num_clks = 2,
>>> + .gpc_name = "hrv",
>>> + .path_names = (const char *[]){"hrv"},
>>> + .num_paths = 1,
>>> + },
>>> + [IMX8MP_HDMIBLK_PD_HDCP] = {
>>> + .name = "hdmiblk-hdcp",
>>> + .clk_names = (const char *[]){ "axi", "apb" },
>>> + .num_clks = 2,
>>> + .gpc_name = "hdcp",
>>> + .path_names = (const char *[]){"hdcp"},
>>> + .num_paths = 1,
>>> + },
>>> };
>>>
>>> static const struct imx8mp_blk_ctrl_data
>>> imx8mp_hdmi_blk_ctl_dev_data = {
>>
>> Something is missing here. Iget the following error during boot:
>> [ 0.886211] Unable to handle kernel NULL pointer dereference at
>> virtual
>> address 0000000000000000
>> [ 0.895043] Mem abort info:
>> [ 0.897841] ESR = 0x0000000096000004
>> [ 0.901606] EC = 0x25: DABT (current EL), IL = 32 bits
>> [ 0.906942] SET = 0, FnV = 0
>> [ 0.910003] EA = 0, S1PTW = 0
>> [ 0.913159] FSC = 0x04: level 0 translation fault
>> [ 0.918054] Data abort info:
>> [ 0.920943] ISV = 0, ISS = 0x00000004
>> [ 0.924791] CM = 0, WnR = 0
>> [ 0.927761] [0000000000000000] user address but active_mm is swapper
>> [ 0.934157] Internal error: Oops: 96000004 [#1] PREEMPT SMP
>> [ 0.939749] Modules linked in:
>> [ 0.942813] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 6.0.0-rc4-
>> next-20220906+ #674 2c55fa642ba20b0dbb66c0e78dacc9ca96d5e733
>> [ 0.954099] Hardware name: TQ-Systems i.MX8MPlus TQMa8MPxL on
>> MBa8MPxL (DT)
>> [ 0.961100] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS
>> BTYPE=--)
>> [ 0.968099] pc : kobject_set_name_vargs+0x10/0xd0
>> [ 0.972823] lr : dev_set_name+0x58/0x80
>> [ 0.976674] sp : ffff800009c7b860
>> [ 0.979997] x29: ffff800009c7b860 x28: ffff000002d728f8 x27:
>> 0000000000000150
>> [ 0.987172] x26: 0000000000000009 x25: 0000000000000007 x24:
>> ffff800009ab8958
>> [ 0.994347] x23: ffff0000000a0000 x22: ffff800008eb77d8 x21:
>> ffff000000225410
>> [ 1.001524] x20: ffff800008eb7808 x19: 0000000000000000 x18:
>> 0000000000000000
>> [ 1.008697] x17: 702d78742d696d64 x16: 682d6b6c62696d64 x15:
>> 68203a656d616e3e
>> [ 1.015872] x14: 0000000000000000 x13: 70636468203a656d x12:
>> 616e5f6370673e2d
>> [ 1.023047] x11: 61746164203a6c72 x10: 74632d6b6c622e30 x9 :
>> 7274632d6b6c622e
>> [ 1.030222] x8 : 3030303063663233 x7 : 205d353039393738 x6 :
>> ffff800009a240e0
>> [ 1.037397] x5 : 00000000ffffffd0 x4 : ffff800009c7b920 x3 :
>> 00000000ffffffd0
>> [ 1.044572] x2 : ffff800009c7b8d0 x1 : ffff80000936ca78 x0 :
>> 0000000000000000
>> [ 1.051749] Call trace:
>> [ 1.054199] kobject_set_name_vargs+0x10/0xd0
>> [ 1.058574] dev_set_name+0x58/0x80
>> [ 1.062072] imx8mp_blk_ctrl_probe+0x5c0/0x660
>> [ 1.066534] platform_probe+0x64/0x100
>> [ 1.070297] call_driver_probe+0x28/0x140
>> [ 1.074322] really_probe+0xc0/0x334
>> [ 1.077909] __driver_probe_device+0x84/0x144
>> [ 1.082284] driver_probe_device+0x38/0x130
>> [ 1.086486] __driver_attach+0xac/0x244
>> [ 1.090334] bus_for_each_dev+0x6c/0xc0
>> [ 1.094184] driver_attach+0x20/0x30
>> [ 1.097772] bus_add_driver+0x174/0x244
>> [ 1.101622] driver_register+0x74/0x120
>> [ 1.105474] __platform_driver_register+0x24/0x30
>> [ 1.110197] imx8mp_blk_ctrl_driver_init+0x18/0x20
>> [ 1.115009] do_one_initcall+0x58/0x200
>> [ 1.118861] do_initcalls+0x164/0x19c
>> [ 1.122534] kernel_init_freeable+0x134/0x17c
>> [ 1.126909] kernel_init+0x2c/0x150
>> [ 1.130411] ret_from_fork+0x10/0x20
>> [ 1.134003] Code: a9bb7bfd 910003fd a90153f3 aa0003f3 (f9400000)
>> [ 1.140127] ---[ end trace 0000000000000000 ]---
>>
>> Adding some debug out shows:
>> [ 0.866795] imx8mp-blk-ctrl 32fc0000.blk-ctrl: domain->power_dev: 0x0
>> [ 0.873257] imx8mp-blk-ctrl 32fc0000.blk-ctrl: data->name:
>> hdmiblk-hdcp
>> [ 0.879905] imx8mp-blk-ctrl 32fc0000.blk-ctrl: data->gpc_name: hdcp
>>
>> AFAICS the power domains 'hrv' and 'hdcp' are missing in the
>> 'hdmi_blk_ctrl:
>> blk-ctrl@32fc0000' node thus resulting in a NULL pointer from calling
>> dev_pm_domain_attach_by_name().
yes, you are correct.
Should add hrv/hdcp entry in hdmi_blk_ctrl node to Lucas's patch:
https://lore.kernel.org/all/[email protected]/
Regards,
Peng.
>
> The HDMI blk ctrl dts not landed in Shawn's branch, could you share me
> your dts change?
>
> And dev_set_name, as I recall, Lucas has a patch to remove that.
>
> Regards,
> Peng.
>
>>
>> Is there a patch I am missing.
>>
>> Best regards,
>> Alexander
>>
>>