diff -ur linux-2.4.0t10/arch/i386/boot/setup.S linux/arch/i386/boot/setup.S
--- linux-2.4.0t10/arch/i386/boot/setup.S Tue Oct 31 17:06:34 2000
+++ linux/arch/i386/boot/setup.S Thu Nov 2 21:04:01 2000
@@ -364,6 +364,55 @@
xorw %bx, %bx
int $0x16
+/* This is butt ugly, but it works. */
+#ifdef CONFIG_X86_CMOV
+# define REQD_CMOV 0x00008000
+#else
+# define REQD_CMOV 0
+#endif
+#ifdef CONFIG_X86_PAE
+# define REQD_PAE 0x00000040
+#else
+# define REQD_PAE 0
+#endif
+#define REQD_FLAGS REQD_CMOV|REQD_PAE
+
+#if REQD_FLAGS
+/*
+ * We must check this here while we can still get a message to the console
+ * because instructions for newer processors (ie. cmovcc) may be present
+ * in C code.
+ */
+ pushfl
+ popl %eax
+ xorl $0x200000, %eax # check ID flag
+ pushl %eax
+ popfl
+ pushfl
+ popl %edx
+ xorl %edx, %eax
+ testl $0x200000, %eax
+ jnz cpuid_fail
+ xorl %eax, %eax
+ cpuid
+ cmpl $1, %eax
+ jb cpuid_fail
+ movl $1, %eax
+ cpuid
+ andl $REQD_FLAGS, %edx
+ cmpl $REQD_FLAGS, %edx
+ je cpuid_pass
+cpuid_fail:
+ pushw %cs
+ popw %ds
+ lea cpuid_fail_msg, %si
+ call prtstr
+1: jmp 1b
+cpuid_fail_msg:
+ .string "Required CPU features are not present - compile kernel for the proper CPU type."
+cpuid_pass:
+#endif
+
# Check for video adapter and its parameters and allow the
# user to browse video modes.
call video # NOTE: we need %ds pointing
diff -ur linux-2.4.0t10/arch/i386/config.in linux/arch/i386/config.in
--- linux-2.4.0t10/arch/i386/config.in Tue Oct 31 17:06:34 2000
+++ linux/arch/i386/config.in Thu Nov 2 18:53:59 2000
@@ -82,6 +82,7 @@
define_bool CONFIG_X86_GOOD_APIC y
define_bool CONFIG_X86_PGE y
define_bool CONFIG_X86_USE_PPRO_CHECKSUM y
+ define_bool CONFIG_X86_CMOV y
fi
if [ "$CONFIG_M686FXSR" = "y" ]; then
define_int CONFIG_X86_L1_CACHE_SHIFT 5
@@ -91,6 +92,7 @@
define_bool CONFIG_X86_USE_PPRO_CHECKSUM y
define_bool CONFIG_X86_FXSR y
define_bool CONFIG_X86_XMM y
+ define_bool CONFIG_X86_CMOV y
fi
if [ "$CONFIG_MK6" = "y" ]; then
define_int CONFIG_X86_L1_CACHE_SHIFT 5
@@ -105,6 +107,7 @@
define_bool CONFIG_X86_USE_3DNOW y
define_bool CONFIG_X86_PGE y
define_bool CONFIG_X86_USE_PPRO_CHECKSUM y
+ define_bool CONFIG_X86_CMOV y
fi
if [ "$CONFIG_MCRUSOE" = "y" ]; then
define_int CONFIG_X86_L1_CACHE_SHIFT 5
> + lea cpuid_fail_msg, %si
> + call prtstr
> +1: jmp 1b
> +cpuid_fail_msg:
> + .string "Required CPU features are not present - compile kernel for the proper CPU type."
> +cpuid_pass:
Only one very minor suggestion
1: hlt
j 1b
Q: are any of the things you test present in processors only after we
do magic 'cpuid' enable invocations ?
Alan Cox wrote:
>
> > + lea cpuid_fail_msg, %si
> > + call prtstr
> > +1: jmp 1b
> > +cpuid_fail_msg:
> > + .string "Required CPU features are not present - compile kernel for the proper CPU type."
> > +cpuid_pass:
>
> Only one very minor suggestion
>
> 1: hlt
> j 1b
>
> Q: are any of the things you test present in processors only after we
> do magic 'cpuid' enable invocations ?
AFAIK, none of the braindead chips have cmov instructions or PAE support
(only PentiumPro+ and Athlon do). If someone can prove me wrong I'd
like to know.
--
Brian Gerst
Alan Cox wrote:
> Q: are any of the things you test present in processors only after we
> do magic 'cpuid' enable invocations ?
Hmm, after a bit more investigation, it appears that the Cyrix MII
processors support cmov instructions, even though we currently don't
compile for that processor with -march=i686. Please ignore this patch
until I can come up with something better.
--
Brian Gerst
> Alan Cox wrote:
> > Q: are any of the things you test present in processors only after we
> > do magic 'cpuid' enable invocations ?
>
> Hmm, after a bit more investigation, it appears that the Cyrix MII
> processors support cmov instructions, even though we currently don't
> compile for that processor with -march=i686. Please ignore this patch
> until I can come up with something better.
I believe the MII always has CPUID enabled. It was the older Cyrixes that did
not. DaveJ is the guru..
Alan Cox wrote:
>
> > Alan Cox wrote:
> > > Q: are any of the things you test present in processors only after we
> > > do magic 'cpuid' enable invocations ?
> >
> > Hmm, after a bit more investigation, it appears that the Cyrix MII
> > processors support cmov instructions, even though we currently don't
> > compile for that processor with -march=i686. Please ignore this patch
> > until I can come up with something better.
>
> I believe the MII always has CPUID enabled. It was the older Cyrixes that did
> not. DaveJ is the guru..
Well, according to comments in bugs.h, some broken BIOSes disable cpuid.
--
Brian Gerst
Alan Cox wrote..
> > Hmm, after a bit more investigation, it appears that the Cyrix MII
> > processors support cmov instructions, even though we currently don't
> > compile for that processor with -march=i686. Please ignore this patch
> > until I can come up with something better.
> I believe the MII always has CPUID enabled. It was the older Cyrixes
> that did not.
That was my understanding also.
d.
--
| Dave Jones <[email protected]> http://www.suse.de/~davej
| SuSE Labs
Brian Gerst wrote...
>> I believe the MII always has CPUID enabled. It was the older Cyrixes
>> that did not. DaveJ is the guru..
> Well, according to comments in bugs.h, some broken BIOSes disable cpuid.
That bug fix is for the earlier Cyrix 6x86 if I'm not mistaken.
The MII is a different monster.
d.
--
| Dave Jones <[email protected]> http://www.suse.de/~davej
| SuSE Labs
[email protected] wrote:
>
> Brian Gerst wrote...
> >> I believe the MII always has CPUID enabled. It was the older Cyrixes
> >> that did not. DaveJ is the guru..
> > Well, according to comments in bugs.h, some broken BIOSes disable cpuid.
>
> That bug fix is for the earlier Cyrix 6x86 if I'm not mistaken.
> The MII is a different monster.
According to the docs on VIA's site, the MII's cpuid can still be turned
off, but it is on by default at reset. I wouldn't trust the BIOS to not
screw it up.
--
Brian Gerst
On Fri, 3 Nov 2000, Brian Gerst wrote:
> > That bug fix is for the earlier Cyrix 6x86 if I'm not mistaken.
> > The MII is a different monster.
> According to the docs on VIA's site, the MII's cpuid can still be turned
> off, but it is on by default at reset. I wouldn't trust the BIOS to not
> screw it up.
Err, what? If it's on by default...
A old BIOS that doesn't know about it won't switch it off.
A BIOS that does know about it will leave it (or maybe offer an option to
disable it)
If neither of the above are true (Ie, a BIOS bug) and it's switched off
by the time Linux boots, I think we'd have heard about it by now, as MII
users would notice a lack of features.
regards,
Dave.
--
| Dave Jones <[email protected]> http://www.suse.de/~davej
| SuSE Labs