DPU5 and newer targets enable this unconditionally. Move it from the
SC7280 mask to the SC7180 one.
Fixes: 7e6ee55320f0 ("drm/msm/disp/dpu1: enable DATA_HCTL_EN for sc7280 target")
Reviewed-by: Dmitry Baryshkov <[email protected]>
Reviewed-by: Marijn Suijten <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
---
Depends on:
https://lore.kernel.org/linux-arm-msm/[email protected]/
---
Changes in v2:
- Use a more fitting fixes tag
- Add braces around 7280 macro definition (checkpatch)
- Link to v1: https://lore.kernel.org/r/[email protected]
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index 27420fc863d6..005f09fcf334 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -98,9 +98,12 @@
#define INTF_SDM845_MASK (0)
#define INTF_SC7180_MASK \
- (BIT(DPU_INTF_INPUT_CTRL) | BIT(DPU_INTF_TE) | BIT(DPU_INTF_STATUS_SUPPORTED))
+ (BIT(DPU_INTF_INPUT_CTRL) | \
+ BIT(DPU_INTF_TE) | \
+ BIT(DPU_INTF_STATUS_SUPPORTED) | \
+ BIT(DPU_DATA_HCTL_EN))
-#define INTF_SC7280_MASK INTF_SC7180_MASK | BIT(DPU_DATA_HCTL_EN) | BIT(DPU_INTF_DATA_COMPRESS)
+#define INTF_SC7280_MASK (INTF_SC7180_MASK | BIT(DPU_INTF_DATA_COMPRESS))
#define WB_SM8250_MASK (BIT(DPU_WB_LINE_MODE) | \
BIT(DPU_WB_UBWC) | \
---
base-commit: c47189dee0decd9ecc1e65ae376ad6d4b0b7f1f2
change-id: 20230508-topic-hctl_en-3abb999a6c99
Best regards,
--
Konrad Dybcio <[email protected]>
On 5/19/2023 11:49 AM, Konrad Dybcio wrote:
> DPU5 and newer targets enable this unconditionally. Move it from the
> SC7280 mask to the SC7180 one.
>
You mean DPU 5.0.0 right?
> Fixes: 7e6ee55320f0 ("drm/msm/disp/dpu1: enable DATA_HCTL_EN for sc7280 target")
> Reviewed-by: Dmitry Baryshkov <[email protected]>
> Reviewed-by: Marijn Suijten <[email protected]>
> Signed-off-by: Konrad Dybcio <[email protected]>
> ---
I have cross-checked all the chipsets affected by this and confirmed
DATA_HCTL is present and those 3 registers programmed with that feature
bit are valid, hence
Reviewed-by: Abhinav Kumar <[email protected]>
On 20.05.2023 00:00, Abhinav Kumar wrote:
>
>
> On 5/19/2023 11:49 AM, Konrad Dybcio wrote:
>> DPU5 and newer targets enable this unconditionally. Move it from the
>> SC7280 mask to the SC7180 one.
>>
>
> You mean DPU 5.0.0 right?
Yep!
>
>> Fixes: 7e6ee55320f0 ("drm/msm/disp/dpu1: enable DATA_HCTL_EN for sc7280 target")
>> Reviewed-by: Dmitry Baryshkov <[email protected]>
>> Reviewed-by: Marijn Suijten <[email protected]>
>> Signed-off-by: Konrad Dybcio <[email protected]>
>> ---
>
> I have cross-checked all the chipsets affected by this and confirmed DATA_HCTL is present and those 3 registers programmed with that feature bit are valid, hence
>
> Reviewed-by: Abhinav Kumar <[email protected]>
Thanks!
Konrad
>