LinuxLists.cc - [PATCH 1/3] i2c: xilinx: Fix i2c sparse warnings

On Mon, Sep 30, 2013 at 11:08:51AM +0200, Michal Simek wrote:
> From: Kedareswara rao Appana <[email protected]>
>
> In write operation, after filling address byte to tx fifo,
> set the direction of transfer to tx using control register.

You describe WHAT you do, yet you should describe WHY the change is
needed. For example, I can't tell if this is an urgent bugfix or not.
Please rephrase.

>
> Signed-off-by: Kedareswara rao Appana <[email protected]>
> Signed-off-by: Michal Simek <[email protected]>
> ---
> drivers/i2c/busses/i2c-xiic.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c
> index 5eb0a8b..44e6ae7 100644
> --- a/drivers/i2c/busses/i2c-xiic.c
> +++ b/drivers/i2c/busses/i2c-xiic.c
> @@ -536,6 +536,7 @@ static void xiic_start_recv(struct xiic_i2c *i2c)
> static void xiic_start_send(struct xiic_i2c *i2c)
> {
> struct i2c_msg *msg = i2c->tx_msg;
> + u32 cr;
>
> xiic_irq_clr(i2c, XIIC_INTR_TX_ERROR_MASK);
>
> @@ -556,6 +557,10 @@ static void xiic_start_send(struct xiic_i2c *i2c)
> xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, data);
> }
>
> + cr = xiic_getreg32(i2c, XIIC_CR_REG_OFFSET);
> + cr |= XIIC_CR_DIR_IS_TX_MASK;
> + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, cr);
> +
> xiic_fill_tx_fifo(i2c);
>
> /* Clear any pending Tx empty, Tx Error and then enable them. */
> --
> 1.8.2.3
>

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2013-09-30 10:23:57

by Wolfram Sang

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Subject: Re: [PATCH 1/3] i2c: xilinx: Fix i2c sparse warnings

On Mon, Sep 30, 2013 at 11:08:50AM +0200, Michal Simek wrote:
> From: Kedareswara rao Appana <[email protected]>
>
> code changes to fix sparse warnings

Would be nice to either have them listed here or at least shortly
described.

>
> Signed-off-by: Kedareswara rao Appana <[email protected]>
> Signed-off-by: Michal Simek <[email protected]>

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2013-09-30 13:24:43

by Michal Simek

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Subject: Re: [PATCH 1/3] i2c: xilinx: Fix i2c sparse warnings

On 09/30/2013 12:23 PM, Wolfram Sang wrote:
> On Mon, Sep 30, 2013 at 11:08:50AM +0200, Michal Simek wrote:
>> From: Kedareswara rao Appana <[email protected]>
>>
>> code changes to fix sparse warnings
>
> Would be nice to either have them listed here or at least shortly
> described.

I will send v2. I see that Kedar wrote sparse warning but they are
checkpatch warnings.
I will fix that.

Thanks,
Michal

--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: http://www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform

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2013-09-30 13:25:15

by Michal Simek

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Subject: Re: [PATCH 2/3] i2c: xilinx: Set tx direction in write operation

On 09/30/2013 12:22 PM, Wolfram Sang wrote:
> On Mon, Sep 30, 2013 at 11:08:51AM +0200, Michal Simek wrote:
>> From: Kedareswara rao Appana <[email protected]>
>>
>> In write operation, after filling address byte to tx fifo,
>> set the direction of transfer to tx using control register.
>
> You describe WHAT you do, yet you should describe WHY the change is
> needed. For example, I can't tell if this is an urgent bugfix or not.
> Please rephrase.
>

Will do.

Thanks,
Michal

--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: http://www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform

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