2020-02-07 21:00:48

by Adam Serbinski

[permalink] [raw]
Subject: [PATCH 0/8] ASoC: qdsp6: db820c: Add support for external and bluetooth audio

This patch set implements PCM audio support in qdsp6 and
PCM and MI2S in apq8096/db820c to enable use of bluetooth
audio codec and external MI2S port on db820c.

The db820c uses qca6174a for bluetooth, which by default
is configured to use what qualcomm refers to as "PCM"
format, which is a variation of TDM.

CC: Andy Gross <[email protected]>
CC: Mark Rutland <[email protected]>
CC: Liam Girdwood <[email protected]>
CC: Patrick Lai <[email protected]>
CC: Banajit Goswami <[email protected]>
CC: Jaroslav Kysela <[email protected]>
CC: Takashi Iwai <[email protected]>
CC: [email protected]
CC: [email protected]
CC: [email protected]
CC: [email protected]

Adam Serbinski (8):
ASoC: qdsp6: dt-bindings: Add q6afe pcm dt binding
ASoC: qdsp6: q6afe: add support to pcm ports
ASoC: qdsp6: q6afe-dai: add support to pcm port dais
ASoC: qdsp6: q6routing: add pcm port routing
ASoC: qcom: apq8096: add support for primary and quaternary I2S/PCM
ASoC: qcom/common: Use snd-soc-dummy-dai when codec is not specified
dts: msm8996/db820c: enable primary pcm and quaternary i2s
ASoC: qcom: apq8096: add kcontrols to set PCM rate

arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 113 +++++++++
arch/arm64/boot/dts/qcom/msm8996-pins.dtsi | 162 ++++++++++++
include/dt-bindings/sound/qcom,q6afe.h | 8 +
sound/soc/qcom/apq8096.c | 172 +++++++++++--
sound/soc/qcom/common.c | 22 +-
sound/soc/qcom/qdsp6/q6afe-dai.c | 198 ++++++++++++++-
sound/soc/qcom/qdsp6/q6afe.c | 246 +++++++++++++++++++
sound/soc/qcom/qdsp6/q6afe.h | 9 +-
sound/soc/qcom/qdsp6/q6routing.c | 44 ++++
9 files changed, 953 insertions(+), 21 deletions(-)

--
2.21.1


2020-02-07 21:00:50

by Adam Serbinski

[permalink] [raw]
Subject: [PATCH 2/8] ASoC: qdsp6: q6afe: add support to pcm ports

This patch adds support to pcm ports in AFE.

Signed-off-by: Adam Serbinski <[email protected]>
CC: Andy Gross <[email protected]>
CC: Mark Rutland <[email protected]>
CC: Liam Girdwood <[email protected]>
CC: Patrick Lai <[email protected]>
CC: Banajit Goswami <[email protected]>
CC: Jaroslav Kysela <[email protected]>
CC: Takashi Iwai <[email protected]>
CC: [email protected]
CC: [email protected]
CC: [email protected]
CC: [email protected]
---
sound/soc/qcom/qdsp6/q6afe.c | 246 +++++++++++++++++++++++++++++++++++
sound/soc/qcom/qdsp6/q6afe.h | 9 +-
2 files changed, 254 insertions(+), 1 deletion(-)

diff --git a/sound/soc/qcom/qdsp6/q6afe.c b/sound/soc/qcom/qdsp6/q6afe.c
index e0945f7a58c8..b53ad14a78fd 100644
--- a/sound/soc/qcom/qdsp6/q6afe.c
+++ b/sound/soc/qcom/qdsp6/q6afe.c
@@ -40,6 +40,7 @@

#define AFE_PARAM_ID_SLIMBUS_CONFIG 0x00010212
#define AFE_PARAM_ID_I2S_CONFIG 0x0001020D
+#define AFE_PARAM_ID_PCM_CONFIG 0x0001020E
#define AFE_PARAM_ID_TDM_CONFIG 0x0001029D
#define AFE_PARAM_ID_PORT_SLOT_MAPPING_CONFIG 0x00010297

@@ -117,6 +118,15 @@
#define AFE_PORT_ID_QUATERNARY_MI2S_RX 0x1006
#define AFE_PORT_ID_QUATERNARY_MI2S_TX 0x1007

+#define AFE_PORT_ID_PRIMARY_PCM_RX 0x100A
+#define AFE_PORT_ID_PRIMARY_PCM_TX 0x100B
+#define AFE_PORT_ID_SECONDARY_PCM_RX 0x100C
+#define AFE_PORT_ID_SECONDARY_PCM_TX 0x100D
+#define AFE_PORT_ID_TERTIARY_PCM_RX 0x1012
+#define AFE_PORT_ID_TERTIARY_PCM_TX 0x1013
+#define AFE_PORT_ID_QUATERNARY_PCM_RX 0x1014
+#define AFE_PORT_ID_QUATERNARY_PCM_TX 0x1015
+
/* Start of the range of port IDs for TDM devices. */
#define AFE_PORT_ID_TDM_PORT_RANGE_START 0x9000

@@ -421,6 +431,166 @@ struct afe_digital_clk_cfg {
u16 reserved;
} __packed;

+#define AFE_API_VERSION_PCM_CONFIG 0x1
+/* Enumeration for the auxiliary PCM synchronization signal
+ * provided by an external source.
+ */
+
+#define AFE_PORT_PCM_SYNC_SRC_EXTERNAL 0x0
+/* Enumeration for the auxiliary PCM synchronization signal
+ * provided by an internal source.
+ */
+#define AFE_PORT_PCM_SYNC_SRC_INTERNAL 0x1
+/* Enumeration for the PCM configuration aux_mode parameter,
+ * which configures the auxiliary PCM interface to use
+ * short synchronization.
+ */
+#define AFE_PORT_PCM_AUX_MODE_PCM 0x0
+/*
+ * Enumeration for the PCM configuration aux_mode parameter,
+ * which configures the auxiliary PCM interface to use long
+ * synchronization.
+ */
+#define AFE_PORT_PCM_AUX_MODE_AUX 0x1
+/*
+ * Enumeration for setting the PCM configuration frame to 8.
+ */
+#define AFE_PORT_PCM_BITS_PER_FRAME_8 0x0
+/*
+ * Enumeration for setting the PCM configuration frame to 16.
+ */
+#define AFE_PORT_PCM_BITS_PER_FRAME_16 0x1
+
+/* Enumeration for setting the PCM configuration frame to 32.*/
+#define AFE_PORT_PCM_BITS_PER_FRAME_32 0x2
+
+/* Enumeration for setting the PCM configuration frame to 64.*/
+#define AFE_PORT_PCM_BITS_PER_FRAME_64 0x3
+
+/* Enumeration for setting the PCM configuration frame to 128.*/
+#define AFE_PORT_PCM_BITS_PER_FRAME_128 0x4
+
+/* Enumeration for setting the PCM configuration frame to 256.*/
+#define AFE_PORT_PCM_BITS_PER_FRAME_256 0x5
+
+/* Enumeration for setting the PCM configuration
+ * quantype parameter to A-law with no padding.
+ */
+#define AFE_PORT_PCM_ALAW_NOPADDING 0x0
+
+/* Enumeration for setting the PCM configuration quantype
+ * parameter to mu-law with no padding.
+ */
+#define AFE_PORT_PCM_MULAW_NOPADDING 0x1
+/* Enumeration for setting the PCM configuration quantype
+ * parameter to linear with no padding.
+ */
+#define AFE_PORT_PCM_LINEAR_NOPADDING 0x2
+/* Enumeration for setting the PCM configuration quantype
+ * parameter to A-law with padding.
+ */
+#define AFE_PORT_PCM_ALAW_PADDING 0x3
+/* Enumeration for setting the PCM configuration quantype
+ * parameter to mu-law with padding.
+ */
+#define AFE_PORT_PCM_MULAW_PADDING 0x4
+/* Enumeration for setting the PCM configuration quantype
+ * parameter to linear with padding.
+ */
+#define AFE_PORT_PCM_LINEAR_PADDING 0x5
+/* Enumeration for disabling the PCM configuration
+ * ctrl_data_out_enable parameter.
+ * The PCM block is the only master.
+ */
+#define AFE_PORT_PCM_CTRL_DATA_OE_DISABLE 0x0
+/*
+ * Enumeration for enabling the PCM configuration
+ * ctrl_data_out_enable parameter. The PCM block shares
+ * the signal with other masters.
+ */
+#define AFE_PORT_PCM_CTRL_DATA_OE_ENABLE 0x1
+
+/* Payload of the #AFE_PARAM_ID_PCM_CONFIG command's
+ * (PCM configuration parameter).
+ */
+
+struct afe_param_id_pcm_cfg {
+ u32 pcm_cfg_minor_version;
+/* Minor version used for tracking the version of the AUX PCM
+ * configuration interface.
+ * Supported values: #AFE_API_VERSION_PCM_CONFIG
+ */
+
+ u16 aux_mode;
+/* PCM synchronization setting.
+ * Supported values:
+ * - #AFE_PORT_PCM_AUX_MODE_PCM
+ * - #AFE_PORT_PCM_AUX_MODE_AUX
+ */
+
+ u16 sync_src;
+/* Synchronization source.
+ * Supported values:
+ * - #AFE_PORT_PCM_SYNC_SRC_EXTERNAL
+ * - #AFE_PORT_PCM_SYNC_SRC_INTERNAL
+ */
+
+ u16 frame_setting;
+/* Number of bits per frame.
+ * Supported values:
+ * - #AFE_PORT_PCM_BITS_PER_FRAME_8
+ * - #AFE_PORT_PCM_BITS_PER_FRAME_16
+ * - #AFE_PORT_PCM_BITS_PER_FRAME_32
+ * - #AFE_PORT_PCM_BITS_PER_FRAME_64
+ * - #AFE_PORT_PCM_BITS_PER_FRAME_128
+ * - #AFE_PORT_PCM_BITS_PER_FRAME_256
+ */
+
+ u16 quantype;
+/* PCM quantization type.
+ * Supported values:
+ * - #AFE_PORT_PCM_ALAW_NOPADDING
+ * - #AFE_PORT_PCM_MULAW_NOPADDING
+ * - #AFE_PORT_PCM_LINEAR_NOPADDING
+ * - #AFE_PORT_PCM_ALAW_PADDING
+ * - #AFE_PORT_PCM_MULAW_PADDING
+ * - #AFE_PORT_PCM_LINEAR_PADDING
+ */
+
+ u16 ctrl_data_out_enable;
+/* Specifies whether the PCM block shares the data-out
+ * signal to the drive with other masters.
+ * Supported values:
+ * - #AFE_PORT_PCM_CTRL_DATA_OE_DISABLE
+ * - #AFE_PORT_PCM_CTRL_DATA_OE_ENABLE
+ */
+ u16 reserved;
+ /* This field must be set to zero. */
+
+ u32 sample_rate;
+/* Sampling rate of the port.
+ * Supported values:
+ * - #AFE_PORT_SAMPLE_RATE_8K
+ * - #AFE_PORT_SAMPLE_RATE_16K
+ */
+
+ u16 bit_width;
+/* Bit width of the sample.
+ * Supported values: 16
+ */
+
+ u16 num_channels;
+/* Number of channels.
+ * Supported values: 1 to 4
+ */
+
+ u16 slot_number_mapping[4];
+/* Specifies the slot number for the each channel in
+ * multi channel scenario.
+ * Supported values: 1 to 32
+ */
+} __packed;
+
struct afe_param_id_i2s_cfg {
u32 i2s_cfg_minor_version;
u16 bit_width;
@@ -452,6 +622,7 @@ union afe_port_config {
struct afe_param_id_hdmi_multi_chan_audio_cfg hdmi_multi_ch;
struct afe_param_id_slimbus_cfg slim_cfg;
struct afe_param_id_i2s_cfg i2s_cfg;
+ struct afe_param_id_pcm_cfg pcm_cfg;
struct afe_param_id_tdm_cfg tdm_cfg;
} __packed;

@@ -707,6 +878,22 @@ static struct afe_port_map port_maps[AFE_PORT_MAX] = {
QUINARY_TDM_TX_7, 0, 1},
[DISPLAY_PORT_RX] = { AFE_PORT_ID_HDMI_OVER_DP_RX,
DISPLAY_PORT_RX, 1, 1},
+ [PRIMARY_PCM_RX] = { AFE_PORT_ID_PRIMARY_PCM_RX,
+ PRIMARY_PCM_RX, 1, 1},
+ [PRIMARY_PCM_TX] = { AFE_PORT_ID_PRIMARY_PCM_TX,
+ PRIMARY_PCM_RX, 0, 1},
+ [SECONDARY_PCM_RX] = { AFE_PORT_ID_SECONDARY_PCM_RX,
+ SECONDARY_PCM_RX, 1, 1},
+ [SECONDARY_PCM_TX] = { AFE_PORT_ID_SECONDARY_PCM_TX,
+ SECONDARY_PCM_TX, 0, 1},
+ [TERTIARY_PCM_RX] = { AFE_PORT_ID_TERTIARY_PCM_RX,
+ TERTIARY_PCM_RX, 1, 1},
+ [TERTIARY_PCM_TX] = { AFE_PORT_ID_TERTIARY_PCM_TX,
+ TERTIARY_PCM_TX, 0, 1},
+ [QUATERNARY_PCM_RX] = { AFE_PORT_ID_QUATERNARY_PCM_RX,
+ QUATERNARY_PCM_RX, 1, 1},
+ [QUATERNARY_PCM_TX] = { AFE_PORT_ID_QUATERNARY_PCM_TX,
+ QUATERNARY_PCM_TX, 0, 1},
};

static void q6afe_port_free(struct kref *ref)
@@ -993,6 +1180,7 @@ int q6afe_port_set_sysclk(struct q6afe_port *port, int clk_id,
break;
case Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT ... Q6AFE_LPASS_CLK_ID_QUI_MI2S_OSR:
case Q6AFE_LPASS_CLK_ID_MCLK_1 ... Q6AFE_LPASS_CLK_ID_INT_MCLK_1:
+ /* TDM cases overlap with PCM */
case Q6AFE_LPASS_CLK_ID_PRI_TDM_IBIT ... Q6AFE_LPASS_CLK_ID_QUIN_TDM_EBIT:
cset.clk_set_minor_version = AFE_API_VERSION_CLOCK_SET;
cset.clk_id = clk_id;
@@ -1145,6 +1333,54 @@ void q6afe_hdmi_port_prepare(struct q6afe_port *port,
}
EXPORT_SYMBOL_GPL(q6afe_hdmi_port_prepare);

+/**
+ * q6afe_pcm_port_prepare() - Prepare pcm afe port.
+ *
+ * @port: Instance of afe port
+ * @cfg: PCM configuration for the afe port
+ *
+ */
+int q6afe_pcm_port_prepare(struct q6afe_port *port, struct q6afe_pcm_cfg *cfg)
+{
+ union afe_port_config *pcfg = &port->port_cfg;
+
+ pcfg->pcm_cfg.pcm_cfg_minor_version = AFE_API_VERSION_PCM_CONFIG;
+ pcfg->pcm_cfg.aux_mode = AFE_PORT_PCM_AUX_MODE_PCM;
+
+ switch (cfg->fmt & SND_SOC_DAIFMT_MASTER_MASK) {
+ case SND_SOC_DAIFMT_CBS_CFS:
+ pcfg->pcm_cfg.sync_src = AFE_PORT_PCM_SYNC_SRC_INTERNAL;
+ break;
+ case SND_SOC_DAIFMT_CBM_CFM:
+ /* CPU is slave */
+ pcfg->pcm_cfg.sync_src = AFE_PORT_PCM_SYNC_SRC_EXTERNAL;
+ break;
+ default:
+ break;
+ }
+
+ switch (cfg->sample_rate) {
+ case 8000:
+ pcfg->pcm_cfg.frame_setting = AFE_PORT_PCM_BITS_PER_FRAME_128;
+ break;
+ case 16000:
+ pcfg->pcm_cfg.frame_setting = AFE_PORT_PCM_BITS_PER_FRAME_64;
+ break;
+ }
+ pcfg->pcm_cfg.quantype = AFE_PORT_PCM_LINEAR_NOPADDING;
+ pcfg->pcm_cfg.ctrl_data_out_enable = AFE_PORT_PCM_CTRL_DATA_OE_DISABLE;
+ pcfg->pcm_cfg.reserved = 0;
+ pcfg->pcm_cfg.sample_rate = cfg->sample_rate;
+
+ /* 16 bit mono */
+ pcfg->pcm_cfg.bit_width = 16;
+ pcfg->pcm_cfg.num_channels = 1;
+ pcfg->pcm_cfg.slot_number_mapping[0] = 1;
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(q6afe_pcm_port_prepare);
+
/**
* q6afe_i2s_port_prepare() - Prepare i2s afe port.
*
@@ -1417,6 +1653,16 @@ struct q6afe_port *q6afe_port_get_from_id(struct device *dev, int id)
case AFE_PORT_ID_QUATERNARY_MI2S_TX:
cfg_type = AFE_PARAM_ID_I2S_CONFIG;
break;
+ case AFE_PORT_ID_PRIMARY_PCM_RX:
+ case AFE_PORT_ID_PRIMARY_PCM_TX:
+ case AFE_PORT_ID_SECONDARY_PCM_RX:
+ case AFE_PORT_ID_SECONDARY_PCM_TX:
+ case AFE_PORT_ID_TERTIARY_PCM_RX:
+ case AFE_PORT_ID_TERTIARY_PCM_TX:
+ case AFE_PORT_ID_QUATERNARY_PCM_RX:
+ case AFE_PORT_ID_QUATERNARY_PCM_TX:
+ cfg_type = AFE_PARAM_ID_PCM_CONFIG;
+ break;
case AFE_PORT_ID_PRIMARY_TDM_RX ... AFE_PORT_ID_QUINARY_TDM_TX_7:
cfg_type = AFE_PARAM_ID_TDM_CONFIG;
break;
diff --git a/sound/soc/qcom/qdsp6/q6afe.h b/sound/soc/qcom/qdsp6/q6afe.h
index c7ed5422baff..c832be6d0ff5 100644
--- a/sound/soc/qcom/qdsp6/q6afe.h
+++ b/sound/soc/qcom/qdsp6/q6afe.h
@@ -5,7 +5,7 @@

#include <dt-bindings/sound/qcom,q6afe.h>

-#define AFE_PORT_MAX 105
+#define AFE_PORT_MAX 113

#define MSM_AFE_PORT_TYPE_RX 0
#define MSM_AFE_PORT_TYPE_TX 1
@@ -170,6 +170,11 @@ struct q6afe_i2s_cfg {
int fmt;
};

+struct q6afe_pcm_cfg {
+ u32 sample_rate;
+ int fmt;
+};
+
struct q6afe_tdm_cfg {
u16 num_channels;
u32 sample_rate;
@@ -188,6 +193,7 @@ struct q6afe_port_config {
struct q6afe_hdmi_cfg hdmi;
struct q6afe_slim_cfg slim;
struct q6afe_i2s_cfg i2s_cfg;
+ struct q6afe_pcm_cfg pcm_cfg;
struct q6afe_tdm_cfg tdm;
};

@@ -203,6 +209,7 @@ void q6afe_hdmi_port_prepare(struct q6afe_port *port,
void q6afe_slim_port_prepare(struct q6afe_port *port,
struct q6afe_slim_cfg *cfg);
int q6afe_i2s_port_prepare(struct q6afe_port *port, struct q6afe_i2s_cfg *cfg);
+int q6afe_pcm_port_prepare(struct q6afe_port *port, struct q6afe_pcm_cfg *cfg);
void q6afe_tdm_port_prepare(struct q6afe_port *port, struct q6afe_tdm_cfg *cfg);

int q6afe_port_set_sysclk(struct q6afe_port *port, int clk_id,
--
2.21.1

2020-02-07 21:00:57

by Adam Serbinski

[permalink] [raw]
Subject: [PATCH 3/8] ASoC: qdsp6: q6afe-dai: add support to pcm port dais

This patch adds support of AFE DAI for PCM port.

Signed-off-by: Adam Serbinski <[email protected]>
CC: Andy Gross <[email protected]>
CC: Mark Rutland <[email protected]>
CC: Liam Girdwood <[email protected]>
CC: Patrick Lai <[email protected]>
CC: Banajit Goswami <[email protected]>
CC: Jaroslav Kysela <[email protected]>
CC: Takashi Iwai <[email protected]>
CC: [email protected]
CC: [email protected]
CC: [email protected]
CC: [email protected]
---
sound/soc/qcom/qdsp6/q6afe-dai.c | 198 ++++++++++++++++++++++++++++++-
1 file changed, 197 insertions(+), 1 deletion(-)

diff --git a/sound/soc/qcom/qdsp6/q6afe-dai.c b/sound/soc/qcom/qdsp6/q6afe-dai.c
index c1a7624eaf17..23b29591ef47 100644
--- a/sound/soc/qcom/qdsp6/q6afe-dai.c
+++ b/sound/soc/qcom/qdsp6/q6afe-dai.c
@@ -151,6 +151,28 @@ static int q6hdmi_hw_params(struct snd_pcm_substream *substream,
return 0;
}

+static int q6pcm_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
+{
+ struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
+ struct q6afe_pcm_cfg *pcm = &dai_data->port_config[dai->id].pcm_cfg;
+
+ pcm->sample_rate = params_rate(params);
+
+ return 0;
+}
+
+static int q6pcm_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
+{
+ struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
+ struct q6afe_pcm_cfg *pcm = &dai_data->port_config[dai->id].pcm_cfg;
+
+ pcm->fmt = fmt;
+
+ return 0;
+}
+
static int q6i2s_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
@@ -358,6 +380,15 @@ static int q6afe_dai_prepare(struct snd_pcm_substream *substream,
return rc;
}
break;
+ case PRIMARY_PCM_RX ... QUATERNARY_PCM_TX:
+ rc = q6afe_pcm_port_prepare(dai_data->port[dai->id],
+ &dai_data->port_config[dai->id].pcm_cfg);
+ if (rc < 0) {
+ dev_err(dai->dev, "fail to prepare AFE port %x\n",
+ dai->id);
+ return rc;
+ }
+ break;
case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7:
q6afe_tdm_port_prepare(dai_data->port[dai->id],
&dai_data->port_config[dai->id].tdm);
@@ -429,11 +460,32 @@ static int q6afe_mi2s_set_sysclk(struct snd_soc_dai *dai,
Q6AFE_LPASS_CLK_ROOT_DEFAULT,
freq, dir);
case Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT ... Q6AFE_LPASS_CLK_ID_QUI_MI2S_OSR:
+ case Q6AFE_LPASS_CLK_ID_PRI_PCM_IBIT ... Q6AFE_LPASS_CLK_ID_QUI_PCM_OSR:
case Q6AFE_LPASS_CLK_ID_MCLK_1 ... Q6AFE_LPASS_CLK_ID_INT_MCLK_1:
return q6afe_port_set_sysclk(port, clk_id,
Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
Q6AFE_LPASS_CLK_ROOT_DEFAULT,
freq, dir);
+ }
+
+ return 0;
+}
+
+static int q6afe_tdm_set_sysclk(struct snd_soc_dai *dai,
+ int clk_id, unsigned int freq, int dir)
+{
+ struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
+ struct q6afe_port *port = dai_data->port[dai->id];
+
+ switch (clk_id) {
+ case LPAIF_DIG_CLK:
+ return q6afe_port_set_sysclk(port, clk_id, 0, 5, freq, dir);
+ case LPAIF_BIT_CLK:
+ case LPAIF_OSR_CLK:
+ return q6afe_port_set_sysclk(port, clk_id,
+ Q6AFE_LPASS_CLK_SRC_INTERNAL,
+ Q6AFE_LPASS_CLK_ROOT_DEFAULT,
+ freq, dir);
case Q6AFE_LPASS_CLK_ID_PRI_TDM_IBIT ... Q6AFE_LPASS_CLK_ID_QUIN_TDM_EBIT:
return q6afe_port_set_sysclk(port, clk_id,
Q6AFE_LPASS_CLK_ATTRIBUTE_INVERT_COUPLE_NO,
@@ -468,6 +520,11 @@ static const struct snd_soc_dapm_route q6afe_dapm_routes[] = {
{"Tertiary MI2S Playback", NULL, "TERT_MI2S_RX"},
{"Quaternary MI2S Playback", NULL, "QUAT_MI2S_RX"},

+ {"Primary PCM Playback", NULL, "PRI_PCM_RX"},
+ {"Secondary PCM Playback", NULL, "SEC_PCM_RX"},
+ {"Tertiary PCM Playback", NULL, "TERT_PCM_RX"},
+ {"Quaternary PCM Playback", NULL, "QUAT_PCM_RX"},
+
{"Primary TDM0 Playback", NULL, "PRIMARY_TDM_RX_0"},
{"Primary TDM1 Playback", NULL, "PRIMARY_TDM_RX_1"},
{"Primary TDM2 Playback", NULL, "PRIMARY_TDM_RX_2"},
@@ -562,6 +619,11 @@ static const struct snd_soc_dapm_route q6afe_dapm_routes[] = {
{"PRI_MI2S_TX", NULL, "Primary MI2S Capture"},
{"SEC_MI2S_TX", NULL, "Secondary MI2S Capture"},
{"QUAT_MI2S_TX", NULL, "Quaternary MI2S Capture"},
+
+ {"PRI_PCM_TX", NULL, "Primary PCM Capture"},
+ {"SEC_PCM_TX", NULL, "Secondary PCM Capture"},
+ {"TERT_PCM_TX", NULL, "Tertiary PCM Capture"},
+ {"QUAT_PCM_TX", NULL, "Quaternary PCM Capture"},
};

static const struct snd_soc_dai_ops q6hdmi_ops = {
@@ -578,6 +640,14 @@ static const struct snd_soc_dai_ops q6i2s_ops = {
.set_sysclk = q6afe_mi2s_set_sysclk,
};

+static const struct snd_soc_dai_ops q6pcm_ops = {
+ .prepare = q6afe_dai_prepare,
+ .hw_params = q6pcm_hw_params,
+ .set_fmt = q6pcm_set_fmt,
+ .shutdown = q6afe_dai_shutdown,
+ .set_sysclk = q6afe_mi2s_set_sysclk,
+};
+
static const struct snd_soc_dai_ops q6slim_ops = {
.prepare = q6afe_dai_prepare,
.hw_params = q6slim_hw_params,
@@ -588,7 +658,7 @@ static const struct snd_soc_dai_ops q6slim_ops = {
static const struct snd_soc_dai_ops q6tdm_ops = {
.prepare = q6afe_dai_prepare,
.shutdown = q6afe_dai_shutdown,
- .set_sysclk = q6afe_mi2s_set_sysclk,
+ .set_sysclk = q6afe_tdm_set_sysclk,
.set_tdm_slot = q6tdm_set_tdm_slot,
.set_channel_map = q6tdm_set_channel_map,
.hw_params = q6tdm_hw_params,
@@ -1012,6 +1082,115 @@ static struct snd_soc_dai_driver q6afe_dais[] = {
.ops = &q6i2s_ops,
.probe = msm_dai_q6_dai_probe,
.remove = msm_dai_q6_dai_remove,
+ }, {
+ .playback = {
+ .stream_name = "Primary PCM Playback",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE,
+ .rate_min = 8000,
+ .rate_max = 16000,
+ },
+ .id = PRIMARY_PCM_RX,
+ .name = "PRI_PCM_RX",
+ .ops = &q6pcm_ops,
+ .probe = msm_dai_q6_dai_probe,
+ .remove = msm_dai_q6_dai_remove,
+ }, {
+ .capture = {
+ .stream_name = "Primary PCM Capture",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE,
+ .rate_min = 8000,
+ .rate_max = 16000,
+ },
+ .id = PRIMARY_PCM_TX,
+ .name = "PRI_PCM_TX",
+ .ops = &q6pcm_ops,
+ .probe = msm_dai_q6_dai_probe,
+ .remove = msm_dai_q6_dai_remove,
+ }, {
+ .playback = {
+ .stream_name = "Secondary PCM Playback",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .rate_min = 8000,
+ .rate_max = 16000,
+ },
+ .name = "SEC_PCM_RX",
+ .id = SECONDARY_PCM_RX,
+ .ops = &q6pcm_ops,
+ .probe = msm_dai_q6_dai_probe,
+ .remove = msm_dai_q6_dai_remove,
+ }, {
+ .capture = {
+ .stream_name = "Secondary PCM Capture",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE,
+ .rate_min = 8000,
+ .rate_max = 16000,
+ },
+ .id = SECONDARY_PCM_TX,
+ .name = "SEC_PCM_TX",
+ .ops = &q6pcm_ops,
+ .probe = msm_dai_q6_dai_probe,
+ .remove = msm_dai_q6_dai_remove,
+ }, {
+ .playback = {
+ .stream_name = "Tertiary PCM Playback",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .rate_min = 8000,
+ .rate_max = 16000,
+ },
+ .name = "TERT_PCM_RX",
+ .id = TERTIARY_PCM_RX,
+ .ops = &q6pcm_ops,
+ .probe = msm_dai_q6_dai_probe,
+ .remove = msm_dai_q6_dai_remove,
+ }, {
+ .capture = {
+ .stream_name = "Tertiary PCM Capture",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE,
+ .rate_min = 8000,
+ .rate_max = 16000,
+ },
+ .id = TERTIARY_PCM_TX,
+ .name = "TERT_PCM_TX",
+ .ops = &q6pcm_ops,
+ .probe = msm_dai_q6_dai_probe,
+ .remove = msm_dai_q6_dai_remove,
+ }, {
+ .playback = {
+ .stream_name = "Quaternary PCM Playback",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .rate_min = 8000,
+ .rate_max = 16000,
+ },
+ .name = "QUAT_PCM_RX",
+ .id = QUATERNARY_PCM_RX,
+ .ops = &q6pcm_ops,
+ .probe = msm_dai_q6_dai_probe,
+ .remove = msm_dai_q6_dai_remove,
+ }, {
+ .capture = {
+ .stream_name = "Quaternary PCM Capture",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE,
+ .rate_min = 8000,
+ .rate_max = 16000,
+ },
+ .id = QUATERNARY_PCM_TX,
+ .name = "QUAT_PCM_TX",
+ .ops = &q6pcm_ops,
+ .probe = msm_dai_q6_dai_probe,
+ .remove = msm_dai_q6_dai_remove,
},
Q6AFE_TDM_PB_DAI("Primary", 0, PRIMARY_TDM_RX_0),
Q6AFE_TDM_PB_DAI("Primary", 1, PRIMARY_TDM_RX_1),
@@ -1169,6 +1348,23 @@ static const struct snd_soc_dapm_widget q6afe_dai_widgets[] = {
SND_SOC_DAPM_AIF_OUT("PRI_MI2S_TX", NULL,
0, 0, 0, 0),

+ SND_SOC_DAPM_AIF_IN("QUAT_PCM_RX", NULL,
+ 0, 0, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("QUAT_PCM_TX", NULL,
+ 0, 0, 0, 0),
+ SND_SOC_DAPM_AIF_IN("TERT_PCM_RX", NULL,
+ 0, 0, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("TERT_PCM_TX", NULL,
+ 0, 0, 0, 0),
+ SND_SOC_DAPM_AIF_IN("SEC_PCM_RX", NULL,
+ 0, 0, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("SEC_PCM_TX", NULL,
+ 0, 0, 0, 0),
+ SND_SOC_DAPM_AIF_IN("PRI_PCM_RX", NULL,
+ 0, 0, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("PRI_PCM_TX", NULL,
+ 0, 0, 0, 0),
+
SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_0", NULL,
0, 0, 0, 0),
SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_1", NULL,
--
2.21.1

2020-02-09 15:49:09

by Adam Serbinski

[permalink] [raw]
Subject: [PATCH v2 0/8] ASoC: qdsp6: db820c: Add support for external and bluetooth audio

Changes from V1:

Rename patch:
from: dts: msm8996/db820c: enable primary pcm and quaternary i2s
to: dts: qcom: db820c: Enable primary PCM and quaternary I2S

CC: Andy Gross <[email protected]>
CC: Mark Rutland <[email protected]>
CC: Liam Girdwood <[email protected]>
CC: Patrick Lai <[email protected]>
CC: Banajit Goswami <[email protected]>
CC: Jaroslav Kysela <[email protected]>
CC: Takashi Iwai <[email protected]>
CC: [email protected]
CC: [email protected]
CC: [email protected]
CC: [email protected]

Adam Serbinski (8):
ASoC: qdsp6: dt-bindings: Add q6afe pcm dt binding
ASoC: qdsp6: q6afe: add support to pcm ports
ASoC: qdsp6: q6afe-dai: add support to pcm port dais
ASoC: qdsp6: q6routing: add pcm port routing
ASoC: qcom: apq8096: add support for primary and quaternary I2S/PCM
ASoC: qcom/common: Use snd-soc-dummy-dai when codec is not specified
arm64: dts: qcom: db820c: Enable primary PCM and quaternary I2S
ASoC: qcom: apq8096: add kcontrols to set PCM rate

arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 113 +++++++++
arch/arm64/boot/dts/qcom/msm8996-pins.dtsi | 162 ++++++++++++
include/dt-bindings/sound/qcom,q6afe.h | 8 +
sound/soc/qcom/apq8096.c | 172 +++++++++++--
sound/soc/qcom/common.c | 22 +-
sound/soc/qcom/qdsp6/q6afe-dai.c | 198 ++++++++++++++-
sound/soc/qcom/qdsp6/q6afe.c | 246 +++++++++++++++++++
sound/soc/qcom/qdsp6/q6afe.h | 9 +-
sound/soc/qcom/qdsp6/q6routing.c | 44 ++++
9 files changed, 953 insertions(+), 21 deletions(-)

--
2.21.1

2020-02-09 15:49:17

by Adam Serbinski

[permalink] [raw]
Subject: [PATCH v2 6/8] ASoC: qcom/common: Use snd-soc-dummy-dai when codec is not specified

When not specifying a codec, use snd-soc-dummy-dai. This supports
the case where a fixed configuration codec is attached, such as
bluetooth hfp.

Signed-off-by: Adam Serbinski <[email protected]>
CC: Andy Gross <[email protected]>
CC: Mark Rutland <[email protected]>
CC: Liam Girdwood <[email protected]>
CC: Patrick Lai <[email protected]>
CC: Banajit Goswami <[email protected]>
CC: Jaroslav Kysela <[email protected]>
CC: Takashi Iwai <[email protected]>
CC: [email protected]
CC: [email protected]
CC: [email protected]
CC: [email protected]
---
sound/soc/qcom/common.c | 22 +++++++++++++++++-----
1 file changed, 17 insertions(+), 5 deletions(-)

diff --git a/sound/soc/qcom/common.c b/sound/soc/qcom/common.c
index 6c20bdd850f3..aa2f2238aca0 100644
--- a/sound/soc/qcom/common.c
+++ b/sound/soc/qcom/common.c
@@ -84,7 +84,7 @@ int qcom_snd_parse_of(struct snd_soc_card *card)
goto err;
}

- if (codec && platform) {
+ if (platform) {
link->platforms->of_node = of_parse_phandle(platform,
"sound-dai",
0);
@@ -94,10 +94,22 @@ int qcom_snd_parse_of(struct snd_soc_card *card)
goto err;
}

- ret = snd_soc_of_get_dai_link_codecs(dev, codec, link);
- if (ret < 0) {
- dev_err(card->dev, "%s: codec dai not found\n", link->name);
- goto err;
+ if (codec) {
+ ret = snd_soc_of_get_dai_link_codecs(dev, codec, link);
+ if (ret < 0) {
+ dev_err(card->dev, "%s: codec dai not found\n", link->name);
+ goto err;
+ }
+ } else {
+ dlc = devm_kzalloc(dev,
+ sizeof(*dlc), GFP_KERNEL);
+ if (!dlc)
+ return -ENOMEM;
+
+ link->codecs = dlc;
+ link->num_codecs = 1;
+ link->codecs->dai_name = "snd-soc-dummy-dai";
+ link->codecs->name = "snd-soc-dummy";
}
link->no_pcm = 1;
link->ignore_pmdown_time = 1;
--
2.21.1

2020-02-09 15:49:29

by Adam Serbinski

[permalink] [raw]
Subject: [PATCH v2 2/8] ASoC: qdsp6: q6afe: add support to pcm ports

This patch adds support to pcm ports in AFE.

Signed-off-by: Adam Serbinski <[email protected]>
CC: Andy Gross <[email protected]>
CC: Mark Rutland <[email protected]>
CC: Liam Girdwood <[email protected]>
CC: Patrick Lai <[email protected]>
CC: Banajit Goswami <[email protected]>
CC: Jaroslav Kysela <[email protected]>
CC: Takashi Iwai <[email protected]>
CC: [email protected]
CC: [email protected]
CC: [email protected]
CC: [email protected]
---
sound/soc/qcom/qdsp6/q6afe.c | 246 +++++++++++++++++++++++++++++++++++
sound/soc/qcom/qdsp6/q6afe.h | 9 +-
2 files changed, 254 insertions(+), 1 deletion(-)

diff --git a/sound/soc/qcom/qdsp6/q6afe.c b/sound/soc/qcom/qdsp6/q6afe.c
index e0945f7a58c8..b53ad14a78fd 100644
--- a/sound/soc/qcom/qdsp6/q6afe.c
+++ b/sound/soc/qcom/qdsp6/q6afe.c
@@ -40,6 +40,7 @@

#define AFE_PARAM_ID_SLIMBUS_CONFIG 0x00010212
#define AFE_PARAM_ID_I2S_CONFIG 0x0001020D
+#define AFE_PARAM_ID_PCM_CONFIG 0x0001020E
#define AFE_PARAM_ID_TDM_CONFIG 0x0001029D
#define AFE_PARAM_ID_PORT_SLOT_MAPPING_CONFIG 0x00010297

@@ -117,6 +118,15 @@
#define AFE_PORT_ID_QUATERNARY_MI2S_RX 0x1006
#define AFE_PORT_ID_QUATERNARY_MI2S_TX 0x1007

+#define AFE_PORT_ID_PRIMARY_PCM_RX 0x100A
+#define AFE_PORT_ID_PRIMARY_PCM_TX 0x100B
+#define AFE_PORT_ID_SECONDARY_PCM_RX 0x100C
+#define AFE_PORT_ID_SECONDARY_PCM_TX 0x100D
+#define AFE_PORT_ID_TERTIARY_PCM_RX 0x1012
+#define AFE_PORT_ID_TERTIARY_PCM_TX 0x1013
+#define AFE_PORT_ID_QUATERNARY_PCM_RX 0x1014
+#define AFE_PORT_ID_QUATERNARY_PCM_TX 0x1015
+
/* Start of the range of port IDs for TDM devices. */
#define AFE_PORT_ID_TDM_PORT_RANGE_START 0x9000

@@ -421,6 +431,166 @@ struct afe_digital_clk_cfg {
u16 reserved;
} __packed;

+#define AFE_API_VERSION_PCM_CONFIG 0x1
+/* Enumeration for the auxiliary PCM synchronization signal
+ * provided by an external source.
+ */
+
+#define AFE_PORT_PCM_SYNC_SRC_EXTERNAL 0x0
+/* Enumeration for the auxiliary PCM synchronization signal
+ * provided by an internal source.
+ */
+#define AFE_PORT_PCM_SYNC_SRC_INTERNAL 0x1
+/* Enumeration for the PCM configuration aux_mode parameter,
+ * which configures the auxiliary PCM interface to use
+ * short synchronization.
+ */
+#define AFE_PORT_PCM_AUX_MODE_PCM 0x0
+/*
+ * Enumeration for the PCM configuration aux_mode parameter,
+ * which configures the auxiliary PCM interface to use long
+ * synchronization.
+ */
+#define AFE_PORT_PCM_AUX_MODE_AUX 0x1
+/*
+ * Enumeration for setting the PCM configuration frame to 8.
+ */
+#define AFE_PORT_PCM_BITS_PER_FRAME_8 0x0
+/*
+ * Enumeration for setting the PCM configuration frame to 16.
+ */
+#define AFE_PORT_PCM_BITS_PER_FRAME_16 0x1
+
+/* Enumeration for setting the PCM configuration frame to 32.*/
+#define AFE_PORT_PCM_BITS_PER_FRAME_32 0x2
+
+/* Enumeration for setting the PCM configuration frame to 64.*/
+#define AFE_PORT_PCM_BITS_PER_FRAME_64 0x3
+
+/* Enumeration for setting the PCM configuration frame to 128.*/
+#define AFE_PORT_PCM_BITS_PER_FRAME_128 0x4
+
+/* Enumeration for setting the PCM configuration frame to 256.*/
+#define AFE_PORT_PCM_BITS_PER_FRAME_256 0x5
+
+/* Enumeration for setting the PCM configuration
+ * quantype parameter to A-law with no padding.
+ */
+#define AFE_PORT_PCM_ALAW_NOPADDING 0x0
+
+/* Enumeration for setting the PCM configuration quantype
+ * parameter to mu-law with no padding.
+ */
+#define AFE_PORT_PCM_MULAW_NOPADDING 0x1
+/* Enumeration for setting the PCM configuration quantype
+ * parameter to linear with no padding.
+ */
+#define AFE_PORT_PCM_LINEAR_NOPADDING 0x2
+/* Enumeration for setting the PCM configuration quantype
+ * parameter to A-law with padding.
+ */
+#define AFE_PORT_PCM_ALAW_PADDING 0x3
+/* Enumeration for setting the PCM configuration quantype
+ * parameter to mu-law with padding.
+ */
+#define AFE_PORT_PCM_MULAW_PADDING 0x4
+/* Enumeration for setting the PCM configuration quantype
+ * parameter to linear with padding.
+ */
+#define AFE_PORT_PCM_LINEAR_PADDING 0x5
+/* Enumeration for disabling the PCM configuration
+ * ctrl_data_out_enable parameter.
+ * The PCM block is the only master.
+ */
+#define AFE_PORT_PCM_CTRL_DATA_OE_DISABLE 0x0
+/*
+ * Enumeration for enabling the PCM configuration
+ * ctrl_data_out_enable parameter. The PCM block shares
+ * the signal with other masters.
+ */
+#define AFE_PORT_PCM_CTRL_DATA_OE_ENABLE 0x1
+
+/* Payload of the #AFE_PARAM_ID_PCM_CONFIG command's
+ * (PCM configuration parameter).
+ */
+
+struct afe_param_id_pcm_cfg {
+ u32 pcm_cfg_minor_version;
+/* Minor version used for tracking the version of the AUX PCM
+ * configuration interface.
+ * Supported values: #AFE_API_VERSION_PCM_CONFIG
+ */
+
+ u16 aux_mode;
+/* PCM synchronization setting.
+ * Supported values:
+ * - #AFE_PORT_PCM_AUX_MODE_PCM
+ * - #AFE_PORT_PCM_AUX_MODE_AUX
+ */
+
+ u16 sync_src;
+/* Synchronization source.
+ * Supported values:
+ * - #AFE_PORT_PCM_SYNC_SRC_EXTERNAL
+ * - #AFE_PORT_PCM_SYNC_SRC_INTERNAL
+ */
+
+ u16 frame_setting;
+/* Number of bits per frame.
+ * Supported values:
+ * - #AFE_PORT_PCM_BITS_PER_FRAME_8
+ * - #AFE_PORT_PCM_BITS_PER_FRAME_16
+ * - #AFE_PORT_PCM_BITS_PER_FRAME_32
+ * - #AFE_PORT_PCM_BITS_PER_FRAME_64
+ * - #AFE_PORT_PCM_BITS_PER_FRAME_128
+ * - #AFE_PORT_PCM_BITS_PER_FRAME_256
+ */
+
+ u16 quantype;
+/* PCM quantization type.
+ * Supported values:
+ * - #AFE_PORT_PCM_ALAW_NOPADDING
+ * - #AFE_PORT_PCM_MULAW_NOPADDING
+ * - #AFE_PORT_PCM_LINEAR_NOPADDING
+ * - #AFE_PORT_PCM_ALAW_PADDING
+ * - #AFE_PORT_PCM_MULAW_PADDING
+ * - #AFE_PORT_PCM_LINEAR_PADDING
+ */
+
+ u16 ctrl_data_out_enable;
+/* Specifies whether the PCM block shares the data-out
+ * signal to the drive with other masters.
+ * Supported values:
+ * - #AFE_PORT_PCM_CTRL_DATA_OE_DISABLE
+ * - #AFE_PORT_PCM_CTRL_DATA_OE_ENABLE
+ */
+ u16 reserved;
+ /* This field must be set to zero. */
+
+ u32 sample_rate;
+/* Sampling rate of the port.
+ * Supported values:
+ * - #AFE_PORT_SAMPLE_RATE_8K
+ * - #AFE_PORT_SAMPLE_RATE_16K
+ */
+
+ u16 bit_width;
+/* Bit width of the sample.
+ * Supported values: 16
+ */
+
+ u16 num_channels;
+/* Number of channels.
+ * Supported values: 1 to 4
+ */
+
+ u16 slot_number_mapping[4];
+/* Specifies the slot number for the each channel in
+ * multi channel scenario.
+ * Supported values: 1 to 32
+ */
+} __packed;
+
struct afe_param_id_i2s_cfg {
u32 i2s_cfg_minor_version;
u16 bit_width;
@@ -452,6 +622,7 @@ union afe_port_config {
struct afe_param_id_hdmi_multi_chan_audio_cfg hdmi_multi_ch;
struct afe_param_id_slimbus_cfg slim_cfg;
struct afe_param_id_i2s_cfg i2s_cfg;
+ struct afe_param_id_pcm_cfg pcm_cfg;
struct afe_param_id_tdm_cfg tdm_cfg;
} __packed;

@@ -707,6 +878,22 @@ static struct afe_port_map port_maps[AFE_PORT_MAX] = {
QUINARY_TDM_TX_7, 0, 1},
[DISPLAY_PORT_RX] = { AFE_PORT_ID_HDMI_OVER_DP_RX,
DISPLAY_PORT_RX, 1, 1},
+ [PRIMARY_PCM_RX] = { AFE_PORT_ID_PRIMARY_PCM_RX,
+ PRIMARY_PCM_RX, 1, 1},
+ [PRIMARY_PCM_TX] = { AFE_PORT_ID_PRIMARY_PCM_TX,
+ PRIMARY_PCM_RX, 0, 1},
+ [SECONDARY_PCM_RX] = { AFE_PORT_ID_SECONDARY_PCM_RX,
+ SECONDARY_PCM_RX, 1, 1},
+ [SECONDARY_PCM_TX] = { AFE_PORT_ID_SECONDARY_PCM_TX,
+ SECONDARY_PCM_TX, 0, 1},
+ [TERTIARY_PCM_RX] = { AFE_PORT_ID_TERTIARY_PCM_RX,
+ TERTIARY_PCM_RX, 1, 1},
+ [TERTIARY_PCM_TX] = { AFE_PORT_ID_TERTIARY_PCM_TX,
+ TERTIARY_PCM_TX, 0, 1},
+ [QUATERNARY_PCM_RX] = { AFE_PORT_ID_QUATERNARY_PCM_RX,
+ QUATERNARY_PCM_RX, 1, 1},
+ [QUATERNARY_PCM_TX] = { AFE_PORT_ID_QUATERNARY_PCM_TX,
+ QUATERNARY_PCM_TX, 0, 1},
};

static void q6afe_port_free(struct kref *ref)
@@ -993,6 +1180,7 @@ int q6afe_port_set_sysclk(struct q6afe_port *port, int clk_id,
break;
case Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT ... Q6AFE_LPASS_CLK_ID_QUI_MI2S_OSR:
case Q6AFE_LPASS_CLK_ID_MCLK_1 ... Q6AFE_LPASS_CLK_ID_INT_MCLK_1:
+ /* TDM cases overlap with PCM */
case Q6AFE_LPASS_CLK_ID_PRI_TDM_IBIT ... Q6AFE_LPASS_CLK_ID_QUIN_TDM_EBIT:
cset.clk_set_minor_version = AFE_API_VERSION_CLOCK_SET;
cset.clk_id = clk_id;
@@ -1145,6 +1333,54 @@ void q6afe_hdmi_port_prepare(struct q6afe_port *port,
}
EXPORT_SYMBOL_GPL(q6afe_hdmi_port_prepare);

+/**
+ * q6afe_pcm_port_prepare() - Prepare pcm afe port.
+ *
+ * @port: Instance of afe port
+ * @cfg: PCM configuration for the afe port
+ *
+ */
+int q6afe_pcm_port_prepare(struct q6afe_port *port, struct q6afe_pcm_cfg *cfg)
+{
+ union afe_port_config *pcfg = &port->port_cfg;
+
+ pcfg->pcm_cfg.pcm_cfg_minor_version = AFE_API_VERSION_PCM_CONFIG;
+ pcfg->pcm_cfg.aux_mode = AFE_PORT_PCM_AUX_MODE_PCM;
+
+ switch (cfg->fmt & SND_SOC_DAIFMT_MASTER_MASK) {
+ case SND_SOC_DAIFMT_CBS_CFS:
+ pcfg->pcm_cfg.sync_src = AFE_PORT_PCM_SYNC_SRC_INTERNAL;
+ break;
+ case SND_SOC_DAIFMT_CBM_CFM:
+ /* CPU is slave */
+ pcfg->pcm_cfg.sync_src = AFE_PORT_PCM_SYNC_SRC_EXTERNAL;
+ break;
+ default:
+ break;
+ }
+
+ switch (cfg->sample_rate) {
+ case 8000:
+ pcfg->pcm_cfg.frame_setting = AFE_PORT_PCM_BITS_PER_FRAME_128;
+ break;
+ case 16000:
+ pcfg->pcm_cfg.frame_setting = AFE_PORT_PCM_BITS_PER_FRAME_64;
+ break;
+ }
+ pcfg->pcm_cfg.quantype = AFE_PORT_PCM_LINEAR_NOPADDING;
+ pcfg->pcm_cfg.ctrl_data_out_enable = AFE_PORT_PCM_CTRL_DATA_OE_DISABLE;
+ pcfg->pcm_cfg.reserved = 0;
+ pcfg->pcm_cfg.sample_rate = cfg->sample_rate;
+
+ /* 16 bit mono */
+ pcfg->pcm_cfg.bit_width = 16;
+ pcfg->pcm_cfg.num_channels = 1;
+ pcfg->pcm_cfg.slot_number_mapping[0] = 1;
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(q6afe_pcm_port_prepare);
+
/**
* q6afe_i2s_port_prepare() - Prepare i2s afe port.
*
@@ -1417,6 +1653,16 @@ struct q6afe_port *q6afe_port_get_from_id(struct device *dev, int id)
case AFE_PORT_ID_QUATERNARY_MI2S_TX:
cfg_type = AFE_PARAM_ID_I2S_CONFIG;
break;
+ case AFE_PORT_ID_PRIMARY_PCM_RX:
+ case AFE_PORT_ID_PRIMARY_PCM_TX:
+ case AFE_PORT_ID_SECONDARY_PCM_RX:
+ case AFE_PORT_ID_SECONDARY_PCM_TX:
+ case AFE_PORT_ID_TERTIARY_PCM_RX:
+ case AFE_PORT_ID_TERTIARY_PCM_TX:
+ case AFE_PORT_ID_QUATERNARY_PCM_RX:
+ case AFE_PORT_ID_QUATERNARY_PCM_TX:
+ cfg_type = AFE_PARAM_ID_PCM_CONFIG;
+ break;
case AFE_PORT_ID_PRIMARY_TDM_RX ... AFE_PORT_ID_QUINARY_TDM_TX_7:
cfg_type = AFE_PARAM_ID_TDM_CONFIG;
break;
diff --git a/sound/soc/qcom/qdsp6/q6afe.h b/sound/soc/qcom/qdsp6/q6afe.h
index c7ed5422baff..c832be6d0ff5 100644
--- a/sound/soc/qcom/qdsp6/q6afe.h
+++ b/sound/soc/qcom/qdsp6/q6afe.h
@@ -5,7 +5,7 @@

#include <dt-bindings/sound/qcom,q6afe.h>

-#define AFE_PORT_MAX 105
+#define AFE_PORT_MAX 113

#define MSM_AFE_PORT_TYPE_RX 0
#define MSM_AFE_PORT_TYPE_TX 1
@@ -170,6 +170,11 @@ struct q6afe_i2s_cfg {
int fmt;
};

+struct q6afe_pcm_cfg {
+ u32 sample_rate;
+ int fmt;
+};
+
struct q6afe_tdm_cfg {
u16 num_channels;
u32 sample_rate;
@@ -188,6 +193,7 @@ struct q6afe_port_config {
struct q6afe_hdmi_cfg hdmi;
struct q6afe_slim_cfg slim;
struct q6afe_i2s_cfg i2s_cfg;
+ struct q6afe_pcm_cfg pcm_cfg;
struct q6afe_tdm_cfg tdm;
};

@@ -203,6 +209,7 @@ void q6afe_hdmi_port_prepare(struct q6afe_port *port,
void q6afe_slim_port_prepare(struct q6afe_port *port,
struct q6afe_slim_cfg *cfg);
int q6afe_i2s_port_prepare(struct q6afe_port *port, struct q6afe_i2s_cfg *cfg);
+int q6afe_pcm_port_prepare(struct q6afe_port *port, struct q6afe_pcm_cfg *cfg);
void q6afe_tdm_port_prepare(struct q6afe_port *port, struct q6afe_tdm_cfg *cfg);

int q6afe_port_set_sysclk(struct q6afe_port *port, int clk_id,
--
2.21.1

2020-02-09 15:49:57

by Adam Serbinski

[permalink] [raw]
Subject: [PATCH v2 3/8] ASoC: qdsp6: q6afe-dai: add support to pcm port dais

This patch adds support of AFE DAI for PCM port.

Signed-off-by: Adam Serbinski <[email protected]>
CC: Andy Gross <[email protected]>
CC: Mark Rutland <[email protected]>
CC: Liam Girdwood <[email protected]>
CC: Patrick Lai <[email protected]>
CC: Banajit Goswami <[email protected]>
CC: Jaroslav Kysela <[email protected]>
CC: Takashi Iwai <[email protected]>
CC: [email protected]
CC: [email protected]
CC: [email protected]
CC: [email protected]
---
sound/soc/qcom/qdsp6/q6afe-dai.c | 198 ++++++++++++++++++++++++++++++-
1 file changed, 197 insertions(+), 1 deletion(-)

diff --git a/sound/soc/qcom/qdsp6/q6afe-dai.c b/sound/soc/qcom/qdsp6/q6afe-dai.c
index c1a7624eaf17..23b29591ef47 100644
--- a/sound/soc/qcom/qdsp6/q6afe-dai.c
+++ b/sound/soc/qcom/qdsp6/q6afe-dai.c
@@ -151,6 +151,28 @@ static int q6hdmi_hw_params(struct snd_pcm_substream *substream,
return 0;
}

+static int q6pcm_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
+{
+ struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
+ struct q6afe_pcm_cfg *pcm = &dai_data->port_config[dai->id].pcm_cfg;
+
+ pcm->sample_rate = params_rate(params);
+
+ return 0;
+}
+
+static int q6pcm_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
+{
+ struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
+ struct q6afe_pcm_cfg *pcm = &dai_data->port_config[dai->id].pcm_cfg;
+
+ pcm->fmt = fmt;
+
+ return 0;
+}
+
static int q6i2s_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
@@ -358,6 +380,15 @@ static int q6afe_dai_prepare(struct snd_pcm_substream *substream,
return rc;
}
break;
+ case PRIMARY_PCM_RX ... QUATERNARY_PCM_TX:
+ rc = q6afe_pcm_port_prepare(dai_data->port[dai->id],
+ &dai_data->port_config[dai->id].pcm_cfg);
+ if (rc < 0) {
+ dev_err(dai->dev, "fail to prepare AFE port %x\n",
+ dai->id);
+ return rc;
+ }
+ break;
case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7:
q6afe_tdm_port_prepare(dai_data->port[dai->id],
&dai_data->port_config[dai->id].tdm);
@@ -429,11 +460,32 @@ static int q6afe_mi2s_set_sysclk(struct snd_soc_dai *dai,
Q6AFE_LPASS_CLK_ROOT_DEFAULT,
freq, dir);
case Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT ... Q6AFE_LPASS_CLK_ID_QUI_MI2S_OSR:
+ case Q6AFE_LPASS_CLK_ID_PRI_PCM_IBIT ... Q6AFE_LPASS_CLK_ID_QUI_PCM_OSR:
case Q6AFE_LPASS_CLK_ID_MCLK_1 ... Q6AFE_LPASS_CLK_ID_INT_MCLK_1:
return q6afe_port_set_sysclk(port, clk_id,
Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
Q6AFE_LPASS_CLK_ROOT_DEFAULT,
freq, dir);
+ }
+
+ return 0;
+}
+
+static int q6afe_tdm_set_sysclk(struct snd_soc_dai *dai,
+ int clk_id, unsigned int freq, int dir)
+{
+ struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
+ struct q6afe_port *port = dai_data->port[dai->id];
+
+ switch (clk_id) {
+ case LPAIF_DIG_CLK:
+ return q6afe_port_set_sysclk(port, clk_id, 0, 5, freq, dir);
+ case LPAIF_BIT_CLK:
+ case LPAIF_OSR_CLK:
+ return q6afe_port_set_sysclk(port, clk_id,
+ Q6AFE_LPASS_CLK_SRC_INTERNAL,
+ Q6AFE_LPASS_CLK_ROOT_DEFAULT,
+ freq, dir);
case Q6AFE_LPASS_CLK_ID_PRI_TDM_IBIT ... Q6AFE_LPASS_CLK_ID_QUIN_TDM_EBIT:
return q6afe_port_set_sysclk(port, clk_id,
Q6AFE_LPASS_CLK_ATTRIBUTE_INVERT_COUPLE_NO,
@@ -468,6 +520,11 @@ static const struct snd_soc_dapm_route q6afe_dapm_routes[] = {
{"Tertiary MI2S Playback", NULL, "TERT_MI2S_RX"},
{"Quaternary MI2S Playback", NULL, "QUAT_MI2S_RX"},

+ {"Primary PCM Playback", NULL, "PRI_PCM_RX"},
+ {"Secondary PCM Playback", NULL, "SEC_PCM_RX"},
+ {"Tertiary PCM Playback", NULL, "TERT_PCM_RX"},
+ {"Quaternary PCM Playback", NULL, "QUAT_PCM_RX"},
+
{"Primary TDM0 Playback", NULL, "PRIMARY_TDM_RX_0"},
{"Primary TDM1 Playback", NULL, "PRIMARY_TDM_RX_1"},
{"Primary TDM2 Playback", NULL, "PRIMARY_TDM_RX_2"},
@@ -562,6 +619,11 @@ static const struct snd_soc_dapm_route q6afe_dapm_routes[] = {
{"PRI_MI2S_TX", NULL, "Primary MI2S Capture"},
{"SEC_MI2S_TX", NULL, "Secondary MI2S Capture"},
{"QUAT_MI2S_TX", NULL, "Quaternary MI2S Capture"},
+
+ {"PRI_PCM_TX", NULL, "Primary PCM Capture"},
+ {"SEC_PCM_TX", NULL, "Secondary PCM Capture"},
+ {"TERT_PCM_TX", NULL, "Tertiary PCM Capture"},
+ {"QUAT_PCM_TX", NULL, "Quaternary PCM Capture"},
};

static const struct snd_soc_dai_ops q6hdmi_ops = {
@@ -578,6 +640,14 @@ static const struct snd_soc_dai_ops q6i2s_ops = {
.set_sysclk = q6afe_mi2s_set_sysclk,
};

+static const struct snd_soc_dai_ops q6pcm_ops = {
+ .prepare = q6afe_dai_prepare,
+ .hw_params = q6pcm_hw_params,
+ .set_fmt = q6pcm_set_fmt,
+ .shutdown = q6afe_dai_shutdown,
+ .set_sysclk = q6afe_mi2s_set_sysclk,
+};
+
static const struct snd_soc_dai_ops q6slim_ops = {
.prepare = q6afe_dai_prepare,
.hw_params = q6slim_hw_params,
@@ -588,7 +658,7 @@ static const struct snd_soc_dai_ops q6slim_ops = {
static const struct snd_soc_dai_ops q6tdm_ops = {
.prepare = q6afe_dai_prepare,
.shutdown = q6afe_dai_shutdown,
- .set_sysclk = q6afe_mi2s_set_sysclk,
+ .set_sysclk = q6afe_tdm_set_sysclk,
.set_tdm_slot = q6tdm_set_tdm_slot,
.set_channel_map = q6tdm_set_channel_map,
.hw_params = q6tdm_hw_params,
@@ -1012,6 +1082,115 @@ static struct snd_soc_dai_driver q6afe_dais[] = {
.ops = &q6i2s_ops,
.probe = msm_dai_q6_dai_probe,
.remove = msm_dai_q6_dai_remove,
+ }, {
+ .playback = {
+ .stream_name = "Primary PCM Playback",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE,
+ .rate_min = 8000,
+ .rate_max = 16000,
+ },
+ .id = PRIMARY_PCM_RX,
+ .name = "PRI_PCM_RX",
+ .ops = &q6pcm_ops,
+ .probe = msm_dai_q6_dai_probe,
+ .remove = msm_dai_q6_dai_remove,
+ }, {
+ .capture = {
+ .stream_name = "Primary PCM Capture",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE,
+ .rate_min = 8000,
+ .rate_max = 16000,
+ },
+ .id = PRIMARY_PCM_TX,
+ .name = "PRI_PCM_TX",
+ .ops = &q6pcm_ops,
+ .probe = msm_dai_q6_dai_probe,
+ .remove = msm_dai_q6_dai_remove,
+ }, {
+ .playback = {
+ .stream_name = "Secondary PCM Playback",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .rate_min = 8000,
+ .rate_max = 16000,
+ },
+ .name = "SEC_PCM_RX",
+ .id = SECONDARY_PCM_RX,
+ .ops = &q6pcm_ops,
+ .probe = msm_dai_q6_dai_probe,
+ .remove = msm_dai_q6_dai_remove,
+ }, {
+ .capture = {
+ .stream_name = "Secondary PCM Capture",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE,
+ .rate_min = 8000,
+ .rate_max = 16000,
+ },
+ .id = SECONDARY_PCM_TX,
+ .name = "SEC_PCM_TX",
+ .ops = &q6pcm_ops,
+ .probe = msm_dai_q6_dai_probe,
+ .remove = msm_dai_q6_dai_remove,
+ }, {
+ .playback = {
+ .stream_name = "Tertiary PCM Playback",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .rate_min = 8000,
+ .rate_max = 16000,
+ },
+ .name = "TERT_PCM_RX",
+ .id = TERTIARY_PCM_RX,
+ .ops = &q6pcm_ops,
+ .probe = msm_dai_q6_dai_probe,
+ .remove = msm_dai_q6_dai_remove,
+ }, {
+ .capture = {
+ .stream_name = "Tertiary PCM Capture",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE,
+ .rate_min = 8000,
+ .rate_max = 16000,
+ },
+ .id = TERTIARY_PCM_TX,
+ .name = "TERT_PCM_TX",
+ .ops = &q6pcm_ops,
+ .probe = msm_dai_q6_dai_probe,
+ .remove = msm_dai_q6_dai_remove,
+ }, {
+ .playback = {
+ .stream_name = "Quaternary PCM Playback",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .rate_min = 8000,
+ .rate_max = 16000,
+ },
+ .name = "QUAT_PCM_RX",
+ .id = QUATERNARY_PCM_RX,
+ .ops = &q6pcm_ops,
+ .probe = msm_dai_q6_dai_probe,
+ .remove = msm_dai_q6_dai_remove,
+ }, {
+ .capture = {
+ .stream_name = "Quaternary PCM Capture",
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE,
+ .rate_min = 8000,
+ .rate_max = 16000,
+ },
+ .id = QUATERNARY_PCM_TX,
+ .name = "QUAT_PCM_TX",
+ .ops = &q6pcm_ops,
+ .probe = msm_dai_q6_dai_probe,
+ .remove = msm_dai_q6_dai_remove,
},
Q6AFE_TDM_PB_DAI("Primary", 0, PRIMARY_TDM_RX_0),
Q6AFE_TDM_PB_DAI("Primary", 1, PRIMARY_TDM_RX_1),
@@ -1169,6 +1348,23 @@ static const struct snd_soc_dapm_widget q6afe_dai_widgets[] = {
SND_SOC_DAPM_AIF_OUT("PRI_MI2S_TX", NULL,
0, 0, 0, 0),

+ SND_SOC_DAPM_AIF_IN("QUAT_PCM_RX", NULL,
+ 0, 0, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("QUAT_PCM_TX", NULL,
+ 0, 0, 0, 0),
+ SND_SOC_DAPM_AIF_IN("TERT_PCM_RX", NULL,
+ 0, 0, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("TERT_PCM_TX", NULL,
+ 0, 0, 0, 0),
+ SND_SOC_DAPM_AIF_IN("SEC_PCM_RX", NULL,
+ 0, 0, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("SEC_PCM_TX", NULL,
+ 0, 0, 0, 0),
+ SND_SOC_DAPM_AIF_IN("PRI_PCM_RX", NULL,
+ 0, 0, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("PRI_PCM_TX", NULL,
+ 0, 0, 0, 0),
+
SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_0", NULL,
0, 0, 0, 0),
SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_1", NULL,
--
2.21.1

2020-02-09 15:50:31

by Adam Serbinski

[permalink] [raw]
Subject: [PATCH v2 7/8] arm64: dts: qcom: db820c: Enable primary PCM and quaternary I2S

This patch adds support to primary pcm and quaternary i2s ports.

Signed-off-by: Adam Serbinski <[email protected]>
CC: Andy Gross <[email protected]>
CC: Mark Rutland <[email protected]>
CC: Liam Girdwood <[email protected]>
CC: Patrick Lai <[email protected]>
CC: Banajit Goswami <[email protected]>
CC: Jaroslav Kysela <[email protected]>
CC: Takashi Iwai <[email protected]>
CC: [email protected]
CC: [email protected]
CC: [email protected]
CC: [email protected]
---
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 113 +++++++++++++
arch/arm64/boot/dts/qcom/msm8996-pins.dtsi | 162 +++++++++++++++++++
2 files changed, 275 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
index dba3488492f1..4149ac4147a0 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
@@ -683,8 +683,31 @@
};
};

+/* PRI I2S on QCA6174 and QUAT I2S on LS each uses 2 I2S SD Lines for audio */
+&q6afedai {
+ pi2s@16 {
+ reg = <16>;
+ qcom,sd-lines = <1>;
+ };
+ pi2s@17 {
+ reg = <17>;
+ qcom,sd-lines = <0>;
+ };
+ qi2s@22 {
+ reg = <22>;
+ qcom,sd-lines = <0>;
+ };
+ qi2s@23 {
+ reg = <23>;
+ qcom,sd-lines = <1>;
+ };
+};
+
&sound {
compatible = "qcom,apq8096-sndcard";
+ pinctrl-0 = <&quat_mi2s_active &quat_mi2s_sd0_active &quat_mi2s_sd1_active &pri_mi2s_active &pri_mi2s_sd0_active &pri_mi2s_sd1_active>;
+ pinctrl-names = "default";
+
model = "DB820c";
audio-routing = "RX_BIAS", "MCLK";

@@ -709,6 +732,41 @@
};
};

+ mm4-dai-link {
+ link-name = "MultiMedia4";
+ cpu {
+ sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>;
+ };
+ };
+
+ mm5-dai-link {
+ link-name = "MultiMedia5";
+ cpu {
+ sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA5>;
+ };
+ };
+
+ mm6-dai-link {
+ link-name = "MultiMedia6";
+ cpu {
+ sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA6>;
+ };
+ };
+
+ mm7-dai-link {
+ link-name = "MultiMedia7";
+ cpu {
+ sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA7>;
+ };
+ };
+
+ mm8-dai-link {
+ link-name = "MultiMedia8";
+ cpu {
+ sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA8>;
+ };
+ };
+
hdmi-dai-link {
link-name = "HDMI";
cpu {
@@ -753,4 +811,59 @@
sound-dai = <&wcd9335 1>;
};
};
+
+ scoplay-dai-link {
+ link-name = "SCO-PCM-Playback";
+ cpu {
+ sound-dai = <&q6afedai PRIMARY_PCM_RX>;
+ };
+
+ platform {
+ sound-dai = <&q6routing>;
+ };
+ };
+
+ scocap-dai-link {
+ link-name = "SCO-PCM-Capture";
+ cpu {
+ sound-dai = <&q6afedai PRIMARY_PCM_TX>;
+ };
+
+ platform {
+ sound-dai = <&q6routing>;
+ };
+ };
+
+ mi2splay-dai-link {
+ link-name = "QUAT-MI2S-Playback";
+ cpu {
+ sound-dai = <&q6afedai QUATERNARY_MI2S_RX>;
+ };
+
+ platform {
+ sound-dai = <&q6routing>;
+ };
+
+// EXAMPLE: For adding real codecs
+// codec {
+// sound-dai = <&pcm5142_4c>, <&pcm5142_4d>;
+// };
+
+ };
+
+ mi2scap-dai-link {
+ link-name = "QUAT-MI2S-Capture";
+ cpu {
+ sound-dai = <&q6afedai QUATERNARY_MI2S_TX>;
+ };
+
+ platform {
+ sound-dai = <&q6routing>;
+ };
+
+// EXAMPLE: For adding real codecs
+// codec {
+// sound-dai = <&pcm1865>;
+// };
+ };
};
diff --git a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi
index ac1ede579361..e8221c4d05f7 100644
--- a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi
@@ -288,6 +288,168 @@
};
};

+ pri_mi2s_active: pri_mi2s_active {
+ mux {
+ pins = "gpio65", "gpio66";
+ function = "pri_mi2s";
+ };
+ config {
+ pins = "gpio65", "gpio66";
+ drive-strength = <8>; /* 8 mA */
+ bias-disable; /* NO PULL */
+ output-high;
+ };
+ };
+
+ pri_mi2s_sleep: pri_mi2s_sleep {
+ mux {
+ pins = "gpio65", "gpio66";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio65", "gpio66";
+ drive-strength = <2>; /* 2 mA */
+ bias-pull-down; /* PULL DOWN */
+ input-enable;
+ };
+ };
+
+ pri_mi2s_sd0_sleep: pri_mi2s_sd0_sleep {
+ mux {
+ pins = "gpio67";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio67";
+ drive-strength = <2>; /* 2 mA */
+ bias-pull-down; /* PULL DOWN */
+ input-enable;
+ };
+ };
+
+ pri_mi2s_sd0_active: pri_mi2s_sd0_active {
+ mux {
+ pins = "gpio67";
+ function = "pri_mi2s";
+ };
+
+ config {
+ pins = "gpio67";
+ drive-strength = <8>; /* 8 mA */
+ bias-disable; /* NO PULL */
+ };
+ };
+
+ pri_mi2s_sd1_sleep: pri_mi2s_sd1_sleep {
+ mux {
+ pins = "gpio68";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio68";
+ drive-strength = <2>; /* 2 mA */
+ bias-pull-down; /* PULL DOWN */
+ input-enable;
+ };
+ };
+
+ pri_mi2s_sd1_active: pri_mi2s_sd1_active {
+ mux {
+ pins = "gpio68";
+ function = "pri_mi2s";
+ };
+
+ config {
+ pins = "gpio68";
+ drive-strength = <8>; /* 8 mA */
+ bias-disable; /* NO PULL */
+ };
+ };
+
+ quat_mi2s_active: quat_mi2s_active {
+ mux {
+ pins = "gpio58", "gpio59";
+ function = "qua_mi2s";
+ };
+ config {
+ pins = "gpio58", "gpio59";
+ drive-strength = <8>; /* 8 mA */
+ bias-disable; /* NO PULL */
+ output-high;
+ };
+ };
+
+ quat_mi2s_sleep: quat_mi2s_sleep {
+ mux {
+ pins = "gpio58", "gpio59";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio58", "gpio59";
+ drive-strength = <2>; /* 2 mA */
+ bias-pull-down; /* PULL DOWN */
+ input-enable;
+ };
+ };
+
+ quat_mi2s_sd0_sleep: quat_mi2s_sd0_sleep {
+ mux {
+ pins = "gpio60";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio60";
+ drive-strength = <2>; /* 2 mA */
+ bias-pull-down; /* PULL DOWN */
+ input-enable;
+ };
+ };
+
+ quat_mi2s_sd0_active: quat_mi2s_sd0_active {
+ mux {
+ pins = "gpio60";
+ function = "qua_mi2s";
+ };
+
+ config {
+ pins = "gpio60";
+ drive-strength = <8>; /* 8 mA */
+ bias-disable; /* NO PULL */
+ };
+ };
+
+ quat_mi2s_sd1_sleep: quat_mi2s_sd1_sleep {
+ mux {
+ pins = "gpio61";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio61";
+ drive-strength = <2>; /* 2 mA */
+ bias-pull-down; /* PULL DOWN */
+ input-enable;
+ };
+ };
+
+ quat_mi2s_sd1_active: quat_mi2s_sd1_active {
+ mux {
+ pins = "gpio61";
+ function = "qua_mi2s";
+ };
+
+ config {
+ pins = "gpio61";
+ drive-strength = <8>; /* 8 mA */
+ bias-disable; /* NO PULL */
+ };
+ };
+
sdc2_clk_on: sdc2_clk_on {
config {
pins = "sdc2_clk";
--
2.21.1

2020-02-10 12:19:07

by Mark Brown

[permalink] [raw]
Subject: Re: [PATCH v2 0/8] ASoC: qdsp6: db820c: Add support for external and bluetooth audio

On Sun, Feb 09, 2020 at 10:47:40AM -0500, Adam Serbinski wrote:
> Changes from V1:
>
> Rename patch:
> from: dts: msm8996/db820c: enable primary pcm and quaternary i2s

Please don't send new serieses in reply to old ones, it can make it
confusing what's going on and what the current version is.


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2020-02-10 13:33:37

by Mark Brown

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Subject: Re: [PATCH v2 2/8] ASoC: qdsp6: q6afe: add support to pcm ports

On Sun, Feb 09, 2020 at 10:47:42AM -0500, Adam Serbinski wrote:

>
> +#define AFE_API_VERSION_PCM_CONFIG 0x1
> +/* Enumeration for the auxiliary PCM synchronization signal
> + * provided by an external source.
> + */
> +
> +#define AFE_PORT_PCM_SYNC_SRC_EXTERNAL 0x0
> +/* Enumeration for the auxiliary PCM synchronization signal
> + * provided by an internal source.
> + */

This is a *weird* commenting style for these #defines and it's not
consistent within the block, I'm seeing at least 3 different styles.

> +/* Payload of the #AFE_PARAM_ID_PCM_CONFIG command's
> + * (PCM configuration parameter).
> + */
> +
> +struct afe_param_id_pcm_cfg {

Similar weird commenting here, please follow coding-style.rst.

> + switch (cfg->fmt & SND_SOC_DAIFMT_MASTER_MASK) {
> + case SND_SOC_DAIFMT_CBS_CFS:
> + pcfg->pcm_cfg.sync_src = AFE_PORT_PCM_SYNC_SRC_INTERNAL;
> + break;
> + case SND_SOC_DAIFMT_CBM_CFM:
> + /* CPU is slave */
> + pcfg->pcm_cfg.sync_src = AFE_PORT_PCM_SYNC_SRC_EXTERNAL;
> + break;
> + default:
> + break;
> + }

Why is this not returning an error on unsupported values?

> +
> + switch (cfg->sample_rate) {
> + case 8000:
> + pcfg->pcm_cfg.frame_setting = AFE_PORT_PCM_BITS_PER_FRAME_128;
> + break;
> + case 16000:
> + pcfg->pcm_cfg.frame_setting = AFE_PORT_PCM_BITS_PER_FRAME_64;
> + break;
> + }

Same here.


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2020-02-10 13:36:16

by Mark Brown

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Subject: Re: [PATCH v2 3/8] ASoC: qdsp6: q6afe-dai: add support to pcm port dais

On Sun, Feb 09, 2020 at 10:47:43AM -0500, Adam Serbinski wrote:

> +static int q6pcm_hw_params(struct snd_pcm_substream *substream,
> + struct snd_pcm_hw_params *params,
> + struct snd_soc_dai *dai)
> +{
> + struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
> + struct q6afe_pcm_cfg *pcm = &dai_data->port_config[dai->id].pcm_cfg;
> +
> + pcm->sample_rate = params_rate(params);
> +

This and set_fmt() don't do any validation of the value being set.

> static const struct snd_soc_dai_ops q6tdm_ops = {
> .prepare = q6afe_dai_prepare,
> .shutdown = q6afe_dai_shutdown,
> - .set_sysclk = q6afe_mi2s_set_sysclk,
> + .set_sysclk = q6afe_tdm_set_sysclk,
> .set_tdm_slot = q6tdm_set_tdm_slot,
> .set_channel_map = q6tdm_set_channel_map,
> .hw_params = q6tdm_hw_params,

This looks like a separate bug fix that should be split out?

> + }, {
> + .playback = {
> + .stream_name = "Primary PCM Playback",
> + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
> + .formats = SNDRV_PCM_FMTBIT_S16_LE |
> + SNDRV_PCM_FMTBIT_S24_LE,
> + .rate_min = 8000,
> + .rate_max = 16000,
> + },

It is surprising to see rate_min and rate_max specified when we're not
using _KNOT, and again there's weird formatting here with the tabs
before the rate values.


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2020-02-10 13:37:38

by Mark Brown

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Subject: Re: [PATCH v2 6/8] ASoC: qcom/common: Use snd-soc-dummy-dai when codec is not specified

On Sun, Feb 09, 2020 at 10:47:46AM -0500, Adam Serbinski wrote:

> When not specifying a codec, use snd-soc-dummy-dai. This supports
> the case where a fixed configuration codec is attached, such as
> bluetooth hfp.

Fixed configuration devices should still have normal drivers that say
what those fixed configurations are.


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2020-02-10 13:44:55

by Adam Serbinski

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Subject: Re: [PATCH v2 0/8] ASoC: qdsp6: db820c: Add support for external and bluetooth audio

On 2020-02-10 07:17, Mark Brown wrote:
> On Sun, Feb 09, 2020 at 10:47:40AM -0500, Adam Serbinski wrote:
>> Changes from V1:
>>
>> Rename patch:
>> from: dts: msm8996/db820c: enable primary pcm and quaternary i2s
>
> Please don't send new serieses in reply to old ones, it can make it
> confusing what's going on and what the current version is.

My apologies. Its my first time doing this. Thank you for the advice.

-Adam

2020-02-10 14:51:39

by Adam Serbinski

[permalink] [raw]
Subject: Re: [PATCH v2 2/8] ASoC: qdsp6: q6afe: add support to pcm ports

On 2020-02-10 08:31, Mark Brown wrote:
> On Sun, Feb 09, 2020 at 10:47:42AM -0500, Adam Serbinski wrote:
>
>>
>> +#define AFE_API_VERSION_PCM_CONFIG 0x1
>> +/* Enumeration for the auxiliary PCM synchronization signal
>> + * provided by an external source.
>> + */
>> +
>> +#define AFE_PORT_PCM_SYNC_SRC_EXTERNAL 0x0
>> +/* Enumeration for the auxiliary PCM synchronization signal
>> + * provided by an internal source.
>> + */
>
> This is a *weird* commenting style for these #defines and it's not
> consistent within the block, I'm seeing at least 3 different styles.

I will clean up the commenting.


>> + default:
>> + break;
>> + }
>
> Why is this not returning an error on unsupported values?

Only to be consistent with the pre-existing implementation for i2s
ports.
I will add an error return.

>
>> +
>> + switch (cfg->sample_rate) {
>> + case 8000:
>> + pcfg->pcm_cfg.frame_setting = AFE_PORT_PCM_BITS_PER_FRAME_128;
>> + break;
>> + case 16000:
>> + pcfg->pcm_cfg.frame_setting = AFE_PORT_PCM_BITS_PER_FRAME_64;
>> + break;
>> + }
>
> Same here.

I will also add the error return here.

2020-02-10 17:14:08

by Srinivas Kandagatla

[permalink] [raw]
Subject: Re: [PATCH v2 3/8] ASoC: qdsp6: q6afe-dai: add support to pcm port dais

Few minor comments

On 09/02/2020 15:47, Adam Serbinski wrote:
> This patch adds support of AFE DAI for PCM port.
>
> Signed-off-by: Adam Serbinski <[email protected]>
> CC: Andy Gross <[email protected]>
> CC: Mark Rutland <[email protected]>
> CC: Liam Girdwood <[email protected]>
> CC: Patrick Lai <[email protected]>
> CC: Banajit Goswami <[email protected]>
> CC: Jaroslav Kysela <[email protected]>
> CC: Takashi Iwai <[email protected]>
> CC: [email protected]
> CC: [email protected]
> CC: [email protected]
> CC: [email protected]
> ---
> sound/soc/qcom/qdsp6/q6afe-dai.c | 198 ++++++++++++++++++++++++++++++-
> 1 file changed, 197 insertions(+), 1 deletion(-)
>
> diff --git a/sound/soc/qcom/qdsp6/q6afe-dai.c b/sound/soc/qcom/qdsp6/q6afe-dai.c
> index c1a7624eaf17..23b29591ef47 100644
> --- a/sound/soc/qcom/qdsp6/q6afe-dai.c
> +++ b/sound/soc/qcom/qdsp6/q6afe-dai.c

...

> +static int q6afe_tdm_set_sysclk(struct snd_soc_dai *dai,
> + int clk_id, unsigned int freq, int dir)
> +{

Why are we adding exactly duplicate function of q6afe_mi2s_set_sysclk here?

> + struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
> + struct q6afe_port *port = dai_data->port[dai->id];
> +
> + switch (clk_id) {
> + case LPAIF_DIG_CLK:
> + return q6afe_port_set_sysclk(port, clk_id, 0, 5, freq, dir);
> + case LPAIF_BIT_CLK:
> + case LPAIF_OSR_CLK:
> + return q6afe_port_set_sysclk(port, clk_id,
> + Q6AFE_LPASS_CLK_SRC_INTERNAL,
> + Q6AFE_LPASS_CLK_ROOT_DEFAULT,
> + freq, dir);
> case Q6AFE_LPASS_CLK_ID_PRI_TDM_IBIT ... Q6AFE_LPASS_CLK_ID_QUIN_TDM_EBIT:
> return q6afe_port_set_sysclk(port, clk_id,
> Q6AFE_LPASS_CLK_ATTRIBUTE_INVERT_COUPLE_NO,
> @@ -468,6 +520,11 @@ static const struct snd_soc_dapm_route q6afe_dapm_routes[] = {
> {"Tertiary MI2S Playback", NULL, "TERT_MI2S_RX"},
> {"Quaternary MI2S Playback", NULL, "QUAT_MI2S_RX"},
>
> + {"Primary PCM Playback", NULL, "PRI_PCM_RX"},
> + {"Secondary PCM Playback", NULL, "SEC_PCM_RX"},
> + {"Tertiary PCM Playback", NULL, "TERT_PCM_RX"},
> + {"Quaternary PCM Playback", NULL, "QUAT_PCM_RX"},
> +
> {"Primary TDM0 Playback", NULL, "PRIMARY_TDM_RX_0"},
> {"Primary TDM1 Playback", NULL, "PRIMARY_TDM_RX_1"},
> {"Primary TDM2 Playback", NULL, "PRIMARY_TDM_RX_2"},
> @@ -562,6 +619,11 @@ static const struct snd_soc_dapm_route q6afe_dapm_routes[] = {
> {"PRI_MI2S_TX", NULL, "Primary MI2S Capture"},
> {"SEC_MI2S_TX", NULL, "Secondary MI2S Capture"},
> {"QUAT_MI2S_TX", NULL, "Quaternary MI2S Capture"},
> +
> + {"PRI_PCM_TX", NULL, "Primary PCM Capture"},
> + {"SEC_PCM_TX", NULL, "Secondary PCM Capture"},
> + {"TERT_PCM_TX", NULL, "Tertiary PCM Capture"},
> + {"QUAT_PCM_TX", NULL, "Quaternary PCM Capture"},
> };
>

...

>
> + SND_SOC_DAPM_AIF_IN("QUAT_PCM_RX", NULL,
> + 0, 0, 0, 0),

This can be in single line, same for below


> + SND_SOC_DAPM_AIF_OUT("QUAT_PCM_TX", NULL,
> + 0, 0, 0, 0),
> + SND_SOC_DAPM_AIF_IN("TERT_PCM_RX", NULL,
> + 0, 0, 0, 0),
> + SND_SOC_DAPM_AIF_OUT("TERT_PCM_TX", NULL,
> + 0, 0, 0, 0),
> + SND_SOC_DAPM_AIF_IN("SEC_PCM_RX", NULL,
> + 0, 0, 0, 0),
> + SND_SOC_DAPM_AIF_OUT("SEC_PCM_TX", NULL,
> + 0, 0, 0, 0),
> + SND_SOC_DAPM_AIF_IN("PRI_PCM_RX", NULL,
> + 0, 0, 0, 0),
> + SND_SOC_DAPM_AIF_OUT("PRI_PCM_TX", NULL,
> + 0, 0, 0, 0),
> +

2020-02-10 17:14:09

by Srinivas Kandagatla

[permalink] [raw]
Subject: Re: [PATCH v2 2/8] ASoC: qdsp6: q6afe: add support to pcm ports



On 09/02/2020 15:47, Adam Serbinski wrote:
> This patch adds support to pcm ports in AFE.
>
> Signed-off-by: Adam Serbinski <[email protected]>
> CC: Andy Gross <[email protected]>
> CC: Mark Rutland <[email protected]>
> CC: Liam Girdwood <[email protected]>
> CC: Patrick Lai <[email protected]>
> CC: Banajit Goswami <[email protected]>
> CC: Jaroslav Kysela <[email protected]>
> CC: Takashi Iwai <[email protected]>
> CC: [email protected]
> CC: [email protected]
> CC: [email protected]
> CC: [email protected]
> ---
> sound/soc/qcom/qdsp6/q6afe.c | 246 +++++++++++++++++++++++++++++++++++
> sound/soc/qcom/qdsp6/q6afe.h | 9 +-
> 2 files changed, 254 insertions(+), 1 deletion(-)
>

Few general comments.

1>documentation to "struct afe_param_id_pcm_cfg "
Either we follow kerneldoc style or not add this as we did with other
similar afe port config structures.
Am okay either way!

2> some of the defines in this patch has no reals users, so we better
remove all the unused constants.





> diff --git a/sound/soc/qcom/qdsp6/q6afe.c b/sound/soc/qcom/qdsp6/q6afe.c
> index e0945f7a58c8..b53ad14a78fd 100644
> --- a/sound/soc/qcom/qdsp6/q6afe.c
> +++ b/sound/soc/qcom/qdsp6/q6afe.c
> @@ -40,6 +40,7 @@
>
...

> +/**
> + * q6afe_pcm_port_prepare() - Prepare pcm afe port.
> + *
> + * @port: Instance of afe port
> + * @cfg: PCM configuration for the afe port
> + *
> + */
> +int q6afe_pcm_port_prepare(struct q6afe_port *port, struct q6afe_pcm_cfg *cfg)
> +{
> + union afe_port_config *pcfg = &port->port_cfg;
> +
> + pcfg->pcm_cfg.pcm_cfg_minor_version = AFE_API_VERSION_PCM_CONFIG;
> + pcfg->pcm_cfg.aux_mode = AFE_PORT_PCM_AUX_MODE_PCM;
> +
> + switch (cfg->fmt & SND_SOC_DAIFMT_MASTER_MASK) {
> + case SND_SOC_DAIFMT_CBS_CFS:
> + pcfg->pcm_cfg.sync_src = AFE_PORT_PCM_SYNC_SRC_INTERNAL;
> + break;
> + case SND_SOC_DAIFMT_CBM_CFM:
> + /* CPU is slave */
> + pcfg->pcm_cfg.sync_src = AFE_PORT_PCM_SYNC_SRC_EXTERNAL;
> + break;
> + default:
> + break;
> + }
> +
> + switch (cfg->sample_rate) {
> + case 8000:
> + pcfg->pcm_cfg.frame_setting = AFE_PORT_PCM_BITS_PER_FRAME_128;
> + break;
> + case 16000:
> + pcfg->pcm_cfg.frame_setting = AFE_PORT_PCM_BITS_PER_FRAME_64;
> + break;
> + }
> + pcfg->pcm_cfg.quantype = AFE_PORT_PCM_LINEAR_NOPADDING;
> + pcfg->pcm_cfg.ctrl_data_out_enable = AFE_PORT_PCM_CTRL_DATA_OE_DISABLE;
> + pcfg->pcm_cfg.reserved = 0;
> + pcfg->pcm_cfg.sample_rate = cfg->sample_rate;
> +
> + /* 16 bit mono */
> + pcfg->pcm_cfg.bit_width = 16;
> + pcfg->pcm_cfg.num_channels = 1;
> + pcfg->pcm_cfg.slot_number_mapping[0] = 1;

PCM quantization type and Slot Mapping should come from device tree.



> +
> + return 0;
> +}
> +EXPORT_SYMBOL_GPL(q6afe_pcm_port_prepare);
> +

2020-02-10 17:23:59

by Adam Serbinski

[permalink] [raw]
Subject: Re: [PATCH v2 3/8] ASoC: qdsp6: q6afe-dai: add support to pcm port dais

On 2020-02-10 12:13, Srinivas Kandagatla wrote:
> Few minor comments
>
>> +static int q6afe_tdm_set_sysclk(struct snd_soc_dai *dai,
>> + int clk_id, unsigned int freq, int dir)
>> +{
>
> Why are we adding exactly duplicate function of q6afe_mi2s_set_sysclk
> here?

It isn't an exact duplicate.

The reason I split off the new function is because the clock IDs for PCM
overlap/duplicate the clock IDs for TDM, yet the parameters to
q6afe_port_set_sysclk are not the same for PCM and TDM.


>> + SND_SOC_DAPM_AIF_IN("QUAT_PCM_RX", NULL,
>> + 0, 0, 0, 0),
>
> This can be in single line, same for below

I will adjust these.

2020-02-10 17:42:25

by Srinivas Kandagatla

[permalink] [raw]
Subject: Re: [PATCH v2 3/8] ASoC: qdsp6: q6afe-dai: add support to pcm port dais



On 10/02/2020 17:22, Adam Serbinski wrote:
>>>
>>
>> Why are we adding exactly duplicate function of q6afe_mi2s_set_sysclk
>> here?
>
> It isn't an exact duplicate.
>
> The reason I split off the new function is because the clock IDs for PCM
> overlap/duplicate the clock IDs for TDM, yet the parameters to
> q6afe_port_set_sysclk are not the same for PCM and TDM.
>
we should be able to use dai->id to make that decision.

--srini




>
>>>   +    SND_SOC_DAPM_AIF_IN("QUAT_PCM_RX", NULL,
>>> +                0, 0, 0, 0),