2022-04-30 09:07:29

by Christian Marangi

[permalink] [raw]
Subject: [PATCH 3/4] clk: qcom: clk-krait: add hw_parent check for div2_round_rate

Check if hw_parent is present before calculating the round_rate to
prevent kernel panic. On error -EINVAL is reported.

Signed-off-by: Ansuel Smith <[email protected]>
---
drivers/clk/qcom/clk-krait.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/qcom/clk-krait.c b/drivers/clk/qcom/clk-krait.c
index 90046428693c..6c367ad6506a 100644
--- a/drivers/clk/qcom/clk-krait.c
+++ b/drivers/clk/qcom/clk-krait.c
@@ -84,7 +84,12 @@ EXPORT_SYMBOL_GPL(krait_mux_clk_ops);
static long krait_div2_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *parent_rate)
{
- *parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), rate * 2);
+ struct clk_hw *hw_parent = clk_hw_get_parent(hw);
+
+ if (!hw_parent)
+ return -EINVAL;
+
+ *parent_rate = clk_hw_round_rate(hw_parent, rate * 2);
return DIV_ROUND_UP(*parent_rate, 2);
}

--
2.34.1


2022-05-02 16:02:28

by Christian Marangi

[permalink] [raw]
Subject: Re: [PATCH 3/4] clk: qcom: clk-krait: add hw_parent check for div2_round_rate

On Fri, Apr 29, 2022 at 05:53:32PM +0300, Dmitry Baryshkov wrote:
> On 29/04/2022 15:01, Ansuel Smith wrote:
> > Check if hw_parent is present before calculating the round_rate to
> > prevent kernel panic. On error -EINVAL is reported.
> >
> > Signed-off-by: Ansuel Smith <[email protected]>
>
> I see that other clock drivers do not perform this check. Which path leads
> to this oops?
>

This comes from qsdk patches so I apologize in advance about this.

Anyway I'm checking the code and krait-cc is the only user of
krait_div2_clk_ops. That user have as parent only hfpll_something that
is declared by gcc. Now hfpll can also be declared in dts with a
dedicated driver so I wonder if the problem is there in the case when
hfpll is declared in dts and is probed after krait-cc. This is not the
case for ipq8064 but I wonder if qsdk have other krait based device that
have a configuration with hfpll declared in dts.

In short you are right and in our current code the check is uselss and
I'm positive about dropping this patch but I do wonder if downstream
there is an actual use of this. Don't know how to proceed. Any hint?

> > ---
> > drivers/clk/qcom/clk-krait.c | 7 ++++++-
> > 1 file changed, 6 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/clk/qcom/clk-krait.c b/drivers/clk/qcom/clk-krait.c
> > index 90046428693c..6c367ad6506a 100644
> > --- a/drivers/clk/qcom/clk-krait.c
> > +++ b/drivers/clk/qcom/clk-krait.c
> > @@ -84,7 +84,12 @@ EXPORT_SYMBOL_GPL(krait_mux_clk_ops);
> > static long krait_div2_round_rate(struct clk_hw *hw, unsigned long rate,
> > unsigned long *parent_rate)
> > {
> > - *parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), rate * 2);
> > + struct clk_hw *hw_parent = clk_hw_get_parent(hw);
> > +
> > + if (!hw_parent)
> > + return -EINVAL;
> > +
> > + *parent_rate = clk_hw_round_rate(hw_parent, rate * 2);
> > return DIV_ROUND_UP(*parent_rate, 2);
> > }
>
>
> --
> With best wishes
> Dmitry

--
Ansuel

2022-05-03 00:15:37

by Dmitry Baryshkov

[permalink] [raw]
Subject: Re: [PATCH 3/4] clk: qcom: clk-krait: add hw_parent check for div2_round_rate

On Fri, 29 Apr 2022 at 18:08, Ansuel Smith <[email protected]> wrote:
>
> On Fri, Apr 29, 2022 at 05:53:32PM +0300, Dmitry Baryshkov wrote:
> > On 29/04/2022 15:01, Ansuel Smith wrote:
> > > Check if hw_parent is present before calculating the round_rate to
> > > prevent kernel panic. On error -EINVAL is reported.
> > >
> > > Signed-off-by: Ansuel Smith <[email protected]>
> >
> > I see that other clock drivers do not perform this check. Which path leads
> > to this oops?
> >
>
> This comes from qsdk patches so I apologize in advance about this.

Ugh. If it comes from the code authored by somebody else, it'd be
better to note this (by using the From or Co-developed-by tags).
At the very least (if the author is unknown) you can mention the
origin of the patch (qsdk) in the commit message.

>
> Anyway I'm checking the code and krait-cc is the only user of
> krait_div2_clk_ops. That user have as parent only hfpll_something that
> is declared by gcc. Now hfpll can also be declared in dts with a
> dedicated driver so I wonder if the problem is there in the case when
> hfpll is declared in dts and is probed after krait-cc. This is not the
> case for ipq8064 but I wonder if qsdk have other krait based device that
> have a configuration with hfpll declared in dts.

On msm8974 (and maybe others) the hfpll should be driven by the
separate hfpll driver.

>
> In short you are right and in our current code the check is uselss and
> I'm positive about dropping this patch but I do wonder if downstream
> there is an actual use of this. Don't know how to proceed. Any hint?

I'd say, let's drop it for now unless Stephen or Bjorn tell us that
it's a valid check.

>
> > > ---
> > > drivers/clk/qcom/clk-krait.c | 7 ++++++-
> > > 1 file changed, 6 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/clk/qcom/clk-krait.c b/drivers/clk/qcom/clk-krait.c
> > > index 90046428693c..6c367ad6506a 100644
> > > --- a/drivers/clk/qcom/clk-krait.c
> > > +++ b/drivers/clk/qcom/clk-krait.c
> > > @@ -84,7 +84,12 @@ EXPORT_SYMBOL_GPL(krait_mux_clk_ops);
> > > static long krait_div2_round_rate(struct clk_hw *hw, unsigned long rate,
> > > unsigned long *parent_rate)
> > > {
> > > - *parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), rate * 2);
> > > + struct clk_hw *hw_parent = clk_hw_get_parent(hw);
> > > +
> > > + if (!hw_parent)
> > > + return -EINVAL;
> > > +
> > > + *parent_rate = clk_hw_round_rate(hw_parent, rate * 2);
> > > return DIV_ROUND_UP(*parent_rate, 2);
> > > }
> >
> >
> > --
> > With best wishes
> > Dmitry
>
> --
> Ansuel



--
With best wishes
Dmitry

2022-05-03 01:22:07

by Dmitry Baryshkov

[permalink] [raw]
Subject: Re: [PATCH 3/4] clk: qcom: clk-krait: add hw_parent check for div2_round_rate

On 29/04/2022 15:01, Ansuel Smith wrote:
> Check if hw_parent is present before calculating the round_rate to
> prevent kernel panic. On error -EINVAL is reported.
>
> Signed-off-by: Ansuel Smith <[email protected]>

I see that other clock drivers do not perform this check. Which path
leads to this oops?

> ---
> drivers/clk/qcom/clk-krait.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/qcom/clk-krait.c b/drivers/clk/qcom/clk-krait.c
> index 90046428693c..6c367ad6506a 100644
> --- a/drivers/clk/qcom/clk-krait.c
> +++ b/drivers/clk/qcom/clk-krait.c
> @@ -84,7 +84,12 @@ EXPORT_SYMBOL_GPL(krait_mux_clk_ops);
> static long krait_div2_round_rate(struct clk_hw *hw, unsigned long rate,
> unsigned long *parent_rate)
> {
> - *parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), rate * 2);
> + struct clk_hw *hw_parent = clk_hw_get_parent(hw);
> +
> + if (!hw_parent)
> + return -EINVAL;
> +
> + *parent_rate = clk_hw_round_rate(hw_parent, rate * 2);
> return DIV_ROUND_UP(*parent_rate, 2);
> }
>


--
With best wishes
Dmitry