This patch is to activate some interrupt sources
that aren't defined in UFSHCI specifications. Those
purpose could be error handling, workaround or whatever.
Signed-off-by: Kiwoong Kim <[email protected]>
---
drivers/scsi/ufs/ufshcd.c | 14 +++++++++++++-
drivers/scsi/ufs/ufshcd.h | 1 +
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index 3841ab49..604c505 100644
--- a/drivers/scsi/ufs/ufshcd.c
+++ b/drivers/scsi/ufs/ufshcd.c
@@ -218,6 +218,13 @@ static struct ufs_dev_fix ufs_fixups[] = {
END_FIX
};
+static inline irqreturn_t
+ufshcd_vendor_isr_def(struct ufs_hba *hba)
+{
+ return IRQ_NONE;
+}
+DEFINE_STATIC_CALL(vendor_isr, ufshcd_vendor_isr_def);
+
static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba);
static void ufshcd_async_scan(void *data, async_cookie_t cookie);
static int ufshcd_reset_and_restore(struct ufs_hba *hba);
@@ -6445,7 +6452,9 @@ static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba)
*/
static irqreturn_t ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
{
- irqreturn_t retval = IRQ_NONE;
+ irqreturn_t retval;
+
+ retval = static_call(vendor_isr)(hba);
if (intr_status & UFSHCD_UIC_MASK)
retval |= ufshcd_uic_cmd_compl(hba, intr_status);
@@ -8533,6 +8542,9 @@ static int ufshcd_variant_hba_init(struct ufs_hba *hba)
if (err)
dev_err(hba->dev, "%s: variant %s init failed err %d\n",
__func__, ufshcd_get_var_name(hba), err);
+
+ if (hba->vops->intr)
+ static_call_update(vendor_isr, *hba->vops->intr);
out:
return err;
}
diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h
index 52ea6f3..7af5d5b 100644
--- a/drivers/scsi/ufs/ufshcd.h
+++ b/drivers/scsi/ufs/ufshcd.h
@@ -356,6 +356,7 @@ struct ufs_hba_variant_ops {
const union ufs_crypto_cfg_entry *cfg, int slot);
void (*event_notify)(struct ufs_hba *hba,
enum ufs_event_type evt, void *data);
+ irqreturn_t (*intr)(struct ufs_hba *hba);
};
/* clock gating state */
--
2.7.4
On 9/13/21 00:55, Kiwoong Kim wrote:
> +static inline irqreturn_t
> +ufshcd_vendor_isr_def(struct ufs_hba *hba)
> +{
> + return IRQ_NONE;
> +}
Since "static inline irqreturn_t ufshcd_vendor_isr_def(struct ufs_hba
*hba)" occupies less than 80 columns please use a single line for the
declaration of this function. Additionally, please leave out the
"inline" keyword since modern compilers are good at deciding when to
inline a function and when not.
Thanks,
Bart.
> Since "static inline irqreturn_t ufshcd_vendor_isr_def(struct ufs_hba
> *hba)" occupies less than 80 columns please use a single line for the
> declaration of this function. Additionally, please leave out the "inline"
> keyword since modern compilers are good at deciding when to inline a
> function and when not.
Got it. Thanks.
> On 9/13/21 00:55, Kiwoong Kim wrote:
> > +static inline irqreturn_t
> > +ufshcd_vendor_isr_def(struct ufs_hba *hba)
> > +{
> > + return IRQ_NONE;
> > +}
>
> Since "static inline irqreturn_t ufshcd_vendor_isr_def(struct ufs_hba
> *hba)" occupies less than 80 columns please use a single line for the
> declaration of this function.
btw, It is 100 now.
>
> Thanks,
>
> Bart.
On 9/14/21 4:53 AM, Avri Altman wrote:
>> Since "static inline irqreturn_t ufshcd_vendor_isr_def(struct ufs_hba
>> *hba)" occupies less than 80 columns please use a single line for the
>> declaration of this function.
>
> btw, It is 100 now.
Are you sure? In Documentation/process/coding-style.rst I found the following:
The preferred limit on the length of a single line is 80 columns.
From the commit message of bdc48fa11e46 ("checkpatch/coding-style: deprecate
80-column warning"):
Yes, staying withing 80 columns is certainly still _preferred_. But
it's not the hard limit that the checkpatch warnings imply, and other
concerns can most certainly dominate.
Increase the default limit to 100 characters. Not because 100
characters is some hard limit either, but that's certainly a "what are
you doing" kind of value and less likely to be about the occasional
slightly longer lines.
Bart.