Add a driver to setup the USB PHY-s on Qualcom m IPQ40xx series SoCs.
The driver sets up HS and SS phys.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Robert Marko <[email protected]>
Cc: Luka Perkov <[email protected]>
---
Changes from v6 to v7:
* Use of_device_get_match_data() instead of of_match_device()
and then passing that to devm_phy_create()
Changes from v2 to v3:
* Remove magic writes as they are not needed
* Correct commit message
drivers/phy/qualcomm/Kconfig | 7 +
drivers/phy/qualcomm/Makefile | 1 +
drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c | 148 ++++++++++++++++++++
3 files changed, 156 insertions(+)
create mode 100644 drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
diff --git a/drivers/phy/qualcomm/Kconfig b/drivers/phy/qualcomm/Kconfig
index 98674ed094d9..b86f9556df85 100644
--- a/drivers/phy/qualcomm/Kconfig
+++ b/drivers/phy/qualcomm/Kconfig
@@ -18,6 +18,13 @@ config PHY_QCOM_APQ8064_SATA
depends on OF
select GENERIC_PHY
+config PHY_QCOM_IPQ4019_USB
+ tristate "Qualcomm IPQ4019 USB PHY driver"
+ depends on OF && (ARCH_QCOM || COMPILE_TEST)
+ select GENERIC_PHY
+ help
+ Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s.
+
config PHY_QCOM_IPQ806X_SATA
tristate "Qualcomm IPQ806x SATA SerDes/PHY driver"
depends on ARCH_QCOM
diff --git a/drivers/phy/qualcomm/Makefile b/drivers/phy/qualcomm/Makefile
index 1f14aeacbd70..41746781de73 100644
--- a/drivers/phy/qualcomm/Makefile
+++ b/drivers/phy/qualcomm/Makefile
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_PHY_ATH79_USB) += phy-ath79-usb.o
obj-$(CONFIG_PHY_QCOM_APQ8064_SATA) += phy-qcom-apq8064-sata.o
+obj-$(CONFIG_PHY_QCOM_IPQ4019_USB) += phy-qcom-ipq4019-usb.o
obj-$(CONFIG_PHY_QCOM_IPQ806X_SATA) += phy-qcom-ipq806x-sata.o
obj-$(CONFIG_PHY_QCOM_PCIE2) += phy-qcom-pcie2.o
obj-$(CONFIG_PHY_QCOM_QMP) += phy-qcom-qmp.o
diff --git a/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c b/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
new file mode 100644
index 000000000000..b8ef331e1545
--- /dev/null
+++ b/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
@@ -0,0 +1,148 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2018 John Crispin <[email protected]>
+ *
+ * Based on code from
+ * Allwinner Technology Co., Ltd. <http://www.allwinnertech.com>
+ *
+ */
+
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/of_platform.h>
+#include <linux/of_device.h>
+#include <linux/phy/phy.h>
+#include <linux/platform_device.h>
+#include <linux/reset.h>
+
+struct ipq4019_usb_phy {
+ struct device *dev;
+ struct phy *phy;
+ void __iomem *base;
+ struct reset_control *por_rst;
+ struct reset_control *srif_rst;
+};
+
+static int ipq4019_ss_phy_power_off(struct phy *_phy)
+{
+ struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
+
+ reset_control_assert(phy->por_rst);
+ msleep(10);
+
+ return 0;
+}
+
+static int ipq4019_ss_phy_power_on(struct phy *_phy)
+{
+ struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
+
+ ipq4019_ss_phy_power_off(_phy);
+
+ reset_control_deassert(phy->por_rst);
+
+ return 0;
+}
+
+static struct phy_ops ipq4019_usb_ss_phy_ops = {
+ .power_on = ipq4019_ss_phy_power_on,
+ .power_off = ipq4019_ss_phy_power_off,
+};
+
+static int ipq4019_hs_phy_power_off(struct phy *_phy)
+{
+ struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
+
+ reset_control_assert(phy->por_rst);
+ msleep(10);
+
+ reset_control_assert(phy->srif_rst);
+ msleep(10);
+
+ return 0;
+}
+
+static int ipq4019_hs_phy_power_on(struct phy *_phy)
+{
+ struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
+
+ ipq4019_hs_phy_power_off(_phy);
+
+ reset_control_deassert(phy->srif_rst);
+ msleep(10);
+
+ reset_control_deassert(phy->por_rst);
+
+ return 0;
+}
+
+static struct phy_ops ipq4019_usb_hs_phy_ops = {
+ .power_on = ipq4019_hs_phy_power_on,
+ .power_off = ipq4019_hs_phy_power_off,
+};
+
+static const struct of_device_id ipq4019_usb_phy_of_match[] = {
+ { .compatible = "qcom,usb-hs-ipq4019-phy", .data = &ipq4019_usb_hs_phy_ops},
+ { .compatible = "qcom,usb-ss-ipq4019-phy", .data = &ipq4019_usb_ss_phy_ops},
+ { },
+};
+MODULE_DEVICE_TABLE(of, ipq4019_usb_phy_of_match);
+
+static int ipq4019_usb_phy_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct resource *res;
+ struct phy_provider *phy_provider;
+ struct ipq4019_usb_phy *phy;
+
+ phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
+ if (!phy)
+ return -ENOMEM;
+
+ phy->dev = &pdev->dev;
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ phy->base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(phy->base)) {
+ dev_err(dev, "failed to remap register memory\n");
+ return PTR_ERR(phy->base);
+ }
+
+ phy->por_rst = devm_reset_control_get(phy->dev, "por_rst");
+ if (IS_ERR(phy->por_rst)) {
+ if (PTR_ERR(phy->por_rst) != -EPROBE_DEFER)
+ dev_err(dev, "POR reset is missing\n");
+ return PTR_ERR(phy->por_rst);
+ }
+
+ phy->srif_rst = devm_reset_control_get_optional(phy->dev, "srif_rst");
+ if (IS_ERR(phy->srif_rst))
+ return PTR_ERR(phy->srif_rst);
+
+ phy->phy = devm_phy_create(dev, NULL, of_device_get_match_data(dev));
+ if (IS_ERR(phy->phy)) {
+ dev_err(dev, "failed to create PHY\n");
+ return PTR_ERR(phy->phy);
+ }
+ phy_set_drvdata(phy->phy, phy);
+
+ phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
+
+ return PTR_ERR_OR_ZERO(phy_provider);
+}
+
+static struct platform_driver ipq4019_usb_phy_driver = {
+ .probe = ipq4019_usb_phy_probe,
+ .driver = {
+ .of_match_table = ipq4019_usb_phy_of_match,
+ .name = "ipq4019-usb-phy",
+ }
+};
+module_platform_driver(ipq4019_usb_phy_driver);
+
+MODULE_DESCRIPTION("QCOM/IPQ4019 USB phy driver");
+MODULE_AUTHOR("John Crispin <[email protected]>");
+MODULE_LICENSE("GPL v2");
--
2.26.2
From: John Crispin <[email protected]>
Since we now have driver for the USB PHY, lets add the necessary nodes to DTSI.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Robert Marko <[email protected]>
Cc: Luka Perkov <[email protected]>
---
Changes from v6 to v7:
* Remove changes to qcom-ipq4019-ap.dk01.1.dtsi
It has slipped in unwanted, we only want to add
nodes to the DTSI.
arch/arm/boot/dts/qcom-ipq4019.dtsi | 74 +++++++++++++++++++++++++++++
1 file changed, 74 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index bfa9ce4c6e69..ee45253361cb 100644
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -604,5 +604,79 @@
reg = <4>;
};
};
+
+ usb3_ss_phy: ssphy@9a000 {
+ compatible = "qcom,usb-ss-ipq4019-phy";
+ #phy-cells = <0>;
+ reg = <0x9a000 0x800>;
+ reg-names = "phy_base";
+ resets = <&gcc USB3_UNIPHY_PHY_ARES>;
+ reset-names = "por_rst";
+ status = "disabled";
+ };
+
+ usb3_hs_phy: hsphy@a6000 {
+ compatible = "qcom,usb-hs-ipq4019-phy";
+ #phy-cells = <0>;
+ reg = <0xa6000 0x40>;
+ reg-names = "phy_base";
+ resets = <&gcc USB3_HSPHY_POR_ARES>, <&gcc USB3_HSPHY_S_ARES>;
+ reset-names = "por_rst", "srif_rst";
+ status = "disabled";
+ };
+
+ usb3@8af8800 {
+ compatible = "qcom,dwc3";
+ reg = <0x8af8800 0x100>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&gcc GCC_USB3_MASTER_CLK>,
+ <&gcc GCC_USB3_SLEEP_CLK>,
+ <&gcc GCC_USB3_MOCK_UTMI_CLK>;
+ clock-names = "master", "sleep", "mock_utmi";
+ ranges;
+ status = "disabled";
+
+ dwc3@8a00000 {
+ compatible = "snps,dwc3";
+ reg = <0x8a00000 0xf8000>;
+ interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&usb3_hs_phy>, <&usb3_ss_phy>;
+ phy-names = "usb2-phy", "usb3-phy";
+ dr_mode = "host";
+ };
+ };
+
+ usb2_hs_phy: hsphy@a8000 {
+ compatible = "qcom,usb-hs-ipq4019-phy";
+ #phy-cells = <0>;
+ reg = <0xa8000 0x40>;
+ reg-names = "phy_base";
+ resets = <&gcc USB2_HSPHY_POR_ARES>, <&gcc USB2_HSPHY_S_ARES>;
+ reset-names = "por_rst", "srif_rst";
+ status = "disabled";
+ };
+
+ usb2@60f8800 {
+ compatible = "qcom,dwc3";
+ reg = <0x60f8800 0x100>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&gcc GCC_USB2_MASTER_CLK>,
+ <&gcc GCC_USB2_SLEEP_CLK>,
+ <&gcc GCC_USB2_MOCK_UTMI_CLK>;
+ clock-names = "master", "sleep", "mock_utmi";
+ ranges;
+ status = "disabled";
+
+ dwc3@6000000 {
+ compatible = "snps,dwc3";
+ reg = <0x6000000 0xf8000>;
+ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&usb2_hs_phy>;
+ phy-names = "usb2-phy";
+ dr_mode = "host";
+ };
+ };
};
};
--
2.26.2
On 03.05.20 22:18, Robert Marko wrote:
> Add a driver to setup the USB PHY-s on Qualcom m IPQ40xx series SoCs.
> The driver sets up HS and SS phys.
>
> Signed-off-by: John Crispin<[email protected]>
> Signed-off-by: Robert Marko<[email protected]>
> Cc: Luka Perkov<[email protected]>
Thanks for pushing these patches upstream !
On 03-05-20, 22:18, Robert Marko wrote:
> Add a driver to setup the USB PHY-s on Qualcom m IPQ40xx series SoCs.
> The driver sets up HS and SS phys.
Applied, thanks
--
~Vinod
On 03-05-20, 22:18, Robert Marko wrote:
> From: John Crispin <[email protected]>
>
> Since we now have driver for the USB PHY, lets add the necessary nodes to DTSI.
Reviewed-by: Vinod Koul <[email protected]>
Bjorn, I have picked the phy and dt binding, feel free to apply this one
Thanks
--
~Vinod
On Mon, May 4, 2020 at 9:39 AM Vinod Koul <[email protected]> wrote:
>
> On 03-05-20, 22:18, Robert Marko wrote:
> > From: John Crispin <[email protected]>
> >
> > Since we now have driver for the USB PHY, lets add the necessary nodes to DTSI.
>
> Reviewed-by: Vinod Koul <[email protected]>
>
> Bjorn, I have picked the phy and dt binding, feel free to apply this one
>
> Thanks
> --
> ~Vinod
Any chance of this landing into 5.7?
Driver and bindings have been merged, but I don't see DT nodes queued.
Regards,
Robert
Hi Robert,
On 09-06-20, 16:45, Robert Marko wrote:
> HI,
> Vinod can you maybe pick this?
Sorry can't do.. this needs to go thru Bjorn..
We are in merge window so it is too late for that.
Bjorn can pick this for 5.9...
>
> It would be great to have nodes in 5.8 along the driver
>
> Thank
> Robert
>
> On Fri, May 29, 2020 at 11:36 AM Robert Marko <[email protected]> wrote:
> >
> > On Mon, May 4, 2020 at 9:39 AM Vinod Koul <[email protected]> wrote:
> > >
> > > On 03-05-20, 22:18, Robert Marko wrote:
> > > > From: John Crispin <[email protected]>
> > > >
> > > > Since we now have driver for the USB PHY, lets add the necessary nodes to DTSI.
> > >
> > > Reviewed-by: Vinod Koul <[email protected]>
> > >
> > > Bjorn, I have picked the phy and dt binding, feel free to apply this one
> > >
> > > Thanks
> > > --
> > > ~Vinod
> >
> > Any chance of this landing into 5.7?
> > Driver and bindings have been merged, but I don't see DT nodes queued.
> >
> > Regards,
> > Robert
--
~Vinod
HI,
Vinod can you maybe pick this?
It would be great to have nodes in 5.8 along the driver
Thank
Robert
On Fri, May 29, 2020 at 11:36 AM Robert Marko <[email protected]> wrote:
>
> On Mon, May 4, 2020 at 9:39 AM Vinod Koul <[email protected]> wrote:
> >
> > On 03-05-20, 22:18, Robert Marko wrote:
> > > From: John Crispin <[email protected]>
> > >
> > > Since we now have driver for the USB PHY, lets add the necessary nodes to DTSI.
> >
> > Reviewed-by: Vinod Koul <[email protected]>
> >
> > Bjorn, I have picked the phy and dt binding, feel free to apply this one
> >
> > Thanks
> > --
> > ~Vinod
>
> Any chance of this landing into 5.7?
> Driver and bindings have been merged, but I don't see DT nodes queued.
>
> Regards,
> Robert
On Tue, Jun 9, 2020 at 6:19 PM Vinod Koul <[email protected]> wrote:
>
> Hi Robert,
>
> On 09-06-20, 16:45, Robert Marko wrote:
> > HI,
> > Vinod can you maybe pick this?
>
> Sorry can't do.. this needs to go thru Bjorn..
>
> We are in merge window so it is too late for that.
> Bjorn can pick this for 5.9...
Hi, can this be picked up for 5.9?
Driver and DT bindings are already in 5.8
Thanks
>
> >
> > It would be great to have nodes in 5.8 along the driver
> >
> > Thank
> > Robert
> >
> > On Fri, May 29, 2020 at 11:36 AM Robert Marko <[email protected]> wrote:
> > >
> > > On Mon, May 4, 2020 at 9:39 AM Vinod Koul <[email protected]> wrote:
> > > >
> > > > On 03-05-20, 22:18, Robert Marko wrote:
> > > > > From: John Crispin <[email protected]>
> > > > >
> > > > > Since we now have driver for the USB PHY, lets add the necessary nodes to DTSI.
> > > >
> > > > Reviewed-by: Vinod Koul <[email protected]>
> > > >
> > > > Bjorn, I have picked the phy and dt binding, feel free to apply this one
> > > >
> > > > Thanks
> > > > --
> > > > ~Vinod
> > >
> > > Any chance of this landing into 5.7?
> > > Driver and bindings have been merged, but I don't see DT nodes queued.
> > >
> > > Regards,
> > > Robert
>
> --
> ~Vinod