Currently the reserved region for ISA is allocated with no
permissions. If a dma domain is being used, mapping this region will
fail. Set the permissions to DMA_PTE_READ|DMA_PTE_WRITE.
Cc: Joerg Roedel <[email protected]>
Cc: Lu Baolu <[email protected]>
Cc: [email protected]
Cc: [email protected] # v5.3+
Fixes: d850c2ee5fe2 ("iommu/vt-d: Expose ISA direct mapping region via iommu_get_resv_regions")
Signed-off-by: Jerry Snitselaar <[email protected]>
---
drivers/iommu/intel-iommu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 0c8d81f56a30..998529cebcf2 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -5736,7 +5736,7 @@ static void intel_iommu_get_resv_regions(struct device *device,
struct pci_dev *pdev = to_pci_dev(device);
if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_ISA) {
- reg = iommu_alloc_resv_region(0, 1UL << 24, 0,
+ reg = iommu_alloc_resv_region(0, 1UL << 24, prot,
IOMMU_RESV_DIRECT);
if (reg)
list_add_tail(®->list, head);
--
2.24.0
Hi Jerry,
On 12/13/19 1:36 PM, Jerry Snitselaar wrote:
> Currently the reserved region for ISA is allocated with no
> permissions. If a dma domain is being used, mapping this region will
> fail. Set the permissions to DMA_PTE_READ|DMA_PTE_WRITE.
>
> Cc: Joerg Roedel <[email protected]>
> Cc: Lu Baolu <[email protected]>
> Cc: [email protected]
> Cc: [email protected] # v5.3+
> Fixes: d850c2ee5fe2 ("iommu/vt-d: Expose ISA direct mapping region via iommu_get_resv_regions")
> Signed-off-by: Jerry Snitselaar <[email protected]>
> ---
> drivers/iommu/intel-iommu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
> index 0c8d81f56a30..998529cebcf2 100644
> --- a/drivers/iommu/intel-iommu.c
> +++ b/drivers/iommu/intel-iommu.c
> @@ -5736,7 +5736,7 @@ static void intel_iommu_get_resv_regions(struct device *device,
> struct pci_dev *pdev = to_pci_dev(device);
>
> if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_ISA) {
> - reg = iommu_alloc_resv_region(0, 1UL << 24, 0,
> + reg = iommu_alloc_resv_region(0, 1UL << 24, prot,
> IOMMU_RESV_DIRECT);
This also applies to the IOAPIC range. Can you please change them
together?
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 0c8d81f56a30..256e48434f68 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -5736,7 +5736,7 @@ static void intel_iommu_get_resv_regions(struct
device *device,
struct pci_dev *pdev = to_pci_dev(device);
if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_ISA) {
- reg = iommu_alloc_resv_region(0, 1UL << 24, 0,
+ reg = iommu_alloc_resv_region(0, 1UL << 24, prot,
IOMMU_RESV_DIRECT);
if (reg)
list_add_tail(®->list, head);
@@ -5746,7 +5746,7 @@ static void intel_iommu_get_resv_regions(struct
device *device,
reg = iommu_alloc_resv_region(IOAPIC_RANGE_START,
IOAPIC_RANGE_END -
IOAPIC_RANGE_START + 1,
- 0, IOMMU_RESV_MSI);
+ prot, IOMMU_RESV_MSI);
if (!reg)
return;
list_add_tail(®->list, head);
Best regards,
baolu
> if (reg)
> list_add_tail(®->list, head);
>
Hi Jerry,
On 12/14/19 9:42 AM, Lu Baolu wrote:
> Hi Jerry,
>
> On 12/13/19 1:36 PM, Jerry Snitselaar wrote:
>> Currently the reserved region for ISA is allocated with no
>> permissions. If a dma domain is being used, mapping this region will
>> fail. Set the permissions to DMA_PTE_READ|DMA_PTE_WRITE.
>>
>> Cc: Joerg Roedel <[email protected]>
>> Cc: Lu Baolu <[email protected]>
>> Cc: [email protected]
>> Cc: [email protected] # v5.3+
>> Fixes: d850c2ee5fe2 ("iommu/vt-d: Expose ISA direct mapping region via
>> iommu_get_resv_regions")
>> Signed-off-by: Jerry Snitselaar <[email protected]>
>> ---
>> drivers/iommu/intel-iommu.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
>> index 0c8d81f56a30..998529cebcf2 100644
>> --- a/drivers/iommu/intel-iommu.c
>> +++ b/drivers/iommu/intel-iommu.c
>> @@ -5736,7 +5736,7 @@ static void intel_iommu_get_resv_regions(struct
>> device *device,
>> struct pci_dev *pdev = to_pci_dev(device);
>> if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_ISA) {
>> - reg = iommu_alloc_resv_region(0, 1UL << 24, 0,
>> + reg = iommu_alloc_resv_region(0, 1UL << 24, prot,
>> IOMMU_RESV_DIRECT);
>
>
> This also applies to the IOAPIC range. Can you please change them
> together?
Please ignore this comment. These two ranges are of different type. Your
fix is enough. Sorry for the confusion.
Best regards,
baolu
Hi,
On 12/13/19 1:36 PM, Jerry Snitselaar wrote:
> Currently the reserved region for ISA is allocated with no
> permissions. If a dma domain is being used, mapping this region will
> fail. Set the permissions to DMA_PTE_READ|DMA_PTE_WRITE.
>
> Cc: Joerg Roedel <[email protected]>
> Cc: Lu Baolu <[email protected]>
> Cc: [email protected]
> Cc: [email protected] # v5.3+
> Fixes: d850c2ee5fe2 ("iommu/vt-d: Expose ISA direct mapping region via iommu_get_resv_regions")
> Signed-off-by: Jerry Snitselaar <[email protected]>
This fix looks reasonable to me.
Acked-by: Lu Baolu <[email protected]>
Best regards,
baolu
> ---
> drivers/iommu/intel-iommu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
> index 0c8d81f56a30..998529cebcf2 100644
> --- a/drivers/iommu/intel-iommu.c
> +++ b/drivers/iommu/intel-iommu.c
> @@ -5736,7 +5736,7 @@ static void intel_iommu_get_resv_regions(struct device *device,
> struct pci_dev *pdev = to_pci_dev(device);
>
> if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_ISA) {
> - reg = iommu_alloc_resv_region(0, 1UL << 24, 0,
> + reg = iommu_alloc_resv_region(0, 1UL << 24, prot,
> IOMMU_RESV_DIRECT);
> if (reg)
> list_add_tail(®->list, head);
>