devices, since we still lack power_domain driver, so the other power rail
of rk3288 need keep power on.
I have tested it on rk3288-evb board, atop next-20141112. goto suspend by type
"echo mem > /sys/power/state", vdd_cpu is about 0mv by measuring, so it can be
determined in sleep mode, then press power button to wakeup it.
Changes in v10:
- remove regulator-suspend-mem-enabled and regulator-suspend-mem-microvolt
- enable the lcd, codec, sdmmc power during suspend
Changes in v9:
- fold Doug's patches
- modify some print log
- update the subject and description
Changes in v8:
- use enum for define sleep mode
- move rk3288_config_bootdata to the front of sram memcpy
- add ddr pinctrl for suspend
- keep all except cpu&tp power rail on during suspend
- add regulator-on-in-suspend before set suspend voltage
- add a reference of ddrio_pwroff and ddr0_retention
Changes in v7:
- get rid all of unused code
- add regulator-state-mem sub node for suspend
Changes in v6:
- get rid of the save/restore of SRAM
- doing the copy of resume code once at init time
- remove ROCKCHIP_ARM_OFF_LOGIC_DEEP from rk3288_fill_in_bootram
- add of_platform_populate in rockchip_dt_init
- change pmu_intmem@ff720000 to sram@ff720000
- change pmu_intmem@ff720000 to sram@ff720000
Changes in v5:
- use rk3288_bootram_sz for memcpy size
- fixed error of sram save and restore
- change the size of sram in example
- change size to 4k
Changes in v4:
- remove grf regmap
Changes in v3:
- move the pinmux of gpio6_c6 save and restore to pinctrl-rockchip
Changes in v2:
- add the regulator calls in prepare and finish.
- add the pinmux of gpio6_c6 save and restore
- put "rockchip,rk3288-pmu-sram" to first
Chris Zhong (4):
ARM: rockchip: add suspend and resume for RK3288
ARM: rockchip: Add pmu-sram binding
ARM: dts: add RK3288 suspend support
ARM: dts: rockchip: add suspend settings for rk3288-evb-rk808
.../devicetree/bindings/arm/rockchip/pmu-sram.txt | 16 ++
arch/arm/boot/dts/rk3288-evb-rk808.dts | 53 ++++-
arch/arm/boot/dts/rk3288.dtsi | 23 ++
arch/arm/mach-rockchip/Makefile | 1 +
arch/arm/mach-rockchip/pm.c | 260 +++++++++++++++++++++
arch/arm/mach-rockchip/pm.h | 99 ++++++++
arch/arm/mach-rockchip/rockchip.c | 2 +
arch/arm/mach-rockchip/sleep.S | 73 ++++++
8 files changed, 526 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/arm/rockchip/pmu-sram.txt
create mode 100644 arch/arm/mach-rockchip/pm.c
create mode 100644 arch/arm/mach-rockchip/pm.h
create mode 100644 arch/arm/mach-rockchip/sleep.S
--
1.9.1
It's a basic version of suspend and resume for rockchip,
it only support RK3288 now.
Signed-off-by: Tony Xie <[email protected]>
Signed-off-by: Chris Zhong <[email protected]>
Signed-off-by: Doug Anderson <[email protected]>
Tested-by: Doug Anderson <[email protected]>
Reviewed-by: Doug Anderson <[email protected]>
---
Changes in v10: None
Changes in v9:
- fold Doug's patches
- modify some print log
Changes in v8:
- use enum for define sleep mode
- move rk3288_config_bootdata to the front of sram memcpy
Changes in v7:
- get rid all of unused code
Changes in v6:
- get rid of the save/restore of SRAM
- doing the copy of resume code once at init time
- remove ROCKCHIP_ARM_OFF_LOGIC_DEEP from rk3288_fill_in_bootram
- add of_platform_populate in rockchip_dt_init
Changes in v5:
- use rk3288_bootram_sz for memcpy size
- fixed error of sram save and restore
Changes in v4:
- remove grf regmap
Changes in v3:
- move the pinmux of gpio6_c6 save and restore to pinctrl-rockchip
Changes in v2:
- add the regulator calls in prepare and finish.
- add the pinmux of gpio6_c6 save and restore
arch/arm/mach-rockchip/Makefile | 1 +
arch/arm/mach-rockchip/pm.c | 260 ++++++++++++++++++++++++++++++++++++++
arch/arm/mach-rockchip/pm.h | 99 +++++++++++++++
arch/arm/mach-rockchip/rockchip.c | 2 +
arch/arm/mach-rockchip/sleep.S | 73 +++++++++++
5 files changed, 435 insertions(+)
create mode 100644 arch/arm/mach-rockchip/pm.c
create mode 100644 arch/arm/mach-rockchip/pm.h
create mode 100644 arch/arm/mach-rockchip/sleep.S
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index b29d8ea..5c3a9b2 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -1,4 +1,5 @@
CFLAGS_platsmp.o := -march=armv7-a
obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip.o
+obj-$(CONFIG_PM_SLEEP) += pm.o sleep.o
obj-$(CONFIG_SMP) += headsmp.o platsmp.o
diff --git a/arch/arm/mach-rockchip/pm.c b/arch/arm/mach-rockchip/pm.c
new file mode 100644
index 0000000..50cb781
--- /dev/null
+++ b/arch/arm/mach-rockchip/pm.c
@@ -0,0 +1,260 @@
+/*
+ * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
+ * Author: Tony Xie <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/regmap.h>
+#include <linux/suspend.h>
+#include <linux/mfd/syscon.h>
+#include <linux/regulator/machine.h>
+
+#include <asm/cacheflush.h>
+#include <asm/tlbflush.h>
+#include <asm/suspend.h>
+
+#include "pm.h"
+
+/* These enum are option of low power mode */
+enum {
+ ROCKCHIP_ARM_OFF_LOGIC_NORMAL = 0,
+ ROCKCHIP_ARM_OFF_LOGIC_DEEP = 1,
+};
+
+struct rockchip_pm_data {
+ const struct platform_suspend_ops *ops;
+ int (*init)(struct device_node *np);
+};
+
+static void __iomem *rk3288_bootram_base;
+static phys_addr_t rk3288_bootram_phy;
+
+static struct regmap *pmu_regmap;
+static struct regmap *sgrf_regmap;
+
+static u32 rk3288_pmu_pwr_mode_con;
+static u32 rk3288_sgrf_soc_con0;
+
+static inline u32 rk3288_l2_config(void)
+{
+ u32 l2ctlr;
+
+ asm("mrc p15, 1, %0, c9, c0, 2" : "=r" (l2ctlr));
+ return l2ctlr;
+}
+
+static void rk3288_config_bootdata(void)
+{
+ rkpm_bootdata_cpusp = rk3288_bootram_phy + (SZ_4K - 8);
+ rkpm_bootdata_cpu_code = virt_to_phys(cpu_resume);
+
+ rkpm_bootdata_l2ctlr_f = 1;
+ rkpm_bootdata_l2ctlr = rk3288_l2_config();
+}
+
+static void rk3288_slp_mode_set(int level)
+{
+ u32 mode_set, mode_set1;
+
+ regmap_read(sgrf_regmap, RK3288_SGRF_SOC_CON0, &rk3288_sgrf_soc_con0);
+
+ regmap_read(pmu_regmap, RK3288_PMU_PWRMODE_CON,
+ &rk3288_pmu_pwr_mode_con);
+
+ /* set bit 8 so that system will resume to FAST_BOOT_ADDR */
+ regmap_write(sgrf_regmap, RK3288_SGRF_SOC_CON0,
+ SGRF_FAST_BOOT_EN | SGRF_FAST_BOOT_EN_WRITE);
+
+ /* booting address of resuming system is from this register value */
+ regmap_write(sgrf_regmap, RK3288_SGRF_FAST_BOOT_ADDR,
+ rk3288_bootram_phy);
+
+ regmap_write(pmu_regmap, RK3288_PMU_WAKEUP_CFG1,
+ PMU_ARMINT_WAKEUP_EN);
+
+ mode_set = BIT(PMU_GLOBAL_INT_DISABLE) | BIT(PMU_L2FLUSH_EN) |
+ BIT(PMU_SREF0_ENTER_EN) | BIT(PMU_SREF1_ENTER_EN) |
+ BIT(PMU_DDR0_GATING_EN) | BIT(PMU_DDR1_GATING_EN) |
+ BIT(PMU_PWR_MODE_EN) | BIT(PMU_CHIP_PD_EN) |
+ BIT(PMU_SCU_EN);
+
+ mode_set1 = BIT(PMU_CLR_CORE) | BIT(PMU_CLR_CPUP);
+
+ if (level == ROCKCHIP_ARM_OFF_LOGIC_DEEP) {
+ /* arm off, logic deep sleep */
+ mode_set |= BIT(PMU_BUS_PD_EN) |
+ BIT(PMU_DDR1IO_RET_EN) | BIT(PMU_DDR0IO_RET_EN) |
+ BIT(PMU_OSC_24M_DIS) | BIT(PMU_PMU_USE_LF) |
+ BIT(PMU_ALIVE_USE_LF) | BIT(PMU_PLL_PD_EN);
+
+ mode_set1 |= BIT(PMU_CLR_ALIVE) | BIT(PMU_CLR_BUS) |
+ BIT(PMU_CLR_PERI) | BIT(PMU_CLR_DMA);
+ } else {
+ /*
+ * arm off, logic normal
+ * if pmu_clk_core_src_gate_en is not set,
+ * wakeup will be error
+ */
+ mode_set |= BIT(PMU_CLK_CORE_SRC_GATE_EN);
+ }
+
+ regmap_write(pmu_regmap, RK3288_PMU_PWRMODE_CON, mode_set);
+ regmap_write(pmu_regmap, RK3288_PMU_PWRMODE_CON1, mode_set1);
+}
+
+static void rk3288_slp_mode_set_resume(void)
+{
+ regmap_write(pmu_regmap, RK3288_PMU_PWRMODE_CON,
+ rk3288_pmu_pwr_mode_con);
+
+ regmap_write(sgrf_regmap, RK3288_SGRF_SOC_CON0,
+ rk3288_sgrf_soc_con0 | SGRF_FAST_BOOT_EN_WRITE);
+}
+
+static int rockchip_lpmode_enter(unsigned long arg)
+{
+ flush_cache_all();
+
+ cpu_do_idle();
+
+ pr_err("%s: Failed to suspend\n", __func__);
+
+ return 1;
+}
+
+static int rk3288_suspend_enter(suspend_state_t state)
+{
+ local_fiq_disable();
+
+ rk3288_slp_mode_set(ROCKCHIP_ARM_OFF_LOGIC_NORMAL);
+
+ cpu_suspend(0, rockchip_lpmode_enter);
+
+ rk3288_slp_mode_set_resume();
+
+ local_fiq_enable();
+
+ return 0;
+}
+
+static int rk3288_suspend_prepare(void)
+{
+ return regulator_suspend_prepare(PM_SUSPEND_MEM);
+}
+
+static void rk3288_suspend_finish(void)
+{
+ if (regulator_suspend_finish())
+ pr_err("%s: Suspend finish failed\n", __func__);
+}
+
+static int rk3288_suspend_init(struct device_node *np)
+{
+ struct device_node *sram_np;
+ struct resource res;
+ int ret;
+
+ pmu_regmap = syscon_node_to_regmap(np);
+ if (IS_ERR(pmu_regmap)) {
+ pr_err("%s: could not find pmu regmap\n", __func__);
+ return PTR_ERR(pmu_regmap);
+ }
+
+ sgrf_regmap = syscon_regmap_lookup_by_compatible(
+ "rockchip,rk3288-sgrf");
+ if (IS_ERR(sgrf_regmap)) {
+ pr_err("%s: could not find sgrf regmap\n", __func__);
+ return PTR_ERR(pmu_regmap);
+ }
+
+ sram_np = of_find_compatible_node(NULL, NULL,
+ "rockchip,rk3288-pmu-sram");
+ if (!sram_np) {
+ pr_err("%s: could not find bootram dt node\n", __func__);
+ return -ENODEV;
+ }
+
+ rk3288_bootram_base = of_iomap(sram_np, 0);
+ if (!rk3288_bootram_base) {
+ pr_err("%s: could not map bootram base\n", __func__);
+ return -ENOMEM;
+ }
+
+ ret = of_address_to_resource(sram_np, 0, &res);
+ if (ret) {
+ pr_err("%s: could not get bootram phy addr\n", __func__);
+ return ret;
+ }
+ rk3288_bootram_phy = res.start;
+
+ of_node_put(sram_np);
+
+ rk3288_config_bootdata();
+
+ /* copy resume code and data to bootsram */
+ memcpy(rk3288_bootram_base, rockchip_slp_cpu_resume,
+ rk3288_bootram_sz);
+
+ return 0;
+}
+
+static const struct platform_suspend_ops rk3288_suspend_ops = {
+ .enter = rk3288_suspend_enter,
+ .valid = suspend_valid_only_mem,
+ .prepare = rk3288_suspend_prepare,
+ .finish = rk3288_suspend_finish,
+};
+
+static const struct rockchip_pm_data rk3288_pm_data __initconst = {
+ .ops = &rk3288_suspend_ops,
+ .init = rk3288_suspend_init,
+};
+
+static const struct of_device_id rockchip_pmu_of_device_ids[] __initconst = {
+ {
+ .compatible = "rockchip,rk3288-pmu",
+ .data = &rk3288_pm_data,
+ },
+ { /* sentinel */ },
+};
+
+void __init rockchip_suspend_init(void)
+{
+ const struct rockchip_pm_data *pm_data;
+ const struct of_device_id *match;
+ struct device_node *np;
+ int ret;
+
+ np = of_find_matching_node_and_match(NULL, rockchip_pmu_of_device_ids,
+ &match);
+ if (!match) {
+ pr_err("Failed to find PMU node\n");
+ return;
+ }
+ pm_data = (struct rockchip_pm_data *) match->data;
+
+ if (pm_data->init) {
+ ret = pm_data->init(np);
+
+ if (ret) {
+ pr_err("%s: matches init error %d\n", __func__, ret);
+ return;
+ }
+ }
+
+ suspend_set_ops(pm_data->ops);
+}
diff --git a/arch/arm/mach-rockchip/pm.h b/arch/arm/mach-rockchip/pm.h
new file mode 100644
index 0000000..99722d0
--- /dev/null
+++ b/arch/arm/mach-rockchip/pm.h
@@ -0,0 +1,99 @@
+/*
+ * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
+ * Author: Tony Xie <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ */
+
+#ifndef __MACH_ROCKCHIP_PM_H
+#define __MACH_ROCKCHIP_PM_H
+
+extern unsigned long rkpm_bootdata_cpusp;
+extern unsigned long rkpm_bootdata_cpu_code;
+extern unsigned long rkpm_bootdata_l2ctlr_f;
+extern unsigned long rkpm_bootdata_l2ctlr;
+extern unsigned long rkpm_bootdata_ddr_code;
+extern unsigned long rkpm_bootdata_ddr_data;
+extern unsigned long rk3288_bootram_sz;
+
+void rockchip_slp_cpu_resume(void);
+void __init rockchip_suspend_init(void);
+
+/****** following is rk3288 defined **********/
+#define RK3288_PMU_WAKEUP_CFG0 0x00
+#define RK3288_PMU_WAKEUP_CFG1 0x04
+#define RK3288_PMU_PWRMODE_CON 0x18
+#define RK3288_PMU_OSC_CNT 0x20
+#define RK3288_PMU_PLL_CNT 0x24
+#define RK3288_PMU_STABL_CNT 0x28
+#define RK3288_PMU_DDR0IO_PWRON_CNT 0x2c
+#define RK3288_PMU_DDR1IO_PWRON_CNT 0x30
+#define RK3288_PMU_CORE_PWRDWN_CNT 0x34
+#define RK3288_PMU_CORE_PWRUP_CNT 0x38
+#define RK3288_PMU_GPU_PWRDWN_CNT 0x3c
+#define RK3288_PMU_GPU_PWRUP_CNT 0x40
+#define RK3288_PMU_WAKEUP_RST_CLR_CNT 0x44
+#define RK3288_PMU_PWRMODE_CON1 0x90
+
+#define RK3288_SGRF_SOC_CON0 (0x0000)
+#define RK3288_SGRF_FAST_BOOT_ADDR (0x0120)
+#define SGRF_FAST_BOOT_EN BIT(8)
+#define SGRF_FAST_BOOT_EN_WRITE BIT(24)
+
+#define RK3288_CRU_MODE_CON (0x50)
+#define RK3288_CRU_SEL0_CON (0x60)
+#define RK3288_CRU_SEL1_CON (0x64)
+#define RK3288_CRU_SEL10_CON (0x88)
+#define RK3288_CRU_SEL33_CON (0xe4)
+#define RK3288_CRU_SEL37_CON (0xf4)
+
+/* PMU_WAKEUP_CFG1 bits */
+#define PMU_ARMINT_WAKEUP_EN BIT(0)
+
+enum rk3288_pwr_mode_con {
+ PMU_PWR_MODE_EN = 0,
+ PMU_CLK_CORE_SRC_GATE_EN,
+ PMU_GLOBAL_INT_DISABLE,
+ PMU_L2FLUSH_EN,
+ PMU_BUS_PD_EN,
+ PMU_A12_0_PD_EN,
+ PMU_SCU_EN,
+ PMU_PLL_PD_EN,
+ PMU_CHIP_PD_EN, /* POWER OFF PIN ENABLE */
+ PMU_PWROFF_COMB,
+ PMU_ALIVE_USE_LF,
+ PMU_PMU_USE_LF,
+ PMU_OSC_24M_DIS,
+ PMU_INPUT_CLAMP_EN,
+ PMU_WAKEUP_RESET_EN,
+ PMU_SREF0_ENTER_EN,
+ PMU_SREF1_ENTER_EN,
+ PMU_DDR0IO_RET_EN,
+ PMU_DDR1IO_RET_EN,
+ PMU_DDR0_GATING_EN,
+ PMU_DDR1_GATING_EN,
+ PMU_DDR0IO_RET_DE_REQ,
+ PMU_DDR1IO_RET_DE_REQ
+};
+
+enum rk3288_pwr_mode_con1 {
+ PMU_CLR_BUS = 0,
+ PMU_CLR_CORE,
+ PMU_CLR_CPUP,
+ PMU_CLR_ALIVE,
+ PMU_CLR_DMA,
+ PMU_CLR_PERI,
+ PMU_CLR_GPU,
+ PMU_CLR_VIDEO,
+ PMU_CLR_HEVC,
+ PMU_CLR_VIO,
+};
+
+#endif /* __MACH_ROCKCHIP_PM_H */
diff --git a/arch/arm/mach-rockchip/rockchip.c b/arch/arm/mach-rockchip/rockchip.c
index d226b71..2b68a1a 100644
--- a/arch/arm/mach-rockchip/rockchip.c
+++ b/arch/arm/mach-rockchip/rockchip.c
@@ -23,9 +23,11 @@
#include <asm/mach/map.h>
#include <asm/hardware/cache-l2x0.h>
#include "core.h"
+#include "pm.h"
static void __init rockchip_dt_init(void)
{
+ rockchip_suspend_init();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
platform_device_register_simple("cpufreq-dt", 0, NULL, 0);
}
diff --git a/arch/arm/mach-rockchip/sleep.S b/arch/arm/mach-rockchip/sleep.S
new file mode 100644
index 0000000..2eec9a3
--- /dev/null
+++ b/arch/arm/mach-rockchip/sleep.S
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
+ * Author: Tony Xie <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include <asm/memory.h>
+
+.data
+/*
+ * this code will be copied from
+ * ddr to sram for system resumeing.
+ * so it is ".data section".
+ */
+.align
+
+ENTRY(rockchip_slp_cpu_resume)
+ setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1 @ set svc, irqs off
+ mrc p15, 0, r1, c0, c0, 5
+ and r1, r1, #0xf
+ cmp r1, #0
+ /* olny cpu0 can continue to run, the others is halt here */
+ beq cpu0run
+secondary_loop:
+ wfe
+ b secondary_loop
+cpu0run:
+ ldr r3, rkpm_bootdata_l2ctlr_f
+ cmp r3, #0
+ beq sp_set
+ ldr r3, rkpm_bootdata_l2ctlr
+ mcr p15, 1, r3, c9, c0, 2
+sp_set:
+ ldr sp, rkpm_bootdata_cpusp
+ ldr r1, rkpm_bootdata_cpu_code
+ bx r1
+ENDPROC(rockchip_slp_cpu_resume)
+
+/* Parameters filled in by the kernel */
+
+/* Flag for whether to restore L2CTLR on resume */
+ .global rkpm_bootdata_l2ctlr_f
+rkpm_bootdata_l2ctlr_f:
+ .long 0
+
+/* Saved L2CTLR to restore on resume */
+ .global rkpm_bootdata_l2ctlr
+rkpm_bootdata_l2ctlr:
+ .long 0
+
+/* CPU resume SP addr */
+ .globl rkpm_bootdata_cpusp
+rkpm_bootdata_cpusp:
+ .long 0
+
+/* CPU resume function (physical address) */
+ .globl rkpm_bootdata_cpu_code
+rkpm_bootdata_cpu_code:
+ .long 0
+
+ENTRY(rk3288_bootram_sz)
+ .word . - rockchip_slp_cpu_resume
--
1.9.1
The pmu-sram is used to store resume code, suspend/resume need get the
address of it. Therefore add a binding and documentation for it.
Signed-off-by: Tony Xie <[email protected]>
Signed-off-by: Chris Zhong <[email protected]>
Reviewed-by: Doug Anderson <[email protected]>
---
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6:
- change pmu_intmem@ff720000 to sram@ff720000
Changes in v5:
- change the size of sram in example
Changes in v4: None
Changes in v3: None
Changes in v2: None
.../devicetree/bindings/arm/rockchip/pmu-sram.txt | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/rockchip/pmu-sram.txt
diff --git a/Documentation/devicetree/bindings/arm/rockchip/pmu-sram.txt b/Documentation/devicetree/bindings/arm/rockchip/pmu-sram.txt
new file mode 100644
index 0000000..6b42fda
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/rockchip/pmu-sram.txt
@@ -0,0 +1,16 @@
+Rockchip SRAM for pmu:
+------------------------------
+
+The sram of pmu is used to store the function of resume from maskrom(the 1st
+level loader). This is a common use of the "pmu-sram" because it keeps power
+even in low power states in the system.
+
+Required node properties:
+- compatible : should be "rockchip,rk3288-pmu-sram"
+- reg : physical base address and the size of the registers window
+
+Example:
+ sram@ff720000 {
+ compatible = "rockchip,rk3288-pmu-sram", "mmio-sram";
+ reg = <0xff720000 0x1000>;
+ };
--
1.9.1
add pmu sram node for suspend, add global_pwroff pinctrl.
The pmu sram is used to store the resume code.
global_pwroff is held low level at work, it would be pull to high
when entering suspend. reference this in the board DTS file since
some boards need it.
Signed-off-by: Tony Xie <[email protected]>
Signed-off-by: Chris Zhong <[email protected]>
Reviewed-by: Doug Anderson <[email protected]>
Tested-by: Doug Anderson <[email protected]>
---
Changes in v10: None
Changes in v9: None
Changes in v8:
- add ddr pinctrl for suspend
Changes in v7: None
Changes in v6:
- change pmu_intmem@ff720000 to sram@ff720000
Changes in v5:
- change size to 4k
Changes in v4: None
Changes in v3: None
Changes in v2:
- put "rockchip,rk3288-pmu-sram" to first
arch/arm/boot/dts/rk3288.dtsi | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 0f50d5d..eede3c6 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -480,6 +480,11 @@
};
};
+ sram@ff720000 {
+ compatible = "rockchip,rk3288-pmu-sram", "mmio-sram";
+ reg = <0xff720000 0x1000>;
+ };
+
pmu: power-management@ff730000 {
compatible = "rockchip,rk3288-pmu", "syscon";
reg = <0xff730000 0x100>;
@@ -703,6 +708,24 @@
bias-disable;
};
+ sleep {
+ global_pwroff: global-pwroff {
+ rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>;
+ };
+
+ ddrio_pwroff: ddrio-pwroff {
+ rockchip,pins = <0 1 RK_FUNC_1 &pcfg_pull_none>;
+ };
+
+ ddr0_retention: ddr0-retention {
+ rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_up>;
+ };
+
+ ddr1_retention: ddr1-retention {
+ rockchip,pins = <0 3 RK_FUNC_1 &pcfg_pull_up>;
+ };
+ };
+
i2c0 {
i2c0_xfer: i2c0-xfer {
rockchip,pins = <0 15 RK_FUNC_1 &pcfg_pull_none>,
--
1.9.1
Add suspend-voltages and necessary pin-states for suspend on
rk3288-evb-rk808 boards. global_pwroff would be pulled high when
RK3288 entering suspend, this pin is a sleep signal for RK808, so
RK808 could goto sleep mode, and some regulators would be disable.
Signed-off-by: Chris Zhong <[email protected]>
---
Changes in v10:
- remove regulator-suspend-mem-enabled and regulator-suspend-mem-microvolt
- enable the lcd, codec, sdmmc power during suspend
Changes in v9:
- update the subject and description
Changes in v8:
- keep all except cpu&tp power rail on during suspend
- add regulator-on-in-suspend before set suspend voltage
- add a reference of ddrio_pwroff and ddr0_retention
Changes in v7:
- add regulator-state-mem sub node for suspend
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/rk3288-evb-rk808.dts | 53 +++++++++++++++++++++++++++++++++-
1 file changed, 52 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288-evb-rk808.dts b/arch/arm/boot/dts/rk3288-evb-rk808.dts
index d8c775e6..d453ddd 100644
--- a/arch/arm/boot/dts/rk3288-evb-rk808.dts
+++ b/arch/arm/boot/dts/rk3288-evb-rk808.dts
@@ -31,7 +31,7 @@
interrupt-parent = <&gpio0>;
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
- pinctrl-0 = <&pmic_int>;
+ pinctrl-0 = <&pmic_int &global_pwroff>;
rockchip,system-power-controller;
wakeup-source;
#clock-cells = <1>;
@@ -50,6 +50,9 @@
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <1350000>;
regulator-name = "vdd_arm";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
};
vdd_gpu: DCDC_REG2 {
@@ -58,12 +61,19 @@
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1250000>;
regulator-name = "vdd_gpu";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
};
vcc_ddr: DCDC_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc_ddr";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
};
vcc_io: DCDC_REG4 {
@@ -72,6 +82,10 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc_io";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
};
vccio_pmu: LDO_REG1 {
@@ -80,6 +94,10 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vccio_pmu";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
};
vcc_tp: LDO_REG2 {
@@ -88,6 +106,9 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc_tp";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
};
vdd_10: LDO_REG3 {
@@ -96,6 +117,10 @@
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-name = "vdd_10";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
};
vcc18_lcd: LDO_REG4 {
@@ -104,6 +129,10 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc18_lcd";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
};
vccio_sd: LDO_REG5 {
@@ -112,6 +141,10 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vccio_sd";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
};
vdd10_lcd: LDO_REG6 {
@@ -120,6 +153,10 @@
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-name = "vdd10_lcd";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
};
vcc_18: LDO_REG7 {
@@ -128,6 +165,10 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc_18";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
};
vcca_codec: LDO_REG8 {
@@ -136,18 +177,28 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcca_codec";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
};
vcc_wl: SWITCH_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc_wl";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
};
vcc_lcd: SWITCH_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc_lcd";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
};
};
};
--
1.9.1
Chris Zhong <[email protected]> writes:
> devices, since we still lack power_domain driver, so the other power rail
> of rk3288 need keep power on.
> I have tested it on rk3288-evb board, atop next-20141112. goto suspend by type
> "echo mem > /sys/power/state", vdd_cpu is about 0mv by measuring, so it can be
> determined in sleep mode, then press power button to wakeup it.
I tested this on top of today's linux-next (next-20141201) and it
suspends, but doesn't wake up from any of the button presses. What
wakeup sources are configured for the rk3288-evb-rk808?
Kevin
Hi,
On Mon, Dec 1, 2014 at 11:51 AM, Kevin Hilman <[email protected]> wrote:
> Chris Zhong <[email protected]> writes:
>
>> devices, since we still lack power_domain driver, so the other power rail
>> of rk3288 need keep power on.
>> I have tested it on rk3288-evb board, atop next-20141112. goto suspend by type
>> "echo mem > /sys/power/state", vdd_cpu is about 0mv by measuring, so it can be
>> determined in sleep mode, then press power button to wakeup it.
>
> I tested this on top of today's linux-next (next-20141201) and it
> suspends, but doesn't wake up from any of the button presses. What
> wakeup sources are configured for the rk3288-evb-rk808?
Just to close the loop (I talked with Kevin over IM about this, too):
I have a huge description of how I tested this as part of my patch at
<https://patchwork.kernel.org/patch/5414941/>. Chris: I think Kevin
has asked you several times to include information like this in your
cover letter. Please, please, please can you try to remember to do
this?
For those that don't want to click on my link, I'll include the
relevant bits here:
---
Total patches atop that version of Linux were:
1. https://patchwork.kernel.org/patch/5051881/ - clocksource:
arch_timer: Allow the device tree to specify uninitialized timer
registers
2. https://patchwork.kernel.org/patch/5363671/ - clocksource:
arch_timer: Fix code to use physical timers when requested
3. https://patchwork.kernel.org/patch/5382141/ - ARM: dts: rk3288: add
arm,cpu-registers-not-fw-configured
4. Revert (b77d439 ARM: dts: rockchip: temporarily disable smp on
rk3288)
5. https://patchwork.kernel.org/patch/5325111/ - usb: dwc2: resume
root hub when device detect with suspend state
6. https://patchwork.kernel.org/patch/5410611/ - ARM: rockchip: add
suspend and resume for RK3288
7. https://patchwork.kernel.org/patch/5410621/ - ARM: rockchip: Add
pmu-sram binding
8. https://patchwork.kernel.org/patch/5410631/ - ARM: dts: add RK3288
suspend support
9. https://patchwork.kernel.org/patch/5410641/ - ARM: dts: rockchip:
add suspend settings for rk3288-evb-rk808
It looks like my pinctrl patches might be dropped due to cross
dependency problems, so tomorrow's linux-next will probably also need
(https://patchwork.kernel.org/patch/5344551/ - pinctrl: rockchip:
Handle wakeup pins).
I've also got a local hack to the Rockchip "pm.c" to replace the usage
of "PMU_ARMINT_WAKEUP_EN" with 0x0e. There seems to be some sort of
ARM Interrupt waking us up all the time right when we go to sleep and
the above will hack it so that only GPIOs + SDMMC Card Detect can wake
us up. Someone should track down what's going on there, but for now
I've used the hack to prove that the basic code actually works.
Chris,
On Mon, Dec 1, 2014 at 12:52 AM, Chris Zhong <[email protected]> wrote:
> Add suspend-voltages and necessary pin-states for suspend on
> rk3288-evb-rk808 boards. global_pwroff would be pulled high when
> RK3288 entering suspend, this pin is a sleep signal for RK808, so
> RK808 could goto sleep mode, and some regulators would be disable.
>
> Signed-off-by: Chris Zhong <[email protected]>
>
> ---
>
> Changes in v10:
> - remove regulator-suspend-mem-enabled and regulator-suspend-mem-microvolt
> - enable the lcd, codec, sdmmc power during suspend
>
> Changes in v9:
> - update the subject and description
>
> Changes in v8:
> - keep all except cpu&tp power rail on during suspend
> - add regulator-on-in-suspend before set suspend voltage
> - add a reference of ddrio_pwroff and ddr0_retention
>
> Changes in v7:
> - add regulator-state-mem sub node for suspend
>
> Changes in v6: None
> Changes in v5: None
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
>
> arch/arm/boot/dts/rk3288-evb-rk808.dts | 53 +++++++++++++++++++++++++++++++++-
> 1 file changed, 52 insertions(+), 1 deletion(-)
I'm still not 100% clear on why it wakes up by itself, but I guess (?)
that could be solved in a separate patch. I did confirm that if I
hacked the wakeup source to be just from GPIOs that it stayed asleep
and could be awakened by the power button. I tested on linux-next
with evb-rk808.
Reviewed-by: Doug Anderson <[email protected]>
Tested-by: Doug Anderson <[email protected]>
-Doug
Hi,
On Mon, Dec 1, 2014 at 2:08 PM, Doug Anderson <[email protected]> wrote:
> Hi,
>
> On Mon, Dec 1, 2014 at 11:51 AM, Kevin Hilman <[email protected]> wrote:
>> Chris Zhong <[email protected]> writes:
>>
>>> devices, since we still lack power_domain driver, so the other power rail
>>> of rk3288 need keep power on.
>>> I have tested it on rk3288-evb board, atop next-20141112. goto suspend by type
>>> "echo mem > /sys/power/state", vdd_cpu is about 0mv by measuring, so it can be
>>> determined in sleep mode, then press power button to wakeup it.
>>
>> I tested this on top of today's linux-next (next-20141201) and it
>> suspends, but doesn't wake up from any of the button presses. What
>> wakeup sources are configured for the rk3288-evb-rk808?
>
> Just to close the loop (I talked with Kevin over IM about this, too):
>
> I have a huge description of how I tested this as part of my patch at
> <https://patchwork.kernel.org/patch/5414941/>. Chris: I think Kevin
> has asked you several times to include information like this in your
> cover letter. Please, please, please can you try to remember to do
> this?
Talked to Chris offline. He said that in his tests the other patches
weren't needed, so he didn't list any other patches. Things just
worked for him. ...so I guess he did post the instructions that
worked for him. Sorry for the complaint. Possibly things are
different on "next-20141112" and that's where Chris said he tested.
I know that I personally needed some of the extra patches. I guess
the USB one wasn't truly needed (only needed for hotplug), but for me
things were unhappy without SMP. It was hanging when trying to turn
off secondary CPUs. I didn't dig, though. The clocksource patches
are needed for me because I'm using an old bootloader, but I think
they're also relevant for S2R because (I'm told) we can lose the
virtual offset at suspend time in certain modes.
-Doug
.
On 12/02/2014 06:08 AM, Doug Anderson wrote:
> Hi,
>
> On Mon, Dec 1, 2014 at 11:51 AM, Kevin Hilman <[email protected]> wrote:
>> Chris Zhong <[email protected]> writes:
>>
>>> devices, since we still lack power_domain driver, so the other power rail
>>> of rk3288 need keep power on.
>>> I have tested it on rk3288-evb board, atop next-20141112. goto suspend by type
>>> "echo mem > /sys/power/state", vdd_cpu is about 0mv by measuring, so it can be
>>> determined in sleep mode, then press power button to wakeup it.
>> I tested this on top of today's linux-next (next-20141201) and it
>> suspends, but doesn't wake up from any of the button presses. What
>> wakeup sources are configured for the rk3288-evb-rk808?
> Just to close the loop (I talked with Kevin over IM about this, too):
>
> I have a huge description of how I tested this as part of my patch at
> <https://patchwork.kernel.org/patch/5414941/>. Chris: I think Kevin
> has asked you several times to include information like this in your
> cover letter. Please, please, please can you try to remember to do
> this?
I wrote it to v8 cover letter, but I found that they are all landed on
linux-next now, so I remove they from v9, v10.
Based on:
[v5,1/6] ARM: rockchip: convert to regmap and use pmu syscon if available
https://patchwork.kernel.org/patch/5086341/
[v5,2/6] ARM: rockchip: add option to access the pmu via a phandle in smp_operations
https://patchwork.kernel.org/patch/5086441/
[v5,3/6] ARM: dts: rockchip: add pmu references to cpus nodes
https://patchwork.kernel.org/patch/5086351/
[v5,4/6] ARM: rockchip: add basic smp support for rk3288
https://patchwork.kernel.org/patch/5086371/
[v5,5/6] ARM: dts: rockchip: add intmem node for rk3288 smp support
https://patchwork.kernel.org/patch/5086361/
[v5,6/6] ARM: dts: rockchip: add reset for CPU nodes
https://patchwork.kernel.org/patch/5086381/
[v3] usb: dwc2: add bus suspend/resume for dwc2
https://patchwork.kernel.org/patch/5266281/
But I missed this 3 patches, since I thought they just for fix timer
disorder when I use coreboot.
Doug said they are related to SMP and related to suspend/resume.
1. https://patchwork.kernel.org/patch/5051881/ - clocksource:
arch_timer: Allow the device tree to specify uninitialized timer
registers
2. https://patchwork.kernel.org/patch/5363671/ - clocksource:
arch_timer: Fix code to use physical timers when requested
3. https://patchwork.kernel.org/patch/5382141/ - ARM: dts: rk3288: add
arm,cpu-registers-not-fw-configured
I'm not sure whether we need these 2 patches.
4. Revert (b77d439 ARM: dts: rockchip: temporarily disable smp on
rk3288)
5. https://patchwork.kernel.org/patch/5325111/ - usb: dwc2: resume
root hub when device detect with suspend state
>
> For those that don't want to click on my link, I'll include the
> relevant bits here:
>
> ---
>
> Total patches atop that version of Linux were:
>
> 1. https://patchwork.kernel.org/patch/5051881/ - clocksource:
> arch_timer: Allow the device tree to specify uninitialized timer
> registers
>
> 2. https://patchwork.kernel.org/patch/5363671/ - clocksource:
> arch_timer: Fix code to use physical timers when requested
>
> 3. https://patchwork.kernel.org/patch/5382141/ - ARM: dts: rk3288: add
> arm,cpu-registers-not-fw-configured
>
> 4. Revert (b77d439 ARM: dts: rockchip: temporarily disable smp on
> rk3288)
>
> 5. https://patchwork.kernel.org/patch/5325111/ - usb: dwc2: resume
> root hub when device detect with suspend state
>
> 6. https://patchwork.kernel.org/patch/5410611/ - ARM: rockchip: add
> suspend and resume for RK3288
>
> 7. https://patchwork.kernel.org/patch/5410621/ - ARM: rockchip: Add
> pmu-sram binding
>
> 8. https://patchwork.kernel.org/patch/5410631/ - ARM: dts: add RK3288
> suspend support
>
> 9. https://patchwork.kernel.org/patch/5410641/ - ARM: dts: rockchip:
> add suspend settings for rk3288-evb-rk808
>
> It looks like my pinctrl patches might be dropped due to cross
> dependency problems, so tomorrow's linux-next will probably also need
> (https://patchwork.kernel.org/patch/5344551/ - pinctrl: rockchip:
> Handle wakeup pins).
>
> I've also got a local hack to the Rockchip "pm.c" to replace the usage
> of "PMU_ARMINT_WAKEUP_EN" with 0x0e. There seems to be some sort of
> ARM Interrupt waking us up all the time right when we go to sleep and
> the above will hack it so that only GPIOs + SDMMC Card Detect can wake
> us up. Someone should track down what's going on there, but for now
> I've used the hack to prove that the basic code actually works.
>
>
>
Doug Anderson <[email protected]> writes:
> Hi,
>
> On Mon, Dec 1, 2014 at 2:08 PM, Doug Anderson <[email protected]> wrote:
>> Hi,
>>
>> On Mon, Dec 1, 2014 at 11:51 AM, Kevin Hilman <[email protected]> wrote:
>>> Chris Zhong <[email protected]> writes:
>>>
>>>> devices, since we still lack power_domain driver, so the other power rail
>>>> of rk3288 need keep power on.
>>>> I have tested it on rk3288-evb board, atop next-20141112. goto suspend by type
>>>> "echo mem > /sys/power/state", vdd_cpu is about 0mv by measuring, so it can be
>>>> determined in sleep mode, then press power button to wakeup it.
>>>
>>> I tested this on top of today's linux-next (next-20141201) and it
>>> suspends, but doesn't wake up from any of the button presses. What
>>> wakeup sources are configured for the rk3288-evb-rk808?
>>
>> Just to close the loop (I talked with Kevin over IM about this, too):
>>
>> I have a huge description of how I tested this as part of my patch at
>> <https://patchwork.kernel.org/patch/5414941/>. Chris: I think Kevin
>> has asked you several times to include information like this in your
>> cover letter. Please, please, please can you try to remember to do
>> this?
>
> Talked to Chris offline. He said that in his tests the other patches
> weren't needed, so he didn't list any other patches. Things just
> worked for him. ...so I guess he did post the instructions that
> worked for him. Sorry for the complaint. Possibly things are
> different on "next-20141112" and that's where Chris said he tested.
This series doesn't apply cleanly to next-20141112. Manually applying
(with fuzz), it boots but I have the same results: it suspends, but none
of the buttons wake it up.
Kevin
On 12/02/2014 09:26 AM, Kevin Hilman wrote:
> Doug Anderson <[email protected]> writes:
>
>> Hi,
>>
>> On Mon, Dec 1, 2014 at 2:08 PM, Doug Anderson <[email protected]> wrote:
>>> Hi,
>>>
>>> On Mon, Dec 1, 2014 at 11:51 AM, Kevin Hilman <[email protected]> wrote:
>>>> Chris Zhong <[email protected]> writes:
>>>>
>>>>> devices, since we still lack power_domain driver, so the other power rail
>>>>> of rk3288 need keep power on.
>>>>> I have tested it on rk3288-evb board, atop next-20141112. goto suspend by type
>>>>> "echo mem > /sys/power/state", vdd_cpu is about 0mv by measuring, so it can be
>>>>> determined in sleep mode, then press power button to wakeup it.
>>>> I tested this on top of today's linux-next (next-20141201) and it
>>>> suspends, but doesn't wake up from any of the button presses. What
>>>> wakeup sources are configured for the rk3288-evb-rk808?
>>> Just to close the loop (I talked with Kevin over IM about this, too):
>>>
>>> I have a huge description of how I tested this as part of my patch at
>>> <https://patchwork.kernel.org/patch/5414941/>. Chris: I think Kevin
>>> has asked you several times to include information like this in your
>>> cover letter. Please, please, please can you try to remember to do
>>> this?
>> Talked to Chris offline. He said that in his tests the other patches
>> weren't needed, so he didn't list any other patches. Things just
>> worked for him. ...so I guess he did post the instructions that
>> worked for him. Sorry for the complaint. Possibly things are
>> different on "next-20141112" and that's where Chris said he tested.
> This series doesn't apply cleanly to next-20141112. Manually applying
> (with fuzz), it boots but I have the same results: it suspends, but none
> of the buttons wake it up.
>
> Kevin
>
Hi, Kevin
I have test these patches on evb board base on next-20141128 with a
defconfig[0], and with u-boot[1].
As Doug said, we need below 3 patches for resume.
1.https://patchwork.kernel.org/patch/5051881/ - clocksource:
arch_timer: Allow the device tree to specify uninitialized timer
registers
2.https://patchwork.kernel.org/patch/5363671/ - clocksource:
arch_timer: Fix code to use physical timers when requested
3.https://patchwork.kernel.org/patch/5382141/ - ARM: dts: rk3288: add
arm,cpu-registers-not-fw-configured
And it will auto wakeup, as Heiko said in v8. But I have never notice
before, since the u-boot never enable edp,
and I use the coreboot with edp display.
Actually it is a bug in rk3288, the rk3288 have not 27Mhz clock source,
but the edp initially set to this
non-existent clock. At this time, edp is working on a unknown state, and
it always bring a interrupt, this
interrupt avoid system enter suspend. So if we want to enter suspend
normally, the edp_24m_sel(bit 15) of
CRU_CLKSEL28_CON(0xff7600d0) must be set to 1.
[0]
https://github.com/mmind/linux-rockchip/blob/devel/workbench/arch/arm/configs/rk3288_defconfig
[1] https://githubremotes/origin/u-boot-rk3288
here is my local work around:
diff --git a/arch//cpu/armv7/rk32xx/clock-rk3288.c
b/arch/arm/cpu/armv7/rk32xx/clock-rk3288.c
index cfd0acd..3df0900 100755
--- a/arch/arm/cpu/armv7/rk32xx/clock-rk3288.c
+++ b/arch/arm/cpu/armv7/rk32xx/clock-rk3288.c
@@ -1233,7 +1233,6 @@ int rkclk_lcdc_clk_set(uint32 lcdc_id, uint32 dclk_hz)
}
}
-
/*
* rkplat set nandc clock div
* nandc_id: nandc id
@@ -1270,6 +1269,11 @@ int rkclk_set_nandc_div(uint32 nandc_id, uint32
pllsrc, uint32 freq)
return 0;
}
+void rkclk_init_edp_source(void)
+{
+ cru_writel(1<<15 | 1<<31, CRU_CLKSELS_CON(28));
+}
+
/*
* rkplat set sd clock src
* 0: codec pll; 1: general pll; 2: 24M
diff --git a/board/rockchip/rk32xx/rk32xx.c b/board/rockchip/rk32xx/rk32xx.c
index bfdcf0e..3e19f5d 100755
--- a/board/rockchip/rk32xx/rk32xx.c
+++ b/board/rockchip/rk32xx/rk32xx.c
@@ -114,7 +114,7 @@ void rk_backlight_ctrl(int brightness)
void rk_fb_init(unsigned int onoff)
{
-
+ rkclk_init_edp_source();
#ifdef CONFIG_OF_LIBFDT
if (lcd_node == 0) rk_lcd_parse_dt(gd->fdt_blob);
Chris Zhong <[email protected]> writes:
[...]
> I have test these patches on evb board base on next-20141128 with a
> defconfig[0], and with u-boot[1].
> As Doug said, we need below 3 patches for resume.
>
> 1.https://patchwork.kernel.org/patch/5051881/ - clocksource:
> arch_timer: Allow the device tree to specify uninitialized timer
> registers
>
> 2.https://patchwork.kernel.org/patch/5363671/ - clocksource:
> arch_timer: Fix code to use physical timers when requested
>
> 3.https://patchwork.kernel.org/patch/5382141/ - ARM: dts: rk3288: add
> arm,cpu-registers-not-fw-configured
>
>
> And it will auto wakeup, as Heiko said in v8.
OK, with your series plus those 3 patches on top of next-20141128, I'm
now seeing it auto-wakeup, either with multi_v7_defconfig or Heiko's
rk3288_defconfig.
> But I have never notice before, since the u-boot never enable edp, and
> I use the coreboot with edp display. Actually it is a bug in rk3288,
> the rk3288 have not 27Mhz clock source, but the edp initially set to
> this non-existent clock. At this time, edp is working on a unknown
> state, and it always bring a interrupt, this interrupt avoid system
> enter suspend.
I see, good find!
> So if we want to enter suspend normally, the
> edp_24m_sel(bit 15) of CRU_CLKSEL28_CON(0xff7600d0) must be set to 1.
I didn't try your u-boot fix, but it sounds like there should be a kernel
fix for this. Why doesn't the disabling of unused clocks put the EDP
into a safe/disabled state?
Kevin
Hi,
Am Mittwoch, 3. Dezember 2014, 11:23:26 schrieb Kevin Hilman:
> Chris Zhong <[email protected]> writes:
>
> [...]
>
> > I have test these patches on evb board base on next-20141128 with a
> > defconfig[0], and with u-boot[1].
> > As Doug said, we need below 3 patches for resume.
> >
> > 1.https://patchwork.kernel.org/patch/5051881/ - clocksource:
> > arch_timer: Allow the device tree to specify uninitialized timer
> > registers
> >
> > 2.https://patchwork.kernel.org/patch/5363671/ - clocksource:
> > arch_timer: Fix code to use physical timers when requested
> >
> > 3.https://patchwork.kernel.org/patch/5382141/ - ARM: dts: rk3288: add
> >
> > arm,cpu-registers-not-fw-configured
> >
> > And it will auto wakeup, as Heiko said in v8.
>
> OK, with your series plus those 3 patches on top of next-20141128, I'm
> now seeing it auto-wakeup, either with multi_v7_defconfig or Heiko's
> rk3288_defconfig.
>
> > But I have never notice before, since the u-boot never enable edp, and
> > I use the coreboot with edp display. Actually it is a bug in rk3288,
> > the rk3288 have not 27Mhz clock source, but the edp initially set to
> > this non-existent clock. At this time, edp is working on a unknown
> > state, and it always bring a interrupt, this interrupt avoid system
> > enter suspend.
>
> I see, good find!
I think the "problem" might be a different one.
With Chris' short patch [0] enabling a bit of gic debug output on resume I was
able to track down where my wakeup comes from and it seems to be the
sdmmc_detect_n interrupt. When I have a sd card inserted it wakes up again
directly and when I remove it it stays asleep till I wake it with the power-
button.
Relevant output would be:
gic_cpu_restore add = f0000000, 0, 0, 0, 0, 8
I have verified that at least for me the sclk_edp_24m has no influence on this,
by using an uboot that does not reparent the edp clock (it stays an orphan)
and an uboot that reparents it to xin24m.
In both cases the system wakes up directly when I have a sd card in the slot
and stays asleep (till pressing the power-key) when I remove the card.
So the auto-wakeup is not the fault of the new suspend-code, but we should
find a way to tame sdmmc_detect_n :-)
Now I only need to check why I get a
rk3288_suspend_finish: Suspend finish failed
on every resume [1], but that is something for tomorrow.
Heiko
[0]
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index d617ee5..37d5ce0 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -538,6 +538,7 @@ static void gic_cpu_restore(unsigned int gic_nr)
u32 *ptr;
void __iomem *dist_base;
void __iomem *cpu_base;
+ u32 reg[5];
if (gic_nr >= MAX_GIC_NR)
BUG();
@@ -562,6 +563,10 @@ static void gic_cpu_restore(unsigned int gic_nr)
writel_relaxed(GICC_INT_PRI_THRESHOLD, cpu_base + GIC_CPU_PRIMASK);
gic_cpu_if_up();
+
+ for (i = 0; i < 5; i++)
+ reg[i] = readl_relaxed(dist_base + 0x200 + i * 4);
+ printk("%s add = %x, %x, %x, %x, %x, %x\n",__func__, dist_base, reg[0], reg[1], reg[2], reg[3], reg[4]);
}
static int gic_notifier(struct notifier_block *self, unsigned long cmd, void *v)
[1]
Disabling non-boot CPUs ...
CPU1: shutdown
CPU2: shutdown
CPU3: shutdown
gic_cpu_restore add = f0000000, 0, 0, 0, 20000, 0
Enabling non-boot CPUs ...
CPU1 is up
CPU2 is up
CPU3 is up
PM: noirq resume of devices complete after 0.892 msecs
PM: early resume of devices complete after 0.991 msecs
rk3288_suspend_finish: Suspend finish failed
PM: resume of devices complete after 2.496 msecs