2018-12-30 16:10:43

by Stefan Agner

[permalink] [raw]
Subject: [PATCH 0/3] ARM: trivial assembly fixes to enable LLVM as

During the last few days I tried compiling the kernel for ARM32 with
LLVMs integrated assembler. The elephant in the room is definitely the
unified syntax which is required by the LLVM assembler. I converted most
mnemonics using a regex, but it is not perfect and needs some manual fixes.
I am not sure if this is the right approach, feedback welcome. I plan to
send fixes in groups in the next few weeks, if that effort is welcome.

There are a couple of other issues besides unified syntax, e.g. lack of
feature argument parsing (e.g. armv7-a+sec).

This patchset is a starting point to enable LLVM integrated assembler and
contains some trivial changes. With this patchset the LLVM integrated
assembler can be used to assemble almost all C files.

Stefan Agner (3):
ARM: fix argument count to match macro definition
ARM: uaccess: use unified assembler language syntax
ARM: spinlock: use unified assembler language syntax

arch/arm/include/asm/spinlock.h | 2 +-
arch/arm/include/asm/uaccess.h | 2 +-
arch/arm/lib/copy_template.S | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)

--
2.20.1



2018-12-30 16:10:43

by Stefan Agner

[permalink] [raw]
Subject: [PATCH 3/3] ARM: spinlock: use unified assembler language syntax

Convert the conditional infix to a postfix to make sure this inline
assembly is unified syntax.

Signed-off-by: Stefan Agner <[email protected]>
---
arch/arm/include/asm/spinlock.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/spinlock.h b/arch/arm/include/asm/spinlock.h
index 099c78fcf62d..563ecedf2a1f 100644
--- a/arch/arm/include/asm/spinlock.h
+++ b/arch/arm/include/asm/spinlock.h
@@ -214,7 +214,7 @@ static inline void arch_read_lock(arch_rwlock_t *rw)
" adds %0, %0, #1\n"
" strexpl %1, %0, [%2]\n"
WFE("mi")
-" rsbpls %0, %1, #0\n"
+" rsbspl %0, %1, #0\n"
" bmi 1b"
: "=&r" (tmp), "=&r" (tmp2)
: "r" (&rw->lock)
--
2.20.1


2018-12-30 16:10:43

by Stefan Agner

[permalink] [raw]
Subject: [PATCH 1/3] ARM: fix argument count to match macro definition

The macro str8w takes 10 arguments, abort being the 10th. In this
particular instantiation the abort argument is passed as 11th
argument leading to an error when using LLVM's integrated
assembler:
<instantiation>:46:47: error: too many positional arguments
str8w r0, r3, r4, r5, r6, r7, r8, r9, ip, , abort=19f
^
arch/arm/lib/copy_template.S:277:5: note: while in macro instantiation
18: forward_copy_shift pull=24 push=8
^

The argument is not used in the macro hence this does not change
code generation.

Signed-off-by: Stefan Agner <[email protected]>
---
arch/arm/lib/copy_template.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/lib/copy_template.S b/arch/arm/lib/copy_template.S
index 652e4d98cd47..2d54491b0e22 100644
--- a/arch/arm/lib/copy_template.S
+++ b/arch/arm/lib/copy_template.S
@@ -241,7 +241,7 @@
orr r9, r9, ip, lspush #\push
mov ip, ip, lspull #\pull
orr ip, ip, lr, lspush #\push
- str8w r0, r3, r4, r5, r6, r7, r8, r9, ip, , abort=19f
+ str8w r0, r3, r4, r5, r6, r7, r8, r9, ip, abort=19f
bge 12b
PLD( cmn r2, #96 )
PLD( bge 13b )
--
2.20.1


2018-12-30 16:11:36

by Stefan Agner

[permalink] [raw]
Subject: [PATCH 2/3] ARM: uaccess: use unified assembler language syntax

Convert the conditional infix to a postfix to make sure this inline
assembly is unified syntax.

Signed-off-by: Stefan Agner <[email protected]>
---
arch/arm/include/asm/uaccess.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
index 6390a40f16e7..9327bb5e1e58 100644
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@ -86,7 +86,7 @@ static inline void set_fs(mm_segment_t fs)
#define __range_ok(addr, size) ({ \
unsigned long flag, roksum; \
__chk_user_ptr(addr); \
- __asm__("adds %1, %2, %3; sbcccs %1, %1, %0; movcc %0, #0" \
+ __asm__("adds %1, %2, %3; sbcscc %1, %1, %0; movcc %0, #0" \
: "=&r" (flag), "=&r" (roksum) \
: "r" (addr), "Ir" (size), "0" (current_thread_info()->addr_limit) \
: "cc"); \
--
2.20.1


2018-12-30 19:35:19

by kernel test robot

[permalink] [raw]
Subject: Re: [PATCH 2/3] ARM: uaccess: use unified assembler language syntax

Hi Stefan,

I love your patch! Yet something to improve:

[auto build test ERROR on arm/for-next]
[also build test ERROR on v4.20 next-20181224]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url: https://github.com/0day-ci/linux/commits/Stefan-Agner/ARM-fix-argument-count-to-match-macro-definition/20181231-001137
base: git://git.armlinux.org.uk/~rmk/linux-arm.git for-next
config: arm-pcm027_defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.2.0 make.cross ARCH=arm

All errors (new ones prefixed by >>):

/tmp/ccSM947n.s: Assembler messages:
>> /tmp/ccSM947n.s:1603: Error: bad instruction `sbcscc ip,ip,r3'
>> /tmp/ccSM947n.s:2036: Error: bad instruction `sbcscc lr,lr,r3'
>> /tmp/ccSM947n.s:2079: Error: bad instruction `sbcscc r1,r1,ip'
>> /tmp/ccSM947n.s:2237: Error: bad instruction `sbcscc r4,r4,r3'
--
/tmp/ccpLxmD2.s: Assembler messages:
>> /tmp/ccpLxmD2.s:217: Error: bad instruction `sbcscc r0,r0,r3'
/tmp/ccpLxmD2.s:410: Error: bad instruction `sbcscc r1,r1,ip'
>> /tmp/ccpLxmD2.s:607: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccpLxmD2.s:676: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccpLxmD2.s:739: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccpLxmD2.s:782: Error: bad instruction `sbcscc r0,r0,r3'
/tmp/ccpLxmD2.s:1058: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccpLxmD2.s:1095: Error: bad instruction `sbcscc r0,r0,r3'
/tmp/ccpLxmD2.s:1191: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccpLxmD2.s:1210: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccpLxmD2.s:1261: Error: bad instruction `sbcscc r0,r0,r3'
/tmp/ccpLxmD2.s:1313: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccpLxmD2.s:1361: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccpLxmD2.s:1410: Error: bad instruction `sbcscc r0,r0,r3'
/tmp/ccpLxmD2.s:1440: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccpLxmD2.s:1511: Error: bad instruction `sbcscc r1,r1,r3'
>> /tmp/ccpLxmD2.s:1593: Error: bad instruction `sbcscc r2,r2,r3'
/tmp/ccpLxmD2.s:1637: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccpLxmD2.s:1692: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccpLxmD2.s:1772: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccpLxmD2.s:1820: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccpLxmD2.s:1889: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccpLxmD2.s:1942: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccpLxmD2.s:1996: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccpLxmD2.s:2090: Error: bad instruction `sbcscc r0,r0,r3'
/tmp/ccpLxmD2.s:2335: Error: bad instruction `sbcscc r1,r1,r3'
>> /tmp/ccpLxmD2.s:2542: Error: bad instruction `sbcscc r0,r0,r1'
--
/tmp/ccAjGERX.s: Assembler messages:
/tmp/ccAjGERX.s:329: Error: bad instruction `sbcscc r1,r1,r3'
>> /tmp/ccAjGERX.s:367: Error: bad instruction `sbcscc r1,r1,r0'
/tmp/ccAjGERX.s:552: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccAjGERX.s:698: Error: bad instruction `sbcscc r1,r1,r3'
--
/tmp/ccQ0YGje.s: Assembler messages:
>> /tmp/ccQ0YGje.s:864: Error: bad instruction `sbcscc ip,ip,r8'
>> /tmp/ccQ0YGje.s:3564: Error: bad instruction `sbcscc r0,r0,r2'
/tmp/ccQ0YGje.s:3603: Error: bad instruction `sbcscc r0,r0,r2'
--
/tmp/ccSrZAfg.s: Assembler messages:
/tmp/ccSrZAfg.s:595: Error: bad instruction `sbcscc ip,ip,r3'
>> /tmp/ccSrZAfg.s:893: Error: bad instruction `sbcscc r1,r1,r2'
/tmp/ccSrZAfg.s:1084: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccSrZAfg.s:1342: Error: bad instruction `sbcscc r0,r0,r2'
/tmp/ccSrZAfg.s:1379: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccSrZAfg.s:1628: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccSrZAfg.s:1697: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccSrZAfg.s:1782: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccSrZAfg.s:1827: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccSrZAfg.s:1922: Error: bad instruction `sbcscc r1,r1,r3'
--
/tmp/ccQVk2bL.s: Assembler messages:
>> /tmp/ccQVk2bL.s:339: Error: bad instruction `sbcscc r2,r2,r5'
/tmp/ccQVk2bL.s:785: Error: bad instruction `sbcscc r1,r1,r3'
--
/tmp/cctwQj9v.s: Assembler messages:
/tmp/cctwQj9v.s:3331: Error: bad instruction `sbcscc r1,r1,r2'
>> /tmp/cctwQj9v.s:3454: Error: bad instruction `sbcscc ip,ip,r1'
>> /tmp/cctwQj9v.s:3886: Error: bad instruction `sbcscc r6,r6,r3'
>> /tmp/cctwQj9v.s:4053: Error: bad instruction `sbcscc r3,r3,ip'
/tmp/cctwQj9v.s:4501: Error: bad instruction `sbcscc r1,r1,r3'
--
/tmp/ccdaVsdC.s: Assembler messages:
/tmp/ccdaVsdC.s:1040: Error: bad instruction `sbcscc r0,r0,r3'
/tmp/ccdaVsdC.s:1117: Error: bad instruction `sbcscc r1,r1,r2'
/tmp/ccdaVsdC.s:1169: Error: bad instruction `sbcscc r1,r1,r2'
/tmp/ccdaVsdC.s:1490: Error: bad instruction `sbcscc ip,ip,r3'
/tmp/ccdaVsdC.s:1608: Error: bad instruction `sbcscc r2,r2,r3'
/tmp/ccdaVsdC.s:1645: Error: bad instruction `sbcscc r2,r2,r3'
/tmp/ccdaVsdC.s:2127: Error: bad instruction `sbcscc lr,lr,r3'
/tmp/ccdaVsdC.s:2178: Error: bad instruction `sbcscc r2,r2,r3'
/tmp/ccdaVsdC.s:2254: Error: bad instruction `sbcscc r0,r0,r3'
/tmp/ccdaVsdC.s:3002: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccdaVsdC.s:3090: Error: bad instruction `sbcscc ip,ip,r3'
/tmp/ccdaVsdC.s:3407: Error: bad instruction `sbcscc ip,ip,r3'
>> /tmp/ccdaVsdC.s:3514: Error: bad instruction `sbcscc ip,ip,r2'
/tmp/ccdaVsdC.s:4601: Error: bad instruction `sbcscc r0,r0,r3'
/tmp/ccdaVsdC.s:4903: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccdaVsdC.s:5002: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccdaVsdC.s:5357: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccdaVsdC.s:5423: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccdaVsdC.s:5482: Error: bad instruction `sbcscc r2,r2,r3'
/tmp/ccdaVsdC.s:5536: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccdaVsdC.s:5983: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccdaVsdC.s:6056: Error: bad instruction `sbcscc ip,ip,r2'
/tmp/ccdaVsdC.s:6168: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccdaVsdC.s:6226: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccdaVsdC.s:6439: Error: bad instruction `sbcscc ip,ip,r3'
/tmp/ccdaVsdC.s:6613: Error: bad instruction `sbcscc ip,ip,r3'
/tmp/ccdaVsdC.s:6653: Error: bad instruction `sbcscc r0,r0,r2'
/tmp/ccdaVsdC.s:6722: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccdaVsdC.s:6806: Error: bad instruction `sbcscc r1,r1,r3'
--
/tmp/ccETCYt7.s: Assembler messages:
>> /tmp/ccETCYt7.s:193: Error: bad instruction `sbcscc ip,ip,lr'
>> /tmp/ccETCYt7.s:870: Error: bad instruction `sbcscc r3,r3,r4'
--
/tmp/ccO4VON1.s: Assembler messages:
>> /tmp/ccO4VON1.s:661: Error: bad instruction `sbcscc r5,r5,r3'
/tmp/ccO4VON1.s:761: Error: bad instruction `sbcscc r5,r5,r3'
/tmp/ccO4VON1.s:879: Error: bad instruction `sbcscc r0,r0,r3'
/tmp/ccO4VON1.s:980: Error: bad instruction `sbcscc r0,r0,r3'
/tmp/ccO4VON1.s:1465: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccO4VON1.s:1618: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccO4VON1.s:1689: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/ccO4VON1.s:1768: Error: bad instruction `sbcscc r0,r0,r3'
/tmp/ccO4VON1.s:1808: Error: bad instruction `sbcscc r2,r2,r3'
--
/tmp/cc3U7xxJ.s: Assembler messages:
/tmp/cc3U7xxJ.s:284: Error: bad instruction `sbcscc ip,ip,r3'
/tmp/cc3U7xxJ.s:1487: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/cc3U7xxJ.s:1596: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/cc3U7xxJ.s:2047: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/cc3U7xxJ.s:2120: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/cc3U7xxJ.s:2352: Error: bad instruction `sbcscc r1,r1,r3'
/tmp/cc3U7xxJ.s:2617: Error: bad instruction `sbcscc r0,r0,r2'
>> /tmp/cc3U7xxJ.s:2800: Error: bad instruction `sbcscc r7,r7,r3'
..

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2018-12-30 21:32:06

by kernel test robot

[permalink] [raw]
Subject: Re: [PATCH 3/3] ARM: spinlock: use unified assembler language syntax

Hi Stefan,

I love your patch! Yet something to improve:

[auto build test ERROR on arm/for-next]
[also build test ERROR on v4.20 next-20181224]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url: https://github.com/0day-ci/linux/commits/Stefan-Agner/ARM-fix-argument-count-to-match-macro-definition/20181231-001137
base: git://git.armlinux.org.uk/~rmk/linux-arm.git for-next
config: arm-tango4_defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.2.0 make.cross ARCH=arm

All errors (new ones prefixed by >>):

/tmp/cc9eoIEp.s: Assembler messages:
/tmp/cc9eoIEp.s:247: Error: bad instruction `rsbspl r3,r2,#0'
/tmp/cc9eoIEp.s:351: Error: bad instruction `rsbspl r3,r2,#0'
>> /tmp/cc9eoIEp.s:463: Error: bad instruction `rsbspl r3,r1,#0'
/tmp/cc9eoIEp.s:659: Error: bad instruction `rsbspl r3,r2,#0'

---
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2019-01-02 16:30:57

by Stefan Agner

[permalink] [raw]
Subject: Re: [PATCH 2/3] ARM: uaccess: use unified assembler language syntax

On 30.12.2018 20:12, kbuild test robot wrote:
> Hi Stefan,
>
> I love your patch! Yet something to improve:
>
> [auto build test ERROR on arm/for-next]
> [also build test ERROR on v4.20 next-20181224]
> [if your patch is applied to the wrong git tree, please drop us a note
> to help improve the system]
>
> url:
> https://github.com/0day-ci/linux/commits/Stefan-Agner/ARM-fix-argument-count-to-match-macro-definition/20181231-001137
> base: git://git.armlinux.org.uk/~rmk/linux-arm.git for-next
> config: arm-ebsa110_defconfig (attached as .config)
> compiler: arm-linux-gnueabi-gcc (Debian 7.2.0-11) 7.2.0
> reproduce:
> wget
> https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross
> -O ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # save the attached .config to linux build tree
> GCC_VERSION=7.2.0 make.cross ARCH=arm
>
> All errors (new ones prefixed by >>):
>
> /tmp/ccfKN3IW.s: Assembler messages:
> /tmp/ccfKN3IW.s:26: Error: bad instruction `sbcscc r1,r1,r3'
>>> /tmp/ccfKN3IW.s:94: Error: bad instruction `sbcscc r8,r8,r0'
> /tmp/ccfKN3IW.s:104: Error: bad instruction `sbcscc r0,r0,r2'
> /tmp/ccfKN3IW.s:155: Error: bad instruction `sbcscc lr,lr,r2'
> /tmp/ccfKN3IW.s:630: Error: bad instruction `sbcscc r1,r1,r2'

Hm, it seems that gcc always assumes inline assembly is in non-unified
syntax when compiling using -marm:

.syntax divided
@ 244 "arch/arm/kernel/signal.c" 1
adds ip, r1, #760; sbcscc ip, ip, r3; movcc r3, #0
@ 0 "" 2

It seems that gcc would have an option to force unified syntax when
generating code for ARM state (-marm) using -masm-syntax-unified.
However, unfortunately, this seems currently broken. I created a bug in
the gcc bug tracker:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88648

The only solution I found is using ".syntax unified" in inline assembly,
not pretty but seems to do the job... Will send a v2.

--
Stefan



> --
> /tmp/cc9oa73P.s: Assembler messages:
> /tmp/cc9oa73P.s:2036: Error: bad instruction `sbcscc r1,r1,r3'
> /tmp/cc9oa73P.s:3325: Error: bad instruction `sbcscc r3,r3,r0'
> /tmp/cc9oa73P.s:3724: Error: bad instruction `sbcscc r2,r2,r3'
> /tmp/cc9oa73P.s:4242: Error: bad instruction `sbcscc r1,r1,r3'
>>> /tmp/cc9oa73P.s:4304: Error: bad instruction `sbcscc r10,r10,r2'
> /tmp/cc9oa73P.s:4831: Error: bad instruction `sbcscc r1,r1,r3'
> /tmp/cc9oa73P.s:4973: Error: bad instruction `sbcscc r1,r1,r3'
> /tmp/cc9oa73P.s:5059: Error: bad instruction `sbcscc r0,r0,r2'
> /tmp/cc9oa73P.s:5076: Error: bad instruction `sbcscc r0,r0,r2'
> /tmp/cc9oa73P.s:5120: Error: bad instruction `sbcscc r1,r1,r3'
> --
> /tmp/ccnaC92i.s: Assembler messages:
>>> /tmp/ccnaC92i.s:133: Error: bad instruction `sbcscc r7,r7,r1'
> /tmp/ccnaC92i.s:225: Error: bad instruction `sbcscc r1,r1,r3'
> /tmp/ccnaC92i.s:631: Error: bad instruction `sbcscc ip,ip,r3'
>
> ---
> 0-DAY kernel test infrastructure Open Source Technology Center
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