2020-01-28 09:08:35

by Ludovic Barre

Subject: [PATCH V2 9/9] mmc: mmci: add sdmmc variant revision 2.0

This patch adds a sdmmc variant revision 2.0.
This revision is backward compatible with 1.1, and adds dma
link list support.

Signed-off-by: Ludovic Barre <[email protected]>
---
drivers/mmc/host/mmci.c | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)

diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 24e630183ed4..a774c329c212 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -275,6 +275,31 @@ static struct variant_data variant_stm32_sdmmc = {
.init = sdmmc_variant_init,
};

+static struct variant_data variant_stm32_sdmmcv2 = {
+ .fifosize = 16 * 4,
+ .fifohalfsize = 8 * 4,
+ .f_max = 208000000,
+ .stm32_clkdiv = true,
+ .cmdreg_cpsm_enable = MCI_CPSM_STM32_ENABLE,
+ .cmdreg_lrsp_crc = MCI_CPSM_STM32_LRSP_CRC,
+ .cmdreg_srsp_crc = MCI_CPSM_STM32_SRSP_CRC,
+ .cmdreg_srsp = MCI_CPSM_STM32_SRSP,
+ .cmdreg_stop = MCI_CPSM_STM32_CMDSTOP,
+ .data_cmd_enable = MCI_CPSM_STM32_CMDTRANS,
+ .irq_pio_mask = MCI_IRQ_PIO_STM32_MASK,
+ .datactrl_first = true,
+ .datacnt_useless = true,
+ .datalength_bits = 25,
+ .datactrl_blocksz = 14,
+ .datactrl_any_blocksz = true,
+ .stm32_idmabsize_mask = GENMASK(16, 5),
+ .dma_lli = true,
+ .busy_timeout = true,
+ .busy_detect_flag = MCI_STM32_BUSYD0,
+ .busy_detect_mask = MCI_STM32_BUSYD0ENDMASK,
+ .init = sdmmc_variant_init,
+};
+
static struct variant_data variant_qcom = {
.fifosize = 16 * 4,
.fifohalfsize = 8 * 4,
@@ -2343,6 +2368,11 @@ static const struct amba_id mmci_ids[] = {
.mask = 0xf0ffffff,
.data = &variant_stm32_sdmmc,
},
+ {
+ .id = 0x00253180,
+ .mask = 0xf0ffffff,
+ .data = &variant_stm32_sdmmcv2,
+ },
/* Qualcomm variants */
{
.id = 0x00051180,
--
2.17.1

2020-02-11 16:45:39

by Ludovic Barre

Subject: Re: [PATCH V2 9/9] mmc: mmci: add sdmmc variant revision 2.0

hi Ulf

Le 1/28/20 à 10:06 AM, Ludovic Barre a écrit :
> This patch adds a sdmmc variant revision 2.0.
> This revision is backward compatible with 1.1, and adds dma
> link list support.
>
> Signed-off-by: Ludovic Barre <[email protected]>
> ---
> drivers/mmc/host/mmci.c | 30 ++++++++++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
> diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
> index 24e630183ed4..a774c329c212 100644
> --- a/drivers/mmc/host/mmci.c
> +++ b/drivers/mmc/host/mmci.c
> @@ -275,6 +275,31 @@ static struct variant_data variant_stm32_sdmmc = {
> .init = sdmmc_variant_init,
> };
>
> +static struct variant_data variant_stm32_sdmmcv2 = {
> + .fifosize = 16 * 4,
> + .fifohalfsize = 8 * 4,
> + .f_max = 208000000,
> + .stm32_clkdiv = true,
> + .cmdreg_cpsm_enable = MCI_CPSM_STM32_ENABLE,
> + .cmdreg_lrsp_crc = MCI_CPSM_STM32_LRSP_CRC,
> + .cmdreg_srsp_crc = MCI_CPSM_STM32_SRSP_CRC,
> + .cmdreg_srsp = MCI_CPSM_STM32_SRSP,
> + .cmdreg_stop = MCI_CPSM_STM32_CMDSTOP,
> + .data_cmd_enable = MCI_CPSM_STM32_CMDTRANS,
> + .irq_pio_mask = MCI_IRQ_PIO_STM32_MASK,
> + .datactrl_first = true,
> + .datacnt_useless = true,
> + .datalength_bits = 25,
> + .datactrl_blocksz = 14,
> + .datactrl_any_blocksz = true,
> + .stm32_idmabsize_mask = GENMASK(16, 5),
> + .dma_lli = true,
> + .busy_timeout = true,

I forget "busy_detect = true," property
I add this in next patch set

> + .busy_detect_flag = MCI_STM32_BUSYD0,
> + .busy_detect_mask = MCI_STM32_BUSYD0ENDMASK,
> + .init = sdmmc_variant_init,
> +};
> +
> static struct variant_data variant_qcom = {
> .fifosize = 16 * 4,
> .fifohalfsize = 8 * 4,
> @@ -2343,6 +2368,11 @@ static const struct amba_id mmci_ids[] = {
> .mask = 0xf0ffffff,
> .data = &variant_stm32_sdmmc,
> },
> + {
> + .id = 0x00253180,
> + .mask = 0xf0ffffff,
> + .data = &variant_stm32_sdmmcv2,
> + },
> /* Qualcomm variants */
> {
> .id = 0x00051180,
>

2020-02-19 10:31:24

by Ulf Hansson

Subject: Re: [PATCH V2 9/9] mmc: mmci: add sdmmc variant revision 2.0

On Tue, 11 Feb 2020 at 15:44, Ludovic BARRE <[email protected]> wrote:
>
> hi Ulf
>
> Le 1/28/20 à 10:06 AM, Ludovic Barre a écrit :
> > This patch adds a sdmmc variant revision 2.0.
> > This revision is backward compatible with 1.1, and adds dma
> > link list support.
> >
> > Signed-off-by: Ludovic Barre <[email protected]>
> > ---
> > drivers/mmc/host/mmci.c | 30 ++++++++++++++++++++++++++++++
> > 1 file changed, 30 insertions(+)
> >
> > diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
> > index 24e630183ed4..a774c329c212 100644
> > --- a/drivers/mmc/host/mmci.c
> > +++ b/drivers/mmc/host/mmci.c
> > @@ -275,6 +275,31 @@ static struct variant_data variant_stm32_sdmmc = {
> > .init = sdmmc_variant_init,
> > };
> >
> > +static struct variant_data variant_stm32_sdmmcv2 = {
> > + .fifosize = 16 * 4,
> > + .fifohalfsize = 8 * 4,
> > + .f_max = 208000000,
> > + .stm32_clkdiv = true,
> > + .cmdreg_cpsm_enable = MCI_CPSM_STM32_ENABLE,
> > + .cmdreg_lrsp_crc = MCI_CPSM_STM32_LRSP_CRC,
> > + .cmdreg_srsp_crc = MCI_CPSM_STM32_SRSP_CRC,
> > + .cmdreg_srsp = MCI_CPSM_STM32_SRSP,
> > + .cmdreg_stop = MCI_CPSM_STM32_CMDSTOP,
> > + .data_cmd_enable = MCI_CPSM_STM32_CMDTRANS,
> > + .irq_pio_mask = MCI_IRQ_PIO_STM32_MASK,
> > + .datactrl_first = true,
> > + .datacnt_useless = true,
> > + .datalength_bits = 25,
> > + .datactrl_blocksz = 14,
> > + .datactrl_any_blocksz = true,
> > + .stm32_idmabsize_mask = GENMASK(16, 5),
> > + .dma_lli = true,
> > + .busy_timeout = true,
>
> I forget "busy_detect = true," property
> I add this in next patch set

No need for a re-send, I amended this when I applied it.

>
> > + .busy_detect_flag = MCI_STM32_BUSYD0,
> > + .busy_detect_mask = MCI_STM32_BUSYD0ENDMASK,
> > + .init = sdmmc_variant_init,
> > +};
> > +
> > static struct variant_data variant_qcom = {
> > .fifosize = 16 * 4,
> > .fifohalfsize = 8 * 4,
> > @@ -2343,6 +2368,11 @@ static const struct amba_id mmci_ids[] = {
> > .mask = 0xf0ffffff,
> > .data = &variant_stm32_sdmmc,
> > },
> > + {
> > + .id = 0x00253180,
> > + .mask = 0xf0ffffff,
> > + .data = &variant_stm32_sdmmcv2,
> > + },
> > /* Qualcomm variants */
> > {
> > .id = 0x00051180,
> >

Kind regards
Uffe