Hello, Linus and folks,
We have ported Linux to the S+CORE processor, which is a 32-bit RISC
embedded
microprocessor of Sunplus Core Technology.
SPG29X, SPG300(score core) processor have been used in game products.
and score toolchain have commit to gnu in 2006. We have a team to maintain
score code for linux kernel.
We would like to release a patch for kernel 2.6.29-rc8.
This patch include score header files, arch files and serial driver for
spct6600(score core) platform.
For the other driver patches, I'll send them one by one in
small size latter. Thanks!
Would you merge them to the stock kernel?
Patch information is slightly bigger, so I placed it on our SunplusCT web
site.
http://www.sunplusct.com/images/linux-score-patch/linux-score-20090324.patch
Signed off by: Chen Liqin <[email protected],
[email protected]>
Thank you.
--
Liqin
On Tue, Mar 24, 2009 at 3:46 AM, <[email protected]> wrote:
> Hello, Linus and folks,
>
> We have ported Linux to the S+CORE processor, which is a 32-bit RISC
> embedded
> microprocessor of Sunplus Core Technology.
>
> SPG29X, SPG300(score core) processor have been used in game products.
> and score toolchain have commit to gnu in 2006. We have a team to maintain
> score code for linux kernel.
>
> We would like to release a patch for kernel 2.6.29-rc8.
> This patch include score header files, arch files and serial driver for
> spct6600(score core) platform.
>
> For the other driver patches, I'll send them one by one in
> small size latter. Thanks!
>
> Would you merge them to the stock kernel?
>
> Patch information is slightly bigger, so I placed it on our SunplusCT web
> site.
> http://www.sunplusct.com/images/linux-score-patch/linux-score-20090324.patch
>
> Signed off by: Chen Liqin <[email protected],
> [email protected]>
To allow people to more easily review your patches it is recommended
to spit them up into smaller pieces and submit them to the mailing
list.
Your port looks relatively clean but it looks like it is borrowing
heavily from the mips port and you may have a few leftovers from that
e.g.:
- mentions of o32 (unless S+CORE has an o32 ABI?)
- compatibility syscalls, sys_ipc, old-style signal handling. Are
these really needed for a new arch?
- does SCORE+ have ll/sc instructions or is that another leftover from MIPS?
- does your port support SMP?