2023-01-16 08:53:42

by Björn Töpel

[permalink] [raw]
Subject: [PATCH v2 0/2] riscv: Dump faulting instructions in oops handler

From: Björn Töpel <[email protected]>

RISC-V does not dump faulting instructions in the oops handler. This
series adds "Code:" dumps to the oops output together with
scripts/decodecode support.

Thanks,
Björn

v1->v2: Dump instructions in 16b parcels (Andreas)

Björn Töpel (2):
riscv: Add instruction dump to RISC-V splats
scripts/decodecode: Add support for RISC-V

arch/riscv/kernel/traps.c | 25 ++++++++++++++++++++++++-
scripts/decodecode | 12 +++++++++++-
2 files changed, 35 insertions(+), 2 deletions(-)


base-commit: 5dc4c995db9eb45f6373a956eb1f69460e69e6d4
--
2.37.2


2023-01-16 09:14:43

by Björn Töpel

[permalink] [raw]
Subject: [PATCH v2 1/2] riscv: Add instruction dump to RISC-V splats

From: Björn Töpel <[email protected]>

Add instruction dump (Code:) output to RISC-V splats. Dump 16b
parcels.

An example:
Unable to handle kernel NULL pointer dereference at virtual address 0000000000000000
Oops [#1]
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 6.2.0-rc3-00302-g840ff44c571d-dirty #27
Hardware name: riscv-virtio,qemu (DT)
epc : kernel_init+0xc8/0x10e
ra : kernel_init+0x70/0x10e
epc : ffffffff80bd9a40 ra : ffffffff80bd99e8 sp : ff2000000060bec0
gp : ffffffff81730b28 tp : ff6000007ff00000 t0 : 7974697275636573
t1 : 0000000000000000 t2 : 3030303270393d6e s0 : ff2000000060bee0
s1 : ffffffff81732028 a0 : 0000000000000000 a1 : ff60000080dd1780
a2 : 0000000000000002 a3 : ffffffff8176a470 a4 : 0000000000000000
a5 : 000000000000000a a6 : 0000000000000081 a7 : ff60000080dd1780
s2 : 0000000000000000 s3 : 0000000000000000 s4 : 0000000000000000
s5 : 0000000000000000 s6 : 0000000000000000 s7 : 0000000000000000
s8 : 0000000000000000 s9 : 0000000000000000 s10: 0000000000000000
s11: 0000000000000000 t3 : ffffffff81186018 t4 : 0000000000000022
t5 : 000000000000003d t6 : 0000000000000000
status: 0000000200000120 badaddr: 0000000000000000 cause: 000000000000000f
[<ffffffff80003528>] ret_from_exception+0x0/0x16
Code: 862a d179 608c a517 0069 0513 2be5 d0ef db2e 47a9 (c11c) a517
---[ end trace 0000000000000000 ]---
Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
SMP: stopping secondary CPUs
---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b ]---

Signed-off-by: Björn Töpel <[email protected]>
---
arch/riscv/kernel/traps.c | 25 ++++++++++++++++++++++++-
1 file changed, 24 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c
index 549bde5c970a..b8f0ea8a9568 100644
--- a/arch/riscv/kernel/traps.c
+++ b/arch/riscv/kernel/traps.c
@@ -29,6 +29,27 @@ int show_unhandled_signals = 1;

static DEFINE_SPINLOCK(die_lock);

+static void dump_kernel_instr(const char *loglvl, struct pt_regs *regs)
+{
+ char str[sizeof("0000 ") * 12 + 2 + 1], *p = str;
+ unsigned long addr = regs->epc;
+ long bad;
+ u16 val;
+ int i;
+
+ for (i = -10; i < 2; i++) {
+ bad = get_kernel_nofault(val, &((u16 *)addr)[i]);
+ if (!bad) {
+ p += sprintf(p, i == 0 ? "(%04hx) " : "%04hx ", val);
+ } else {
+ printk("%sCode: Unable to access instruction at 0x%lx.\n",
+ loglvl, (long)&((u16 *)addr)[i]);
+ return;
+ }
+ }
+ printk("%sCode: %s\n", loglvl, str);
+}
+
void die(struct pt_regs *regs, const char *str)
{
static int die_counter;
@@ -43,8 +64,10 @@ void die(struct pt_regs *regs, const char *str)

pr_emerg("%s [#%d]\n", str, ++die_counter);
print_modules();
- if (regs)
+ if (regs) {
show_regs(regs);
+ dump_kernel_instr(KERN_EMERG, regs);
+ }

cause = regs ? regs->cause : -1;
ret = notify_die(DIE_OOPS, str, regs, 0, cause, SIGSEGV);
--
2.37.2

2023-01-18 12:05:26

by Geert Uytterhoeven

[permalink] [raw]
Subject: Re: [PATCH v2 1/2] riscv: Add instruction dump to RISC-V splats

Hi Björn,

On Mon, Jan 16, 2023 at 8:41 AM Björn Töpel <[email protected]> wrote:
> From: Björn Töpel <[email protected]>
>
> Add instruction dump (Code:) output to RISC-V splats. Dump 16b
> parcels.
>
> An example:
> Unable to handle kernel NULL pointer dereference at virtual address 0000000000000000
> Oops [#1]
> Modules linked in:
> CPU: 0 PID: 1 Comm: swapper/0 Not tainted 6.2.0-rc3-00302-g840ff44c571d-dirty #27
> Hardware name: riscv-virtio,qemu (DT)
> epc : kernel_init+0xc8/0x10e
> ra : kernel_init+0x70/0x10e
> epc : ffffffff80bd9a40 ra : ffffffff80bd99e8 sp : ff2000000060bec0
> gp : ffffffff81730b28 tp : ff6000007ff00000 t0 : 7974697275636573
> t1 : 0000000000000000 t2 : 3030303270393d6e s0 : ff2000000060bee0
> s1 : ffffffff81732028 a0 : 0000000000000000 a1 : ff60000080dd1780
> a2 : 0000000000000002 a3 : ffffffff8176a470 a4 : 0000000000000000
> a5 : 000000000000000a a6 : 0000000000000081 a7 : ff60000080dd1780
> s2 : 0000000000000000 s3 : 0000000000000000 s4 : 0000000000000000
> s5 : 0000000000000000 s6 : 0000000000000000 s7 : 0000000000000000
> s8 : 0000000000000000 s9 : 0000000000000000 s10: 0000000000000000
> s11: 0000000000000000 t3 : ffffffff81186018 t4 : 0000000000000022
> t5 : 000000000000003d t6 : 0000000000000000
> status: 0000000200000120 badaddr: 0000000000000000 cause: 000000000000000f
> [<ffffffff80003528>] ret_from_exception+0x0/0x16
> Code: 862a d179 608c a517 0069 0513 2be5 d0ef db2e 47a9 (c11c) a517
> ---[ end trace 0000000000000000 ]---
> Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
> SMP: stopping secondary CPUs
> ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b ]---
>
> Signed-off-by: Björn Töpel <[email protected]>

Thanks for your patch!

> --- a/arch/riscv/kernel/traps.c
> +++ b/arch/riscv/kernel/traps.c
> @@ -29,6 +29,27 @@ int show_unhandled_signals = 1;
>
> static DEFINE_SPINLOCK(die_lock);
>
> +static void dump_kernel_instr(const char *loglvl, struct pt_regs *regs)
> +{
> + char str[sizeof("0000 ") * 12 + 2 + 1], *p = str;
> + unsigned long addr = regs->epc;

Given you never use this as an unsigned long, what about

const u16 *insns = (u16 *)instruction_pointer(regs);

so you no longer need casts below?

> + long bad;
> + u16 val;
> + int i;
> +
> + for (i = -10; i < 2; i++) {
> + bad = get_kernel_nofault(val, &((u16 *)addr)[i]);
> + if (!bad) {
> + p += sprintf(p, i == 0 ? "(%04hx) " : "%04hx ", val);
> + } else {
> + printk("%sCode: Unable to access instruction at 0x%lx.\n",

%px, so you can drop the cast to long below.

> + loglvl, (long)&((u16 *)addr)[i]);
> + return;
> + }
> + }
> + printk("%sCode: %s\n", loglvl, str);
> +}
> +
> void die(struct pt_regs *regs, const char *str)
> {
> static int die_counter;

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

2023-01-18 13:13:15

by Björn Töpel

[permalink] [raw]
Subject: Re: [PATCH v2 1/2] riscv: Add instruction dump to RISC-V splats

Geert Uytterhoeven <[email protected]> writes:

>> +static void dump_kernel_instr(const char *loglvl, struct pt_regs *regs)
>> +{
>> + char str[sizeof("0000 ") * 12 + 2 + 1], *p = str;
>> + unsigned long addr = regs->epc;
>
> Given you never use this as an unsigned long, what about
>
> const u16 *insns = (u16 *)instruction_pointer(regs);
>
> so you no longer need casts below?

Indeed! Good suggestion, thank you! I'll do this change in v3.

>> + long bad;
>> + u16 val;
>> + int i;
>> +
>> + for (i = -10; i < 2; i++) {
>> + bad = get_kernel_nofault(val, &((u16 *)addr)[i]);
>> + if (!bad) {
>> + p += sprintf(p, i == 0 ? "(%04hx) " : "%04hx ", val);
>> + } else {
>> + printk("%sCode: Unable to access instruction at 0x%lx.\n",
>
> %px, so you can drop the cast to long below.

Much cleaner. Thanks!


Björn