This series patches add the tsadc support in thermal driver and in devicetree for RV1108.
Also add thermal control with Intelligent Power Allocation (IPA) policy by default. Please
refer to https://developer.arm.com/open-source/intelligent-power-allocation for more information
about IPA.
Rocky Hao (5):
dt-bindings: rockchip-thermal: Support the RV1108 SoC compatible
thermal: rockchip: Support the RV1108 SoC in thermal driver
arm: dts: rockchip: add tsadc node for RV1108 SoC
arm: dts: rockchip: add thermal nodes for RV1108 SoC
arm: dts: rockchip: enable tsadc module on RV1108 evaluation board
.../bindings/thermal/rockchip-thermal.txt | 1 +
arch/arm/boot/dts/rv1108-evb.dts | 4 ++
arch/arm/boot/dts/rv1108.dtsi | 69 ++++++++++++++++++++++
drivers/thermal/rockchip_thermal.c | 67 +++++++++++++++++++++
4 files changed, 141 insertions(+)
--
1.9.1
Add tsadc needed main information for RV1108 SoC.
750000Hz is the max clock rate supported by tsadc module.
Signed-off-by: Rocky Hao <[email protected]>
---
arch/arm/boot/dts/rv1108.dtsi | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
index 25fab0b80f53..dbdd8c2180e7 100644
--- a/arch/arm/boot/dts/rv1108.dtsi
+++ b/arch/arm/boot/dts/rv1108.dtsi
@@ -275,6 +275,25 @@
status = "disabled";
};
+ tsadc: tsadc@10370000 {
+ compatible = "rockchip,rv1108-tsadc";
+ reg = <0x10370000 0x100>;
+ interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+ assigned-clocks = <&cru SCLK_TSADC>;
+ assigned-clock-rates = <750000>;
+ clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
+ clock-names = "tsadc", "apb_pclk";
+ pinctrl-names = "init", "default", "sleep";
+ pinctrl-0 = <&otp_gpio>;
+ pinctrl-1 = <&otp_out>;
+ pinctrl-2 = <&otp_gpio>;
+ resets = <&cru SRST_TSADC>;
+ reset-names = "tsadc-apb";
+ rockchip,hw-tshut-temp = <120000>;
+ #thermal-sensor-cells = <1>;
+ status = "disabled";
+ };
+
adc: adc@1038c000 {
compatible = "rockchip,rv1108-saradc", "rockchip,rk3399-saradc";
reg = <0x1038c000 0x100>;
@@ -642,6 +661,16 @@
};
};
+ tsadc {
+ otp_out: otp-out {
+ rockchip,pins = <0 RK_PB7 RK_FUNC_1 &pcfg_pull_none>;
+ };
+
+ otp_gpio: otp-gpio {
+ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
uart0 {
uart0_xfer: uart0-xfer {
rockchip,pins = <3 RK_PA6 RK_FUNC_1 &pcfg_pull_up>,
--
1.9.1
Add a new compatible for thermal founding on RV1108 SoCs.
Signed-off-by: Rocky Hao <[email protected]>
---
Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
index e3a6234fb1ac..43d744e5305e 100644
--- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
@@ -2,6 +2,7 @@
Required properties:
- compatible : should be "rockchip,<name>-tsadc"
+ "rockchip,rv1108-tsadc": found on RV1108 SoCs
"rockchip,rk3228-tsadc": found on RK3228 SoCs
"rockchip,rk3288-tsadc": found on RK3288 SoCs
"rockchip,rk3328-tsadc": found on RK3328 SoCs
--
1.9.1
Enable tsadc module on RV1108 evaluation board
Signed-off-by: Rocky Hao <[email protected]>
---
arch/arm/boot/dts/rv1108-evb.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/rv1108-evb.dts b/arch/arm/boot/dts/rv1108-evb.dts
index 39197c3e9e0e..885f760d8ca1 100644
--- a/arch/arm/boot/dts/rv1108-evb.dts
+++ b/arch/arm/boot/dts/rv1108-evb.dts
@@ -218,6 +218,10 @@
status = "okay";
};
+&tsadc {
+ status = "okay";
+};
+
&uart0 {
status = "okay";
};
--
1.9.1
Add thermal zone and dynamic CPU power coefficients for RV1108
Signed-off-by: Rocky Hao <[email protected]>
---
arch/arm/boot/dts/rv1108.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
index dbdd8c2180e7..cae920b6a145 100644
--- a/arch/arm/boot/dts/rv1108.dtsi
+++ b/arch/arm/boot/dts/rv1108.dtsi
@@ -43,6 +43,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/rv1108-cru.h>
#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/thermal/thermal.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
@@ -69,6 +70,8 @@
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0xf00>;
+ #cooling-cells = <2>; /* min followed by max */
+ dynamic-power-coefficient = <75>;
};
};
@@ -275,6 +278,43 @@
status = "disabled";
};
+ thermal-zones {
+ soc_thermal: soc-thermal {
+ polling-delay-passive = <20>;
+ polling-delay = <1000>;
+ sustainable-power = <50>;
+
+ thermal-sensors = <&tsadc 0>;
+
+ trips {
+ threshold: trip-point0 {
+ temperature = <70000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ target: trip-point1 {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ soc_crit: soc-crit {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&target>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ contribution = <4096>;
+ };
+ };
+ };
+
+ };
+
tsadc: tsadc@10370000 {
compatible = "rockchip,rv1108-tsadc";
reg = <0x10370000 0x100>;
--
1.9.1
RV1108 SOC has one Temperature Sensor for CPU.
Signed-off-by: Rocky Hao <[email protected]>
---
drivers/thermal/rockchip_thermal.c | 67 ++++++++++++++++++++++++++++++++++++++
1 file changed, 67 insertions(+)
diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 9da3e1819210..299a8ade71fa 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -242,6 +242,45 @@ struct tsadc_table {
int temp;
};
+static const struct tsadc_table rv1108_table[] = {
+ {0, -40000},
+ {374, -40000},
+ {382, -35000},
+ {389, -30000},
+ {397, -25000},
+ {405, -20000},
+ {413, -15000},
+ {421, -10000},
+ {429, -5000},
+ {436, 0},
+ {444, 5000},
+ {452, 10000},
+ {460, 15000},
+ {468, 20000},
+ {476, 25000},
+ {483, 30000},
+ {491, 35000},
+ {499, 40000},
+ {507, 45000},
+ {515, 50000},
+ {523, 55000},
+ {531, 60000},
+ {539, 65000},
+ {547, 70000},
+ {555, 75000},
+ {562, 80000},
+ {570, 85000},
+ {578, 90000},
+ {586, 95000},
+ {594, 100000},
+ {602, 105000},
+ {610, 110000},
+ {618, 115000},
+ {626, 120000},
+ {634, 125000},
+ {TSADCV2_DATA_MASK, 125000},
+};
+
static const struct tsadc_table rk3228_code_table[] = {
{0, -40000},
{588, -40000},
@@ -779,6 +818,30 @@ static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
writel_relaxed(val, regs + TSADCV2_INT_EN);
}
+static const struct rockchip_tsadc_chip rv1108_tsadc_data = {
+ .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+ .chn_num = 1, /* one channel for tsadc */
+
+ .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
+ .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
+ .tshut_temp = 95000,
+
+ .initialize = rk_tsadcv2_initialize,
+ .irq_ack = rk_tsadcv3_irq_ack,
+ .control = rk_tsadcv3_control,
+ .get_temp = rk_tsadcv2_get_temp,
+ .set_alarm_temp = rk_tsadcv2_alarm_temp,
+ .set_tshut_temp = rk_tsadcv2_tshut_temp,
+ .set_tshut_mode = rk_tsadcv2_tshut_mode,
+
+ .table = {
+ .id = rv1108_table,
+ .length = ARRAY_SIZE(rv1108_table),
+ .data_mask = TSADCV2_DATA_MASK,
+ .mode = ADC_INCREMENT,
+ },
+};
+
static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
.chn_num = 1, /* one channel for tsadc */
@@ -928,6 +991,10 @@ static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
static const struct of_device_id of_rockchip_thermal_match[] = {
{
+ .compatible = "rockchip,rv1108-tsadc",
+ .data = (void *)&rv1108_tsadc_data,
+ },
+ {
.compatible = "rockchip,rk3228-tsadc",
.data = (void *)&rk3228_tsadc_data,
},
--
1.9.1
On Thu, Aug 24, 2017 at 06:27:51PM +0800, Rocky Hao wrote:
> Add a new compatible for thermal founding on RV1108 SoCs.
>
> Signed-off-by: Rocky Hao <[email protected]>
> ---
> Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 1 +
> 1 file changed, 1 insertion(+)
Acked-by: Rob Herring <[email protected]>
Hi Rocky,
在 2017年08月24日 18:27, Rocky Hao 写道:
> Add a new compatible for thermal founding on RV1108 SoCs.
>
> Signed-off-by: Rocky Hao <[email protected]>
> ---
> Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
> index e3a6234fb1ac..43d744e5305e 100644
> --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
> +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
> @@ -2,6 +2,7 @@
>
> Required properties:
> - compatible : should be "rockchip,<name>-tsadc"
> + "rockchip,rv1108-tsadc": found on RV1108 SoCs
According to the order, we should put the string after the
"rockchip,rk3399-tsadc"..., not here.
> "rockchip,rk3228-tsadc": found on RK3228 SoCs
> "rockchip,rk3288-tsadc": found on RK3288 SoCs
> "rockchip,rk3328-tsadc": found on RK3328 SoCs
Rocky,
在 2017年08月24日 18:27, Rocky Hao 写道:
> Add tsadc needed main information for RV1108 SoC.
> 750000Hz is the max clock rate supported by tsadc module.
>
> Signed-off-by: Rocky Hao <[email protected]>
> ---
> arch/arm/boot/dts/rv1108.dtsi | 29 +++++++++++++++++++++++++++++
> 1 file changed, 29 insertions(+)
>
> diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
> index 25fab0b80f53..dbdd8c2180e7 100644
> --- a/arch/arm/boot/dts/rv1108.dtsi
> +++ b/arch/arm/boot/dts/rv1108.dtsi
> @@ -275,6 +275,25 @@
> status = "disabled";
> };
>
> + tsadc: tsadc@10370000 {
> + compatible = "rockchip,rv1108-tsadc";
> + reg = <0x10370000 0x100>;
> + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
> + assigned-clocks = <&cru SCLK_TSADC>;
> + assigned-clock-rates = <750000>;
> + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
> + clock-names = "tsadc", "apb_pclk";
> + pinctrl-names = "init", "default", "sleep";
> + pinctrl-0 = <&otp_gpio>;
> + pinctrl-1 = <&otp_out>;
> + pinctrl-2 = <&otp_gpio>;
> + resets = <&cru SRST_TSADC>;
> + reset-names = "tsadc-apb";
> + rockchip,hw-tshut-temp = <120000>;
From the Patch[4/5], you set the critial temperature is 95 degree. I
will suggest the Tshut temperature is 100 degree.
Think about the the peripherial devices, the 120 degree will damage
some chips.
> + #thermal-sensor-cells = <1>;
> + status = "disabled";
> + };
> +
> adc: adc@1038c000 {
> compatible = "rockchip,rv1108-saradc", "rockchip,rk3399-saradc";
> reg = <0x1038c000 0x100>;
> @@ -642,6 +661,16 @@
> };
> };
>
> + tsadc {
> + otp_out: otp-out {
> + rockchip,pins = <0 RK_PB7 RK_FUNC_1 &pcfg_pull_none>;
> + };
> +
> + otp_gpio: otp-gpio {
> + rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> uart0 {
> uart0_xfer: uart0-xfer {
> rockchip,pins = <3 RK_PA6 RK_FUNC_1 &pcfg_pull_up>,
Hi Rocky,
在 2017年08月24日 18:27, Rocky Hao 写道:
> RV1108 SOC has one Temperature Sensor for CPU.
>
> Signed-off-by: Rocky Hao <[email protected]>
> ---
> drivers/thermal/rockchip_thermal.c | 67 ++++++++++++++++++++++++++++++++++++++
> 1 file changed, 67 insertions(+)
>
> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
> index 9da3e1819210..299a8ade71fa 100644
> --- a/drivers/thermal/rockchip_thermal.c
> +++ b/drivers/thermal/rockchip_thermal.c
> @@ -242,6 +242,45 @@ struct tsadc_table {
> int temp;
> };
>
> +static const struct tsadc_table rv1108_table[] = {
> + {0, -40000},
> + {374, -40000},
> + {382, -35000},
> + {389, -30000},
> + {397, -25000},
> + {405, -20000},
> + {413, -15000},
> + {421, -10000},
> + {429, -5000},
> + {436, 0},
> + {444, 5000},
> + {452, 10000},
> + {460, 15000},
> + {468, 20000},
> + {476, 25000},
> + {483, 30000},
> + {491, 35000},
> + {499, 40000},
> + {507, 45000},
> + {515, 50000},
> + {523, 55000},
> + {531, 60000},
> + {539, 65000},
> + {547, 70000},
> + {555, 75000},
> + {562, 80000},
> + {570, 85000},
> + {578, 90000},
> + {586, 95000},
> + {594, 100000},
> + {602, 105000},
> + {610, 110000},
> + {618, 115000},
> + {626, 120000},
> + {634, 125000},
> + {TSADCV2_DATA_MASK, 125000},
> +};
> +
From the RV1108 TRM said, this table was used for the negative
temperature coefficient.
But the default table is positive temperature coefficient, why?
I think you don't need to use the negative temperature coefficient.
> static const struct tsadc_table rk3228_code_table[] = {
> {0, -40000},
> {588, -40000},
> @@ -779,6 +818,30 @@ static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
> writel_relaxed(val, regs + TSADCV2_INT_EN);
> }
>
> +static const struct rockchip_tsadc_chip rv1108_tsadc_data = {
> + .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
> + .chn_num = 1, /* one channel for tsadc */
> +
> + .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
> + .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
> + .tshut_temp = 95000,
> +
> + .initialize = rk_tsadcv2_initialize,
> + .irq_ack = rk_tsadcv3_irq_ack,
> + .control = rk_tsadcv3_control,
If you will use the positive temperature coefficient, we need change it.
.control = rk_tsadcv2_control,
> + .get_temp = rk_tsadcv2_get_temp,
> + .set_alarm_temp = rk_tsadcv2_alarm_temp,
> + .set_tshut_temp = rk_tsadcv2_tshut_temp,
> + .set_tshut_mode = rk_tsadcv2_tshut_mode,
> +
> + .table = {
> + .id = rv1108_table,
> + .length = ARRAY_SIZE(rv1108_table),
> + .data_mask = TSADCV2_DATA_MASK,
> + .mode = ADC_INCREMENT,
Ditto
-Caesar
> + },
> +};
> +
> static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
> .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
> .chn_num = 1, /* one channel for tsadc */
> @@ -928,6 +991,10 @@ static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
>
> static const struct of_device_id of_rockchip_thermal_match[] = {
> {
> + .compatible = "rockchip,rv1108-tsadc",
> + .data = (void *)&rv1108_tsadc_data,
> + },
> + {
> .compatible = "rockchip,rk3228-tsadc",
> .data = (void *)&rk3228_tsadc_data,
> },
在 2017年09月15日 10:10, Caesar Wang 写道:
> Hi Rocky,
>
> 在 2017年08月24日 18:27, Rocky Hao 写道:
>> RV1108 SOC has one Temperature Sensor for CPU.
>>
>> Signed-off-by: Rocky Hao <[email protected]>
Reviewed-by: Caesar Wang <[email protected]>
>> ---
>> drivers/thermal/rockchip_thermal.c | 67
>> ++++++++++++++++++++++++++++++++++++++
>> 1 file changed, 67 insertions(+)
>>
>> diff --git a/drivers/thermal/rockchip_thermal.c
>> b/drivers/thermal/rockchip_thermal.c
>> index 9da3e1819210..299a8ade71fa 100644
>> --- a/drivers/thermal/rockchip_thermal.c
>> +++ b/drivers/thermal/rockchip_thermal.c
>> @@ -242,6 +242,45 @@ struct tsadc_table {
>> int temp;
>> };
>> +static const struct tsadc_table rv1108_table[] = {
>> + {0, -40000},
>> + {374, -40000},
>> + {382, -35000},
>> + {389, -30000},
>> + {397, -25000},
>> + {405, -20000},
>> + {413, -15000},
>> + {421, -10000},
>> + {429, -5000},
>> + {436, 0},
>> + {444, 5000},
>> + {452, 10000},
>> + {460, 15000},
>> + {468, 20000},
>> + {476, 25000},
>> + {483, 30000},
>> + {491, 35000},
>> + {499, 40000},
>> + {507, 45000},
>> + {515, 50000},
>> + {523, 55000},
>> + {531, 60000},
>> + {539, 65000},
>> + {547, 70000},
>> + {555, 75000},
>> + {562, 80000},
>> + {570, 85000},
>> + {578, 90000},
>> + {586, 95000},
>> + {594, 100000},
>> + {602, 105000},
>> + {610, 110000},
>> + {618, 115000},
>> + {626, 120000},
>> + {634, 125000},
>> + {TSADCV2_DATA_MASK, 125000},
>> +};
>> +
>
> From the RV1108 TRM said, this table was used for the negative
> temperature coefficient.
> But the default table is positive temperature coefficient, why?
> I think you don't need to use the negative temperature coefficient.
Sorry, the RV1108 TRM document is old on my hand, from the lastest
document Rockchip RV1108 TRM V1.0 Part1-20170505.pdf said,
The RV1108 is negative temprature coefficient, so please set this bit as
1'b1 :(
>
>> static const struct tsadc_table rk3228_code_table[] = {
>> {0, -40000},
>> {588, -40000},
>> @@ -779,6 +818,30 @@ static void rk_tsadcv2_tshut_mode(int chn, void
>> __iomem *regs,
>> writel_relaxed(val, regs + TSADCV2_INT_EN);
>> }
>> +static const struct rockchip_tsadc_chip rv1108_tsadc_data = {
>> + .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
>> + .chn_num = 1, /* one channel for tsadc */
>> +
>> + .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give
>> PMIC */
>> + .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
>> + .tshut_temp = 95000,
>> +
>> + .initialize = rk_tsadcv2_initialize,
>> + .irq_ack = rk_tsadcv3_irq_ack,
>> + .control = rk_tsadcv3_control,
>
> If you will use the positive temperature coefficient, we need change it.
>
> .control = rk_tsadcv2_control,
>
>
>
>> + .get_temp = rk_tsadcv2_get_temp,
>> + .set_alarm_temp = rk_tsadcv2_alarm_temp,
>> + .set_tshut_temp = rk_tsadcv2_tshut_temp,
>> + .set_tshut_mode = rk_tsadcv2_tshut_mode,
>> +
>> + .table = {
>> + .id = rv1108_table,
>> + .length = ARRAY_SIZE(rv1108_table),
>> + .data_mask = TSADCV2_DATA_MASK,
>> + .mode = ADC_INCREMENT,
>
> Ditto
>
> -Caesar
>
>
>> + },
>> +};
>> +
>> static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
>> .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
>> .chn_num = 1, /* one channel for tsadc */
>> @@ -928,6 +991,10 @@ static void rk_tsadcv2_tshut_mode(int chn, void
>> __iomem *regs,
>> static const struct of_device_id of_rockchip_thermal_match[] = {
>> {
>> + .compatible = "rockchip,rv1108-tsadc",
>> + .data = (void *)&rv1108_tsadc_data,
>> + },
>> + {
>> .compatible = "rockchip,rk3228-tsadc",
>> .data = (void *)&rk3228_tsadc_data,
>> },
>
>
>
> _______________________________________________
> Linux-rockchip mailing list
> [email protected]
> http://lists.infradead.org/mailman/listinfo/linux-rockchip
Hi Caesar,
Thanks for the reply.
在 2017/9/15 9:49, Caesar Wang 写道:
> Hi Rocky,
>
> 在 2017年08月24日 18:27, Rocky Hao 写道:
>> Add a new compatible for thermal founding on RV1108 SoCs.
>>
>> Signed-off-by: Rocky Hao <[email protected]>
>> ---
>> Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git
>> a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
>> b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
>> index e3a6234fb1ac..43d744e5305e 100644
>> --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
>> +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
>> @@ -2,6 +2,7 @@
>> Required properties:
>> - compatible : should be "rockchip,<name>-tsadc"
>> + "rockchip,rv1108-tsadc": found on RV1108 SoCs
>
> According to the order, we should put the string after the
> "rockchip,rk3399-tsadc"..., not here.
It is okay for me.
>> "rockchip,rk3228-tsadc": found on RK3228 SoCs
>> "rockchip,rk3288-tsadc": found on RK3288 SoCs
>> "rockchip,rk3328-tsadc": found on RK3328 SoCs
>
>
>
>
Hi Caesar,
Thanks for the reply.
在 2017/9/15 10:25, Caesar Wang 写道:
> Rocky,
>
> 在 2017年08月24日 18:27, Rocky Hao 写道:
>> Add tsadc needed main information for RV1108 SoC.
>> 750000Hz is the max clock rate supported by tsadc module.
>>
>> Signed-off-by: Rocky Hao <[email protected]>
>> ---
>> arch/arm/boot/dts/rv1108.dtsi | 29 +++++++++++++++++++++++++++++
>> 1 file changed, 29 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/rv1108.dtsi
>> b/arch/arm/boot/dts/rv1108.dtsi
>> index 25fab0b80f53..dbdd8c2180e7 100644
>> --- a/arch/arm/boot/dts/rv1108.dtsi
>> +++ b/arch/arm/boot/dts/rv1108.dtsi
>> @@ -275,6 +275,25 @@
>> status = "disabled";
>> };
>> + tsadc: tsadc@10370000 {
>> + compatible = "rockchip,rv1108-tsadc";
>> + reg = <0x10370000 0x100>;
>> + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
>> + assigned-clocks = <&cru SCLK_TSADC>;
>> + assigned-clock-rates = <750000>;
>> + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
>> + clock-names = "tsadc", "apb_pclk";
>> + pinctrl-names = "init", "default", "sleep";
>> + pinctrl-0 = <&otp_gpio>;
>> + pinctrl-1 = <&otp_out>;
>> + pinctrl-2 = <&otp_gpio>;
>> + resets = <&cru SRST_TSADC>;
>> + reset-names = "tsadc-apb";
>> + rockchip,hw-tshut-temp = <120000>;
>
> From the Patch[4/5], you set the critial temperature is 95 degree. I
> will suggest the Tshut temperature is 100 degree.
Setting rockchip,hw-tshut-temp = <120000>; is not a problem.
Maybe we should change the critial temperature (soc_crit: soc-crit) to
115 degree. I will explain more in another thread Patch[4/5] arm: dts:
rockchip: add thermal nodes for RV1108 SoC @
https://patchwork.kernel.org/patch/9919757/
> Think about the the peripherial devices, the 120 degree will damage
> some chips.
>
>> + #thermal-sensor-cells = <1>;
>> + status = "disabled";
>> + };
>> +
>> adc: adc@1038c000 {
>> compatible = "rockchip,rv1108-saradc",
>> "rockchip,rk3399-saradc";
>> reg = <0x1038c000 0x100>;
>> @@ -642,6 +661,16 @@
>> };
>> };
>> + tsadc {
>> + otp_out: otp-out {
>> + rockchip,pins = <0 RK_PB7 RK_FUNC_1 &pcfg_pull_none>;
>> + };
>> +
>> + otp_gpio: otp-gpio {
>> + rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
>> + };
>> + };
>> +
>> uart0 {
>> uart0_xfer: uart0-xfer {
>> rockchip,pins = <3 RK_PA6 RK_FUNC_1 &pcfg_pull_up>,
>
>
>
>
?? 2017/8/24 18:27, Rocky Hao д??:
> Add thermal zone and dynamic CPU power coefficients for RV1108
>
> Signed-off-by: Rocky Hao <[email protected]>
> ---
> arch/arm/boot/dts/rv1108.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 40 insertions(+)
>
> diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
> index dbdd8c2180e7..cae920b6a145 100644
> --- a/arch/arm/boot/dts/rv1108.dtsi
> +++ b/arch/arm/boot/dts/rv1108.dtsi
> @@ -43,6 +43,7 @@
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/clock/rv1108-cru.h>
> #include <dt-bindings/pinctrl/rockchip.h>
> +#include <dt-bindings/thermal/thermal.h>
> / {
> #address-cells = <1>;
> #size-cells = <1>;
> @@ -69,6 +70,8 @@
> device_type = "cpu";
> compatible = "arm,cortex-a7";
> reg = <0xf00>;
> + #cooling-cells = <2>; /* min followed by max */
> + dynamic-power-coefficient = <75>;
> };
> };
>
> @@ -275,6 +278,43 @@
> status = "disabled";
> };
>
> + thermal-zones {
> + soc_thermal: soc-thermal {
> + polling-delay-passive = <20>;
> + polling-delay = <1000>;
> + sustainable-power = <50>;
> +
> + thermal-sensors = <&tsadc 0>;
> +
> + trips {
> + threshold: trip-point0 {
> + temperature = <70000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> + target: trip-point1 {
> + temperature = <85000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> + soc_crit: soc-crit {
> + temperature = <95000>;
Hi Caesar,
For now, dsp is not supported by upstream code, 95000 is proper setting
for arm core. Arm core is the only cooling device controlled by IPA(a
good thermal control policy) policy. Once dsp is supported by upstream
code one day in the feature, its heating is controlled by userspace
code, initially. So we should change soc-crit from 95000 to 115000.
If dsp is added and control also by IPA(thermal control policy ) policy
in kernel space, we should update threshold, target, soc_crit settings.
Hi Heiko,
Considering the dsp may be supported, changing soc_crit from 95000 to
115000 is okay for me. Still it looks strange why target is 85000 but
soc_crit is 115000.
Thanks & Best Wishes,
Rocky
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> +
> + cooling-maps {
> + map0 {
> + trip = <&target>;
> + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + contribution = <4096>;
> + };
> + };
> + };
> +
> + };
> +
> tsadc: tsadc@10370000 {
> compatible = "rockchip,rv1108-tsadc";
> reg = <0x10370000 0x100>;
>