Convert mediatek jpeg decoder and encoder bindings to yaml.
Signed-off-by: Hsin-Yi Wang <[email protected]>
---
v3->v4: split adding mt8183 into another patch
---
.../bindings/media/mediatek-jpeg-decoder.txt | 38 ---------
.../bindings/media/mediatek-jpeg-decoder.yaml | 85 +++++++++++++++++++
.../bindings/media/mediatek-jpeg-encoder.txt | 35 --------
.../bindings/media/mediatek-jpeg-encoder.yaml | 76 +++++++++++++++++
4 files changed, 161 insertions(+), 73 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt
create mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml
delete mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt
create mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml
diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt
deleted file mode 100644
index 39c1028b2dfb4..0000000000000
--- a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt
+++ /dev/null
@@ -1,38 +0,0 @@
-* Mediatek JPEG Decoder
-
-Mediatek JPEG Decoder is the JPEG decode hardware present in Mediatek SoCs
-
-Required properties:
-- compatible : must be one of the following string:
- "mediatek,mt8173-jpgdec"
- "mediatek,mt7623-jpgdec", "mediatek,mt2701-jpgdec"
- "mediatek,mt2701-jpgdec"
-- reg : physical base address of the jpeg decoder registers and length of
- memory mapped region.
-- interrupts : interrupt number to the interrupt controller.
-- clocks: device clocks, see
- Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
-- clock-names: must contain "jpgdec-smi" and "jpgdec".
-- power-domains: a phandle to the power domain, see
- Documentation/devicetree/bindings/power/power_domain.txt for details.
-- mediatek,larb: must contain the local arbiters in the current Socs, see
- Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
- for details.
-- iommus: should point to the respective IOMMU block with master port as
- argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
- for details.
-
-Example:
- jpegdec: jpegdec@15004000 {
- compatible = "mediatek,mt2701-jpgdec";
- reg = <0 0x15004000 0 0x1000>;
- interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&imgsys CLK_IMG_JPGDEC_SMI>,
- <&imgsys CLK_IMG_JPGDEC>;
- clock-names = "jpgdec-smi",
- "jpgdec";
- power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
- mediatek,larb = <&larb2>;
- iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>,
- <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>;
- };
diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml
new file mode 100644
index 0000000000000..43a611c17ed59
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml
@@ -0,0 +1,85 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/mediatek-jpeg-decoder.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek JPEG Decoder Device Tree Bindings
+
+maintainers:
+ - Xia Jiang <[email protected]>
+
+description: |-
+ Mediatek JPEG Decoder is the JPEG decode hardware present in Mediatek SoCs
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - const: mediatek,mt8173-jpgdec
+ - items:
+ - const: mediatek,mt2701-jpgdec
+ - items:
+ - enum:
+ - mediatek,mt7623-jpgdec
+ - const: mediatek,mt2701-jpgdec
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 2
+ minItems: 2
+
+ clock-names:
+ items:
+ - const: jpgdec-smi
+ - const: jpgdec
+
+ power-domains:
+ maxItems: 1
+
+ mediatek,larb:
+ $ref: '/schemas/types.yaml#/definitions/phandle'
+ description: |
+ Must contain the local arbiters in the current Socs, see
+ Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
+ for details.
+
+ iommus:
+ maxItems: 2
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - power-domains
+ - mediatek,larb
+ - iommus
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt2701-clk.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/memory/mt2701-larb-port.h>
+ #include <dt-bindings/power/mt2701-power.h>
+ jpegdec: jpegdec@15004000 {
+ compatible = "mediatek,mt2701-jpgdec";
+ reg = <0x15004000 0x1000>;
+ interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&imgsys CLK_IMG_JPGDEC_SMI>,
+ <&imgsys CLK_IMG_JPGDEC>;
+ clock-names = "jpgdec-smi",
+ "jpgdec";
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
+ mediatek,larb = <&larb2>;
+ iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>,
+ <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>;
+ };
diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt
deleted file mode 100644
index 5e53c6ab52d01..0000000000000
--- a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt
+++ /dev/null
@@ -1,35 +0,0 @@
-* MediaTek JPEG Encoder
-
-MediaTek JPEG Encoder is the JPEG encode hardware present in MediaTek SoCs
-
-Required properties:
-- compatible : "mediatek,mt2701-jpgenc"
- followed by "mediatek,mtk-jpgenc"
-- reg : physical base address of the JPEG encoder registers and length of
- memory mapped region.
-- interrupts : interrupt number to the interrupt controller.
-- clocks: device clocks, see
- Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
-- clock-names: must contain "jpgenc". It is the clock of JPEG encoder.
-- power-domains: a phandle to the power domain, see
- Documentation/devicetree/bindings/power/power_domain.txt for details.
-- mediatek,larb: must contain the local arbiters in the current SoCs, see
- Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
- for details.
-- iommus: should point to the respective IOMMU block with master port as
- argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
- for details.
-
-Example:
- jpegenc: jpegenc@1500a000 {
- compatible = "mediatek,mt2701-jpgenc",
- "mediatek,mtk-jpgenc";
- reg = <0 0x1500a000 0 0x1000>;
- interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&imgsys CLK_IMG_VENC>;
- clock-names = "jpgenc";
- power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
- mediatek,larb = <&larb2>;
- iommus = <&iommu MT2701_M4U_PORT_JPGENC_RDMA>,
- <&iommu MT2701_M4U_PORT_JPGENC_BSDMA>;
- };
diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml
new file mode 100644
index 0000000000000..28f26e79fcb3a
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml
@@ -0,0 +1,76 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/mediatek-jpeg-encoder.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek JPEG Encoder Device Tree Bindings
+
+maintainers:
+ - Xia Jiang <[email protected]>
+
+description: |-
+ MediaTek JPEG Encoder is the JPEG encode hardware present in MediaTek SoCs
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - mediatek,mt2701-jpgenc
+ - const: mediatek,mtk-jpgenc
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: jpgenc
+
+ power-domains:
+ maxItems: 1
+
+ mediatek,larb:
+ $ref: '/schemas/types.yaml#/definitions/phandle'
+ description: |
+ Must contain the local arbiters in the current Socs, see
+ Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
+ for details.
+
+ iommus:
+ maxItems: 2
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - power-domains
+ - mediatek,larb
+ - iommus
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt2701-clk.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/memory/mt2701-larb-port.h>
+ #include <dt-bindings/power/mt2701-power.h>
+ jpegenc: jpegenc@1500a000 {
+ compatible = "mediatek,mt2701-jpgenc",
+ "mediatek,mtk-jpgenc";
+ reg = <0x1500a000 0x1000>;
+ interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&imgsys CLK_IMG_VENC>;
+ clock-names = "jpgenc";
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
+ mediatek,larb = <&larb2>;
+ iommus = <&iommu MT2701_M4U_PORT_JPGENC_RDMA>,
+ <&iommu MT2701_M4U_PORT_JPGENC_BSDMA>;
+ };
--
2.32.0.272.g935e593368-goog
Add mediatek,mt8183-jpgenc compatible to binding document.
Signed-off-by: Hsin-Yi Wang <[email protected]>
---
.../devicetree/bindings/media/mediatek-jpeg-encoder.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml
index 28f26e79fcb3a..e4e791d76cdaa 100644
--- a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml
+++ b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml
@@ -17,6 +17,7 @@ properties:
items:
- enum:
- mediatek,mt2701-jpgenc
+ - mediatek,mt8183-jpgenc
- const: mediatek,mtk-jpgenc
reg:
maxItems: 1
--
2.32.0.272.g935e593368-goog
From: Maoguang Meng <[email protected]>
Add jpeg encoder device tree node.
Signed-off-by: Maoguang Meng <[email protected]>
Signed-off-by: Hsin-Yi Wang <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index c5e822b6b77a3..d54b4532fc3f3 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -1329,6 +1329,18 @@ larb4: larb@17010000 {
power-domains = <&spm MT8183_POWER_DOMAIN_VENC>;
};
+ venc_jpg: venc_jpg@17030000 {
+ compatible = "mediatek,mt8183-jpgenc", "mediatek,mtk-jpgenc";
+ reg = <0 0x17030000 0 0x1000>;
+ interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_LOW>;
+ mediatek,larb = <&larb4>;
+ iommus = <&iommu M4U_PORT_JPGENC_RDMA>,
+ <&iommu M4U_PORT_JPGENC_BSDMA>;
+ power-domains = <&spm MT8183_POWER_DOMAIN_VENC>;
+ clocks = <&vencsys CLK_VENC_JPGENC>;
+ clock-names = "jpgenc";
+ };
+
ipu_conn: syscon@19000000 {
compatible = "mediatek,mt8183-ipu_conn", "syscon";
reg = <0 0x19000000 0 0x1000>;
--
2.32.0.272.g935e593368-goog
On 11/06/2021 13:20, Hsin-Yi Wang wrote:
> Add mediatek,mt8183-jpgenc compatible to binding document.
>
> Signed-off-by: Hsin-Yi Wang <[email protected]>
Reviewed-by: Matthias Brugger <[email protected]>
> ---
> .../devicetree/bindings/media/mediatek-jpeg-encoder.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml
> index 28f26e79fcb3a..e4e791d76cdaa 100644
> --- a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml
> +++ b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml
> @@ -17,6 +17,7 @@ properties:
> items:
> - enum:
> - mediatek,mt2701-jpgenc
> + - mediatek,mt8183-jpgenc
> - const: mediatek,mtk-jpgenc
> reg:
> maxItems: 1
>
On Fri, 11 Jun 2021 19:20:07 +0800, Hsin-Yi Wang wrote:
> Convert mediatek jpeg decoder and encoder bindings to yaml.
>
> Signed-off-by: Hsin-Yi Wang <[email protected]>
> ---
> v3->v4: split adding mt8183 into another patch
> ---
> .../bindings/media/mediatek-jpeg-decoder.txt | 38 ---------
> .../bindings/media/mediatek-jpeg-decoder.yaml | 85 +++++++++++++++++++
> .../bindings/media/mediatek-jpeg-encoder.txt | 35 --------
> .../bindings/media/mediatek-jpeg-encoder.yaml | 76 +++++++++++++++++
> 4 files changed, 161 insertions(+), 73 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt
> create mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml
> delete mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt
> create mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
\ndoc reference errors (make refcheckdocs):
Warning: Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml references a file that doesn't exist: Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
Warning: Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml references a file that doesn't exist: Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
Warning: MAINTAINERS references a file that doesn't exist: Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt
Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml: Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml: Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
MAINTAINERS: Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt
See https://patchwork.ozlabs.org/patch/1490913
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
On Fri, Jun 11, 2021 at 07:20:07PM +0800, Hsin-Yi Wang wrote:
> Convert mediatek jpeg decoder and encoder bindings to yaml.
>
> Signed-off-by: Hsin-Yi Wang <[email protected]>
> ---
> v3->v4: split adding mt8183 into another patch
> ---
> .../bindings/media/mediatek-jpeg-decoder.txt | 38 ---------
> .../bindings/media/mediatek-jpeg-decoder.yaml | 85 +++++++++++++++++++
> .../bindings/media/mediatek-jpeg-encoder.txt | 35 --------
> .../bindings/media/mediatek-jpeg-encoder.yaml | 76 +++++++++++++++++
> 4 files changed, 161 insertions(+), 73 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt
> create mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml
> delete mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt
> create mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml
>
> diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt
> deleted file mode 100644
> index 39c1028b2dfb4..0000000000000
> --- a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt
> +++ /dev/null
> @@ -1,38 +0,0 @@
> -* Mediatek JPEG Decoder
> -
> -Mediatek JPEG Decoder is the JPEG decode hardware present in Mediatek SoCs
> -
> -Required properties:
> -- compatible : must be one of the following string:
> - "mediatek,mt8173-jpgdec"
> - "mediatek,mt7623-jpgdec", "mediatek,mt2701-jpgdec"
> - "mediatek,mt2701-jpgdec"
> -- reg : physical base address of the jpeg decoder registers and length of
> - memory mapped region.
> -- interrupts : interrupt number to the interrupt controller.
> -- clocks: device clocks, see
> - Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
> -- clock-names: must contain "jpgdec-smi" and "jpgdec".
> -- power-domains: a phandle to the power domain, see
> - Documentation/devicetree/bindings/power/power_domain.txt for details.
> -- mediatek,larb: must contain the local arbiters in the current Socs, see
> - Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
> - for details.
> -- iommus: should point to the respective IOMMU block with master port as
> - argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
> - for details.
> -
> -Example:
> - jpegdec: jpegdec@15004000 {
> - compatible = "mediatek,mt2701-jpgdec";
> - reg = <0 0x15004000 0 0x1000>;
> - interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>;
> - clocks = <&imgsys CLK_IMG_JPGDEC_SMI>,
> - <&imgsys CLK_IMG_JPGDEC>;
> - clock-names = "jpgdec-smi",
> - "jpgdec";
> - power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
> - mediatek,larb = <&larb2>;
> - iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>,
> - <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>;
> - };
> diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml
> new file mode 100644
> index 0000000000000..43a611c17ed59
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml
> @@ -0,0 +1,85 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/mediatek-jpeg-decoder.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek JPEG Decoder Device Tree Bindings
> +
> +maintainers:
> + - Xia Jiang <[email protected]>
> +
> +description: |-
> + Mediatek JPEG Decoder is the JPEG decode hardware present in Mediatek SoCs
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - const: mediatek,mt8173-jpgdec
> + - items:
> + - const: mediatek,mt2701-jpgdec
These 2 entries can be an 'enum'.
> + - items:
> + - enum:
> + - mediatek,mt7623-jpgdec
> + - const: mediatek,mt2701-jpgdec
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 2
> + minItems: 2
> +
> + clock-names:
> + items:
> + - const: jpgdec-smi
> + - const: jpgdec
> +
> + power-domains:
> + maxItems: 1
> +
> + mediatek,larb:
> + $ref: '/schemas/types.yaml#/definitions/phandle'
> + description: |
> + Must contain the local arbiters in the current Socs, see
> + Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
> + for details.
> +
> + iommus:
> + maxItems: 2
Please explain what the 2 are.
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - clock-names
> + - power-domains
> + - mediatek,larb
> + - iommus
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/mt2701-clk.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/memory/mt2701-larb-port.h>
> + #include <dt-bindings/power/mt2701-power.h>
> + jpegdec: jpegdec@15004000 {
> + compatible = "mediatek,mt2701-jpgdec";
> + reg = <0x15004000 0x1000>;
> + interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&imgsys CLK_IMG_JPGDEC_SMI>,
> + <&imgsys CLK_IMG_JPGDEC>;
> + clock-names = "jpgdec-smi",
> + "jpgdec";
> + power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
> + mediatek,larb = <&larb2>;
> + iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>,
> + <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>;
> + };
> diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt
> deleted file mode 100644
> index 5e53c6ab52d01..0000000000000
> --- a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt
> +++ /dev/null
> @@ -1,35 +0,0 @@
> -* MediaTek JPEG Encoder
> -
> -MediaTek JPEG Encoder is the JPEG encode hardware present in MediaTek SoCs
> -
> -Required properties:
> -- compatible : "mediatek,mt2701-jpgenc"
> - followed by "mediatek,mtk-jpgenc"
> -- reg : physical base address of the JPEG encoder registers and length of
> - memory mapped region.
> -- interrupts : interrupt number to the interrupt controller.
> -- clocks: device clocks, see
> - Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
> -- clock-names: must contain "jpgenc". It is the clock of JPEG encoder.
> -- power-domains: a phandle to the power domain, see
> - Documentation/devicetree/bindings/power/power_domain.txt for details.
> -- mediatek,larb: must contain the local arbiters in the current SoCs, see
> - Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
> - for details.
> -- iommus: should point to the respective IOMMU block with master port as
> - argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
> - for details.
> -
> -Example:
> - jpegenc: jpegenc@1500a000 {
> - compatible = "mediatek,mt2701-jpgenc",
> - "mediatek,mtk-jpgenc";
> - reg = <0 0x1500a000 0 0x1000>;
> - interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_LOW>;
> - clocks = <&imgsys CLK_IMG_VENC>;
> - clock-names = "jpgenc";
> - power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
> - mediatek,larb = <&larb2>;
> - iommus = <&iommu MT2701_M4U_PORT_JPGENC_RDMA>,
> - <&iommu MT2701_M4U_PORT_JPGENC_BSDMA>;
> - };
> diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml
> new file mode 100644
> index 0000000000000..28f26e79fcb3a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml
> @@ -0,0 +1,76 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/mediatek-jpeg-encoder.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek JPEG Encoder Device Tree Bindings
> +
> +maintainers:
> + - Xia Jiang <[email protected]>
> +
> +description: |-
> + MediaTek JPEG Encoder is the JPEG encode hardware present in MediaTek SoCs
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - mediatek,mt2701-jpgenc
> + - const: mediatek,mtk-jpgenc
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + clock-names:
> + items:
> + - const: jpgenc
> +
> + power-domains:
> + maxItems: 1
> +
> + mediatek,larb:
> + $ref: '/schemas/types.yaml#/definitions/phandle'
> + description: |
> + Must contain the local arbiters in the current Socs, see
> + Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
> + for details.
> +
> + iommus:
> + maxItems: 2
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - clock-names
> + - power-domains
> + - mediatek,larb
> + - iommus
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/mt2701-clk.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/memory/mt2701-larb-port.h>
> + #include <dt-bindings/power/mt2701-power.h>
> + jpegenc: jpegenc@1500a000 {
> + compatible = "mediatek,mt2701-jpgenc",
> + "mediatek,mtk-jpgenc";
> + reg = <0x1500a000 0x1000>;
> + interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&imgsys CLK_IMG_VENC>;
> + clock-names = "jpgenc";
> + power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
> + mediatek,larb = <&larb2>;
> + iommus = <&iommu MT2701_M4U_PORT_JPGENC_RDMA>,
> + <&iommu MT2701_M4U_PORT_JPGENC_BSDMA>;
> + };
> --
> 2.32.0.272.g935e593368-goog