Subject: [PATCH 1/2] dt-bindings: edac: ARM Cortex A15 L2 asynchronous error detection

Add property description + example for using the
Cortex A15 L2 asynchronous error detection driver.

Signed-off-by: Wladislav Wiebe <[email protected]>
---
.../bindings/edac/cortex_a15_l2_async_edac.txt | 22 ++++++++++++++++++++++
MAINTAINERS | 7 +++++++
2 files changed, 29 insertions(+)
create mode 100644 Documentation/devicetree/bindings/edac/cortex_a15_l2_async_edac.txt

diff --git a/Documentation/devicetree/bindings/edac/cortex_a15_l2_async_edac.txt b/Documentation/devicetree/bindings/edac/cortex_a15_l2_async_edac.txt
new file mode 100644
index 000000000000..9ad8c2497e70
--- /dev/null
+++ b/Documentation/devicetree/bindings/edac/cortex_a15_l2_async_edac.txt
@@ -0,0 +1,22 @@
+* ARM Cortex A15 L2 internal asynchronous error detection driver
+
+Support for L2 internal asynchronous error detection caused by L2 RAM
+double-bit ECC error or illegal writes to the Interrupt Controller
+memory-map region on the Cortex A15.
+
+Required properties:
+ - compatible: "arm,cortex-a15-l2-async-edac"
+ - interrupts: INTERRIRQ per CPU cluster
+
+Example:
+
+cortex-a15-l2-async-edac {
+ compatible = "arm,cortex-a15-l2-async-edac";
+ interrupts = <0 182 4>,
+ <0 183 4>,
+ <0 184 4>,
+ <0 185 4>;
+};
+
+Reference:
+Cortex-A15 Technical Reference Manual, 7.7. Asynchronous errors
diff --git a/MAINTAINERS b/MAINTAINERS
index b755a89fa325..0796ad6e6490 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1094,6 +1094,13 @@ F: arch/arm/include/asm/arch_timer.h
F: arch/arm64/include/asm/arch_timer.h
F: drivers/clocksource/arm_arch_timer.c

+ARM CORTEX A15 L2 INTERNAL ASYNCHRONOUS ERROR DETECTION DRIVER
+M: Wladislav Wiebe <[email protected]>
+L: [email protected]
+L: [email protected] (moderated for non-subscribers)
+S: Supported
+F: Documentation/devicetree/bindings/edac/cortex_a15_l2_async_edac.txt
+
ARM INTEGRATOR, VERSATILE AND REALVIEW SUPPORT
M: Linus Walleij <[email protected]>
L: [email protected] (moderated for non-subscribers)
--
2.16.1


2019-01-21 17:52:17

by Rob Herring (Arm)

[permalink] [raw]
Subject: Re: [PATCH 1/2] dt-bindings: edac: ARM Cortex A15 L2 asynchronous error detection

On Tue, Jan 08, 2019 at 08:10:39AM +0000, Wiebe, Wladislav (Nokia - DE/Ulm) wrote:
> Add property description + example for using the
> Cortex A15 L2 asynchronous error detection driver.
>
> Signed-off-by: Wladislav Wiebe <[email protected]>
> ---
> .../bindings/edac/cortex_a15_l2_async_edac.txt | 22 ++++++++++++++++++++++
> MAINTAINERS | 7 +++++++
> 2 files changed, 29 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/edac/cortex_a15_l2_async_edac.txt
>
> diff --git a/Documentation/devicetree/bindings/edac/cortex_a15_l2_async_edac.txt b/Documentation/devicetree/bindings/edac/cortex_a15_l2_async_edac.txt
> new file mode 100644
> index 000000000000..9ad8c2497e70
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/edac/cortex_a15_l2_async_edac.txt
> @@ -0,0 +1,22 @@
> +* ARM Cortex A15 L2 internal asynchronous error detection driver
> +
> +Support for L2 internal asynchronous error detection caused by L2 RAM
> +double-bit ECC error or illegal writes to the Interrupt Controller
> +memory-map region on the Cortex A15.
> +
> +Required properties:
> + - compatible: "arm,cortex-a15-l2-async-edac"

EDAC is a kernel name and shouldn't be in a binding (though, yes that
is the directory name and there's examples to the contrary). How about
just "arm,cortex-a15-l2-errirq"?

> + - interrupts: INTERRIRQ per CPU cluster
> +
> +Example:
> +
> +cortex-a15-l2-async-edac {
> + compatible = "arm,cortex-a15-l2-async-edac";
> + interrupts = <0 182 4>,
> + <0 183 4>,
> + <0 184 4>,
> + <0 185 4>;
> +};
> +
> +Reference:
> +Cortex-A15 Technical Reference Manual, 7.7. Asynchronous errors
> diff --git a/MAINTAINERS b/MAINTAINERS
> index b755a89fa325..0796ad6e6490 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1094,6 +1094,13 @@ F: arch/arm/include/asm/arch_timer.h
> F: arch/arm64/include/asm/arch_timer.h
> F: drivers/clocksource/arm_arch_timer.c
>
> +ARM CORTEX A15 L2 INTERNAL ASYNCHRONOUS ERROR DETECTION DRIVER
> +M: Wladislav Wiebe <[email protected]>
> +L: [email protected]
> +L: [email protected] (moderated for non-subscribers)
> +S: Supported
> +F: Documentation/devicetree/bindings/edac/cortex_a15_l2_async_edac.txt
> +
> ARM INTEGRATOR, VERSATILE AND REALVIEW SUPPORT
> M: Linus Walleij <[email protected]>
> L: [email protected] (moderated for non-subscribers)
> --
> 2.16.1
>
> _______________________________________________
> linux-arm-kernel mailing list
> [email protected]
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