2022-09-12 06:18:57

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 00/40] pinctrl/arm64: qcom: fix some of Qualcomm pinctrl schema warnings

Hi,

That's a set for some of arm64 pinctrl bindings fixing most common warnings. I
have a plan to continue this for remaining arm64 (sm8250 needs updates) and for
arm.

Changes since v1
================
1. Correct commit msg in commits "fix matching pin config".
2. Correct commit msg in commit #2 .
3. Add Rb tags.

Dependencies
============
1. dt-bindings are independent of DTS patches.

Best regards,
Krzysztof

Krzysztof Kozlowski (40):
dt-bindings: pinctrl: qcom,sm6115-pinctrl: fix matching pin config
dt-bindings: pinctrl: qcom,sm6115-pinctrl: require function on GPIOs
dt-bindings: pinctrl: qcom,sm6115-pinctrl: fix indentation in example
dt-bindings: pinctrl: qcom,sm6125-pinctrl: fix matching pin config
dt-bindings: pinctrl: qcom,sm6125-pinctrl: do not require function on
non-GPIOs
dt-bindings: pinctrl: qcom,sm6125-pinctrl: extend example
dt-bindings: pinctrl: qcom,sm6350-pinctrl: fix matching pin config
dt-bindings: pinctrl: qcom,sm6350-pinctrl: do not require function on
non-GPIOs
dt-bindings: pinctrl: qcom,sm6350-pinctrl: fix indentation in example
dt-bindings: pinctrl: qcom,sm6375-pinctrl: fix matching pin config
dt-bindings: pinctrl: qcom,sm6375-pinctrl: do not require function on
non-GPIOs
dt-bindings: pinctrl: qcom,sm6375-pinctrl: fix indentation in example
dt-bindings: pinctrl: qcom,sm8250-pinctrl: do not require function on
non-GPIOs
dt-bindings: pinctrl: qcom,sm8250-pinctrl: reference tlmm common pins
dt-bindings: pinctrl: qcom,sm8250-pinctrl: fix indentation in example
dt-bindings: pinctrl: qcom,sm8350-pinctrl: fix matching pin config
dt-bindings: pinctrl: qcom,sm8350-pinctrl: fix indentation in example
dt-bindings: pinctrl: qcom,sm8350-pinctrl: do not require function on
non-GPIOs
dt-bindings: pinctrl: qcom,sm8450-pinctrl: fix matching pin config
dt-bindings: pinctrl: qcom,sm8450-pinctrl: fix indentation in example
dt-bindings: pinctrl: qcom,sm8450-pinctrl: do not require function on
non-GPIOs
dt-bindings: pinctrl: qcom,sm8450-pinctrl: add gpio-line-names
dt-bindings: pinctrl: qcom,sc7280-pinctrl: correct number of GPIOs
dt-bindings: pinctrl: qcom,sc7280-pinctrl: do not require function on
non-GPIOs
dt-bindings: pinctrl: qcom,sc7280-pinctrl: add gpio-line-names
dt-bindings: pinctrl: qcom,sc7280-pinctrl: reference tlmm schema
dt-bindings: pinctrl: qcom,sc7280-pinctrl: fix indentation in example
dt-bindings: pinctrl: qcom,sc8180x-pinctrl: fix matching pin config
dt-bindings: pinctrl: qcom,sc8180x-pinctrl: do not require function on
non-GPIOs
dt-bindings: pinctrl: qcom,sc8180x-pinctrl: fix indentation in example
dt-bindings: pinctrl: qcom,sc8280xp-pinctrl: fix matching pin config
dt-bindings: pinctrl: qcom,sc8280xp-pinctrl: do not require function
on non-GPIOs
dt-bindings: pinctrl: qcom,sc8280xp-pinctrl: fix indentation in
example
arm64: dts: qcom: sm6125: align TLMM pin configuration with DT schema
arm64: dts: qcom: sm6350: align TLMM pin configuration with DT schema
arm64: dts: qcom: sm8350-sagami: correct TS pin property
arm64: dts: qcom: sm8350: align TLMM pin configuration with DT schema
arm64: dts: qcom: sm8450: align TLMM pin configuration with DT schema
arm64: dts: qcom: sc7280: align TLMM pin configuration with DT schema
arm64: dts: qcom: sc7280-herobrine: correct TLMM gpio-line-names

.../bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 55 +--
.../pinctrl/qcom,sc8180x-pinctrl.yaml | 79 +++--
.../pinctrl/qcom,sc8280xp-pinctrl.yaml | 73 ++--
.../bindings/pinctrl/qcom,sm6115-pinctrl.yaml | 94 +++---
.../bindings/pinctrl/qcom,sm6125-pinctrl.yaml | 61 +++-
.../bindings/pinctrl/qcom,sm6350-pinctrl.yaml | 73 ++--
.../bindings/pinctrl/qcom,sm6375-tlmm.yaml | 73 ++--
.../bindings/pinctrl/qcom,sm8250-pinctrl.yaml | 41 ++-
.../bindings/pinctrl/qcom,sm8350-pinctrl.yaml | 73 ++--
.../bindings/pinctrl/qcom,sm8450-pinctrl.yaml | 82 +++--
.../boot/dts/qcom/sc7280-herobrine-crd.dts | 2 -
.../arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 44 +--
.../arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi | 8 +-
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 20 +-
arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi | 14 +-
arch/arm64/boot/dts/qcom/sc7280.dtsi | 316 +++++++++---------
.../qcom/sm6125-sony-xperia-seine-pdx201.dts | 4 +-
arch/arm64/boot/dts/qcom/sm6125.dtsi | 10 +-
arch/arm64/boot/dts/qcom/sm6350.dtsi | 14 +-
.../dts/qcom/sm8350-sony-xperia-sagami.dtsi | 4 +-
arch/arm64/boot/dts/qcom/sm8350.dtsi | 44 +--
.../qcom/sm8450-sony-xperia-nagara-pdx223.dts | 12 +-
arch/arm64/boot/dts/qcom/sm8450.dtsi | 152 ++++-----
23 files changed, 733 insertions(+), 615 deletions(-)

--
2.34.1


2022-09-12 06:19:47

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 07/40] dt-bindings: pinctrl: qcom,sm6350-pinctrl: fix matching pin config

Matching PMIC GPIOs config nodes within a '-state' node by '.*' pattern
does not work as expected because of linux,phandle in the DTB:

'pins' is a required property
'function' is a required property
'rx', 'tx' do not match any of the regexes: 'pinctrl-[0-9]+'
[[59]] is not of type 'object'

Make the schema stricter and expect such nodes to be followed with a
'-pins' suffix.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../devicetree/bindings/pinctrl/qcom,sm6350-pinctrl.yaml | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-pinctrl.yaml
index 898608671c4b..85a4ff5a5625 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-pinctrl.yaml
@@ -44,8 +44,9 @@ patternProperties:
oneOf:
- $ref: "#/$defs/qcom-sm6350-tlmm-state"
- patternProperties:
- ".*":
+ "-pins$":
$ref: "#/$defs/qcom-sm6350-tlmm-state"
+ additionalProperties: false

$defs:
qcom-sm6350-tlmm-state:
@@ -133,13 +134,13 @@ examples:
};

uart-w-subnodes-state {
- rx {
+ rx-pins {
pins = "gpio25";
function = "qup13_f2";
bias-disable;
};

- tx {
+ tx-pins {
pins = "gpio26";
function = "qup13_f2";
bias-disable;
--
2.34.1

2022-09-12 06:19:47

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 11/40] dt-bindings: pinctrl: qcom,sm6375-pinctrl: do not require function on non-GPIOs

Certain pins, like SDcard related, do not have functions and such should
not be required:

sdc1-clk-pins: 'function' is a required property

Signed-off-by: Krzysztof Kozlowski <[email protected]>

---

Another question is whether 'function' should be disallowed for such
pins?
---
.../bindings/pinctrl/qcom,sm6375-tlmm.yaml | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml
index 50f0ca5ab7e7..dbd91d6b63b3 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml
@@ -54,7 +54,6 @@ $defs:
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
- $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"

properties:
pins:
@@ -120,7 +119,16 @@ $defs:

required:
- pins
- - function
+
+ allOf:
+ - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
+ - if:
+ properties:
+ pins:
+ pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-6])$"
+ then:
+ required:
+ - function

additionalProperties: false

--
2.34.1

2022-09-12 06:19:57

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 06/40] dt-bindings: pinctrl: qcom,sm6125-pinctrl: extend example

Extend example with children for pin configuration and indent it with
4-spaces.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../bindings/pinctrl/qcom,sm6125-pinctrl.yaml | 46 +++++++++++++------
1 file changed, 33 insertions(+), 13 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-pinctrl.yaml
index 735eb5d6834d..5cb8b272cb7d 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-pinctrl.yaml
@@ -126,17 +126,37 @@ $defs:

examples:
- |
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- pinctrl@500000 {
- compatible = "qcom,sm6125-tlmm";
- reg = <0x00500000 0x400000>,
- <0x00900000 0x400000>,
- <0x00d00000 0x400000>;
- reg-names = "west", "south", "east";
- interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- gpio-ranges = <&tlmm 0 0 134>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ pinctrl@500000 {
+ compatible = "qcom,sm6125-tlmm";
+ reg = <0x00500000 0x400000>,
+ <0x00900000 0x400000>,
+ <0x00d00000 0x400000>;
+ reg-names = "west", "south", "east";
+ interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ gpio-ranges = <&tlmm 0 0 134>;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ sdc2-off-state {
+ clk-pins {
+ pins = "sdc2_clk";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ cmd-pins {
+ pins = "sdc2_cmd";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ data-pins {
+ pins = "sdc2_data";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
};
+ };
--
2.34.1

2022-09-12 06:20:59

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 17/40] dt-bindings: pinctrl: qcom,sm8350-pinctrl: fix indentation in example

Bindings example should be indented with 4-spaces.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../bindings/pinctrl/qcom,sm8350-pinctrl.yaml | 58 +++++++++----------
1 file changed, 29 insertions(+), 29 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-pinctrl.yaml
index 211cca11f94f..f3106d25adcf 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-pinctrl.yaml
@@ -114,34 +114,34 @@ $defs:

examples:
- |
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- pinctrl@f100000 {
- compatible = "qcom,sm8350-tlmm";
- reg = <0x0f100000 0x300000>;
- interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- gpio-ranges = <&tlmm 0 0 203>;
-
- gpio-wo-subnode-state {
- pins = "gpio1";
- function = "gpio";
- };
-
- uart-w-subnodes-state {
- rx-pins {
- pins = "gpio18";
- function = "qup3";
- bias-pull-up;
- };
-
- tx-pins {
- pins = "gpio19";
- function = "qup3";
- bias-disable;
- };
- };
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ pinctrl@f100000 {
+ compatible = "qcom,sm8350-tlmm";
+ reg = <0x0f100000 0x300000>;
+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-ranges = <&tlmm 0 0 203>;
+
+ gpio-wo-subnode-state {
+ pins = "gpio1";
+ function = "gpio";
};
+
+ uart-w-subnodes-state {
+ rx-pins {
+ pins = "gpio18";
+ function = "qup3";
+ bias-pull-up;
+ };
+
+ tx-pins {
+ pins = "gpio19";
+ function = "qup3";
+ bias-disable;
+ };
+ };
+ };
...
--
2.34.1

2022-09-12 06:28:43

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 21/40] dt-bindings: pinctrl: qcom,sm8450-pinctrl: do not require function on non-GPIOs

Certain pins, like SDcard related, do not have functions and such should
not be required:

sdc1-clk-pins: 'function' is a required property

Signed-off-by: Krzysztof Kozlowski <[email protected]>

---

Another question is whether 'function' should be disallowed for such
pins?
---
.../bindings/pinctrl/qcom,sm8450-pinctrl.yaml | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml
index 87347e9c5f1c..296f503c1d97 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml
@@ -53,7 +53,6 @@ $defs:
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
- $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"

properties:
pins:
@@ -105,7 +104,16 @@ $defs:

required:
- pins
- - function
+
+ allOf:
+ - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
+ - if:
+ properties:
+ pins:
+ pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-9])$"
+ then:
+ required:
+ - function

additionalProperties: false

--
2.34.1

2022-09-12 06:29:58

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 28/40] dt-bindings: pinctrl: qcom,sc8180x-pinctrl: fix matching pin config

Matching PMIC GPIOs config nodes within a '-state' node by '.*' pattern
does not work as expected because of linux,phandle in the DTB:

'pins' is a required property
'function' is a required property
'rx', 'tx' do not match any of the regexes: 'pinctrl-[0-9]+'
[[59]] is not of type 'object'

Make the schema stricter and expect such nodes to be followed with a
'-pins' suffix.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml
index 86509172603d..646fabdf81f7 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml
@@ -51,8 +51,9 @@ patternProperties:
oneOf:
- $ref: "#/$defs/qcom-sc8180x-tlmm-state"
- patternProperties:
- ".*":
+ "-pins$":
$ref: "#/$defs/qcom-sc8180x-tlmm-state"
+ additionalProperties: false

'$defs':
qcom-sc8180x-tlmm-state:
@@ -137,13 +138,13 @@ examples:
};

uart-w-subnodes-state {
- rx {
+ rx-pins {
pins = "gpio4";
function = "qup6";
bias-pull-up;
};

- tx {
+ tx-pins {
pins = "gpio5";
function = "qup6";
bias-disable;
--
2.34.1

2022-09-12 06:30:42

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 36/40] arm64: dts: qcom: sm8350-sagami: correct TS pin property

The pin configuration is selected with "pins", not "pin" property.

Fixes: 1209e9246632 ("arm64: dts: qcom: sm8350-sagami: Enable and populate I2C/SPI nodes")
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8350-sony-xperia-sagami.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8350-sony-xperia-sagami.dtsi b/arch/arm64/boot/dts/qcom/sm8350-sony-xperia-sagami.dtsi
index cb9bbd234b7b..b702ab1605bb 100644
--- a/arch/arm64/boot/dts/qcom/sm8350-sony-xperia-sagami.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350-sony-xperia-sagami.dtsi
@@ -223,7 +223,7 @@ &tlmm {
gpio-reserved-ranges = <44 4>;

ts_int_default: ts-int-default {
- pin = "gpio23";
+ pins = "gpio23";
function = "gpio";
drive-strength = <2>;
bias-disable;
--
2.34.1

2022-09-12 06:31:33

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 29/40] dt-bindings: pinctrl: qcom,sc8180x-pinctrl: do not require function on non-GPIOs

Certain pins, like SDcard related, do not have functions and such should
not be required:

sdc1-clk-pins: 'function' is a required property

Signed-off-by: Krzysztof Kozlowski <[email protected]>

---

Another question is whether 'function' should be disallowed for such
pins?
---
.../bindings/pinctrl/qcom,sc8180x-pinctrl.yaml | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml
index 646fabdf81f7..4afe20bac87c 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml
@@ -61,7 +61,6 @@ patternProperties:
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
- $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"

properties:
pins:
@@ -112,7 +111,16 @@ patternProperties:

required:
- pins
- - function
+
+ allOf:
+ - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
+ - if:
+ properties:
+ pins:
+ pattern: "^gpio([0-9]|[1-9][0-9]|1[0-8][0-9])$"
+ then:
+ required:
+ - function

additionalProperties: false

--
2.34.1

2022-09-12 06:32:21

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 05/40] dt-bindings: pinctrl: qcom,sm6125-pinctrl: do not require function on non-GPIOs

Certain pins, like SDcard related, do not have functions and such should
not be required:

sdc1-clk-pins: 'function' is a required property

Signed-off-by: Krzysztof Kozlowski <[email protected]>

---

Another question is whether 'function' should be disallowed for such
pins?
---
.../bindings/pinctrl/qcom,sm6125-pinctrl.yaml | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-pinctrl.yaml
index 84ed16f9915d..735eb5d6834d 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-pinctrl.yaml
@@ -61,7 +61,6 @@ $defs:
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
- $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"

properties:
pins:
@@ -112,7 +111,16 @@ $defs:

required:
- pins
- - function
+
+ allOf:
+ - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
+ - if:
+ properties:
+ pins:
+ pattern: "^gpio[0-9]|[1-9][0-9]|1[0-2][0-9]|13[0-2]$"
+ then:
+ required:
+ - function

additionalProperties: false

--
2.34.1

2022-09-12 06:35:53

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 10/40] dt-bindings: pinctrl: qcom,sm6375-pinctrl: fix matching pin config

Matching PMIC GPIOs config nodes within a '-state' node by '.*' pattern
does not work as expected because of linux,phandle in the DTB:

'pins' is a required property
'function' is a required property
'rx', 'tx' do not match any of the regexes: 'pinctrl-[0-9]+'
[[59]] is not of type 'object'

Make the schema stricter and expect such nodes to be followed with a
'-pins' suffix.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml
index 3908807a8339..50f0ca5ab7e7 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml
@@ -44,8 +44,9 @@ patternProperties:
oneOf:
- $ref: "#/$defs/qcom-sm6375-tlmm-state"
- patternProperties:
- ".*":
+ "-pins$":
$ref: "#/$defs/qcom-sm6375-tlmm-state"
+ additionalProperties: false

$defs:
qcom-sm6375-tlmm-state:
@@ -142,13 +143,13 @@ examples:
};

uart-w-subnodes-state {
- rx {
+ rx-pins {
pins = "gpio18";
function = "qup13_f2";
bias-pull-up;
};

- tx {
+ tx-pins {
pins = "gpio19";
function = "qup13_f2";
bias-disable;
--
2.34.1

2022-09-12 06:37:04

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 14/40] dt-bindings: pinctrl: qcom,sm8250-pinctrl: reference tlmm common pins

Each subnode configuring pins (so the final -pins or pinconf) should
reference common TLMM pin definition.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml
index 12bdc2e67c4d..bccc83f22aae 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml
@@ -112,6 +112,7 @@ patternProperties:
- pins

allOf:
+ - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
- if:
properties:
pins:
--
2.34.1

2022-09-12 06:43:08

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 26/40] dt-bindings: pinctrl: qcom,sc7280-pinctrl: reference tlmm schema

Qualcomm TLMM pin controller bindings should reference generic TLMM
schema (which also pulls generic pinctrl schema).

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
index 463f2e95e237..2ad79029d9b0 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
@@ -134,7 +134,7 @@ patternProperties:
additionalProperties: false

allOf:
- - $ref: "pinctrl.yaml#"
+ - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#

required:
- compatible
--
2.34.1

2022-09-12 06:45:14

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 24/40] dt-bindings: pinctrl: qcom,sc7280-pinctrl: do not require function on non-GPIOs

Certain pins, like SDcard related, do not have functions and such should
not be required:

sdc1-clk-pins: 'function' is a required property

Signed-off-by: Krzysztof Kozlowski <[email protected]>

---

Another question is whether 'function' should be disallowed for such
pins?
---
.../bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
index 76de3b1eb8c7..b12e738cabfa 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
@@ -51,7 +51,6 @@ patternProperties:
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
- $ref: "/schemas/pinctrl/pincfg-node.yaml"

properties:
pins:
@@ -118,7 +117,16 @@ patternProperties:

required:
- pins
- - function
+
+ allOf:
+ - $ref: /schemas/pinctrl/pincfg-node.yaml
+ - if:
+ properties:
+ pins:
+ pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9]|18[0-2])$"
+ then:
+ required:
+ - function

additionalProperties: false

--
2.34.1

2022-09-12 06:45:21

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 12/40] dt-bindings: pinctrl: qcom,sm6375-pinctrl: fix indentation in example

Bindings example should be indented with 4-spaces.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../bindings/pinctrl/qcom,sm6375-tlmm.yaml | 58 +++++++++----------
1 file changed, 29 insertions(+), 29 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml
index dbd91d6b63b3..025faf87d147 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml
@@ -134,34 +134,34 @@ $defs:

examples:
- |
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- pinctrl@500000 {
- compatible = "qcom,sm6375-tlmm";
- reg = <0x00500000 0x800000>;
- interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- gpio-ranges = <&tlmm 0 0 157>;
-
- gpio-wo-subnode-state {
- pins = "gpio1";
- function = "gpio";
- };
-
- uart-w-subnodes-state {
- rx-pins {
- pins = "gpio18";
- function = "qup13_f2";
- bias-pull-up;
- };
-
- tx-pins {
- pins = "gpio19";
- function = "qup13_f2";
- bias-disable;
- };
- };
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ pinctrl@500000 {
+ compatible = "qcom,sm6375-tlmm";
+ reg = <0x00500000 0x800000>;
+ interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-ranges = <&tlmm 0 0 157>;
+
+ gpio-wo-subnode-state {
+ pins = "gpio1";
+ function = "gpio";
};
+
+ uart-w-subnodes-state {
+ rx-pins {
+ pins = "gpio18";
+ function = "qup13_f2";
+ bias-pull-up;
+ };
+
+ tx-pins {
+ pins = "gpio19";
+ function = "qup13_f2";
+ bias-disable;
+ };
+ };
+ };
...
--
2.34.1

2022-09-12 06:45:59

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 37/40] arm64: dts: qcom: sm8350: align TLMM pin configuration with DT schema

DT schema expects TLMM pin configuration nodes to be named with '-state'
suffix and their optional children with '-pins' suffix.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../dts/qcom/sm8350-sony-xperia-sagami.dtsi | 2 +-
arch/arm64/boot/dts/qcom/sm8350.dtsi | 44 +++++++++----------
2 files changed, 23 insertions(+), 23 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8350-sony-xperia-sagami.dtsi b/arch/arm64/boot/dts/qcom/sm8350-sony-xperia-sagami.dtsi
index b702ab1605bb..b3c9952ac173 100644
--- a/arch/arm64/boot/dts/qcom/sm8350-sony-xperia-sagami.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350-sony-xperia-sagami.dtsi
@@ -222,7 +222,7 @@ &spi14 {
&tlmm {
gpio-reserved-ranges = <44 4>;

- ts_int_default: ts-int-default {
+ ts_int_default: ts-int-default-state {
pins = "gpio23";
function = "gpio";
drive-strength = <2>;
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index e72a04411888..cd5503642a23 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -1762,150 +1762,150 @@ tlmm: pinctrl@f100000 {
wakeup-parent = <&pdc>;

qup_uart3_default_state: qup-uart3-default-state {
- rx {
+ rx-pins {
pins = "gpio18";
function = "qup3";
};
- tx {
+ tx-pins {
pins = "gpio19";
function = "qup3";
};
};

- qup_uart6_default: qup-uart6-default {
+ qup_uart6_default: qup-uart6-default-state {
pins = "gpio30", "gpio31";
function = "qup6";
drive-strength = <2>;
bias-disable;
};

- qup_uart18_default: qup-uart18-default {
+ qup_uart18_default: qup-uart18-default-state {
pins = "gpio58", "gpio59";
function = "qup18";
drive-strength = <2>;
bias-disable;
};

- qup_i2c0_default: qup-i2c0-default {
+ qup_i2c0_default: qup-i2c0-default-state {
pins = "gpio4", "gpio5";
function = "qup0";
drive-strength = <2>;
bias-pull-up;
};

- qup_i2c1_default: qup-i2c1-default {
+ qup_i2c1_default: qup-i2c1-default-state {
pins = "gpio8", "gpio9";
function = "qup1";
drive-strength = <2>;
bias-pull-up;
};

- qup_i2c2_default: qup-i2c2-default {
+ qup_i2c2_default: qup-i2c2-default-state {
pins = "gpio12", "gpio13";
function = "qup2";
drive-strength = <2>;
bias-pull-up;
};

- qup_i2c4_default: qup-i2c4-default {
+ qup_i2c4_default: qup-i2c4-default-state {
pins = "gpio20", "gpio21";
function = "qup4";
drive-strength = <2>;
bias-pull-up;
};

- qup_i2c5_default: qup-i2c5-default {
+ qup_i2c5_default: qup-i2c5-default-state {
pins = "gpio24", "gpio25";
function = "qup5";
drive-strength = <2>;
bias-pull-up;
};

- qup_i2c6_default: qup-i2c6-default {
+ qup_i2c6_default: qup-i2c6-default-state {
pins = "gpio28", "gpio29";
function = "qup6";
drive-strength = <2>;
bias-pull-up;
};

- qup_i2c7_default: qup-i2c7-default {
+ qup_i2c7_default: qup-i2c7-default-state {
pins = "gpio32", "gpio33";
function = "qup7";
drive-strength = <2>;
bias-disable;
};

- qup_i2c8_default: qup-i2c8-default {
+ qup_i2c8_default: qup-i2c8-default-state {
pins = "gpio36", "gpio37";
function = "qup8";
drive-strength = <2>;
bias-pull-up;
};

- qup_i2c9_default: qup-i2c9-default {
+ qup_i2c9_default: qup-i2c9-default-state {
pins = "gpio40", "gpio41";
function = "qup9";
drive-strength = <2>;
bias-pull-up;
};

- qup_i2c10_default: qup-i2c10-default {
+ qup_i2c10_default: qup-i2c10-default-state {
pins = "gpio44", "gpio45";
function = "qup10";
drive-strength = <2>;
bias-pull-up;
};

- qup_i2c11_default: qup-i2c11-default {
+ qup_i2c11_default: qup-i2c11-default-state {
pins = "gpio48", "gpio49";
function = "qup11";
drive-strength = <2>;
bias-pull-up;
};

- qup_i2c12_default: qup-i2c12-default {
+ qup_i2c12_default: qup-i2c12-default-state {
pins = "gpio52", "gpio53";
function = "qup12";
drive-strength = <2>;
bias-pull-up;
};

- qup_i2c13_default: qup-i2c13-default {
+ qup_i2c13_default: qup-i2c13-default-state {
pins = "gpio0", "gpio1";
function = "qup13";
drive-strength = <2>;
bias-pull-up;
};

- qup_i2c14_default: qup-i2c14-default {
+ qup_i2c14_default: qup-i2c14-default-state {
pins = "gpio56", "gpio57";
function = "qup14";
drive-strength = <2>;
bias-disable;
};

- qup_i2c15_default: qup-i2c15-default {
+ qup_i2c15_default: qup-i2c15-default-state {
pins = "gpio60", "gpio61";
function = "qup15";
drive-strength = <2>;
bias-disable;
};

- qup_i2c16_default: qup-i2c16-default {
+ qup_i2c16_default: qup-i2c16-default-state {
pins = "gpio64", "gpio65";
function = "qup16";
drive-strength = <2>;
bias-disable;
};

- qup_i2c17_default: qup-i2c17-default {
+ qup_i2c17_default: qup-i2c17-default-state {
pins = "gpio72", "gpio73";
function = "qup17";
drive-strength = <2>;
bias-disable;
};

- qup_i2c19_default: qup-i2c19-default {
+ qup_i2c19_default: qup-i2c19-default-state {
pins = "gpio76", "gpio77";
function = "qup19";
drive-strength = <2>;
--
2.34.1

2022-09-12 06:46:02

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 35/40] arm64: dts: qcom: sm6350: align TLMM pin configuration with DT schema

DT schema expects TLMM pin configuration nodes to be named with '-state'
suffix and their optional children with '-pins' suffix.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/qcom/sm6350.dtsi | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index d882c29d53aa..c39de7d3ace0 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -1314,49 +1314,49 @@ tlmm: pinctrl@f100000 {
#interrupt-cells = <2>;
gpio-ranges = <&tlmm 0 0 157>;

- qup_uart9_default: qup-uart9-default {
+ qup_uart9_default: qup-uart9-default-state {
pins = "gpio25", "gpio26";
function = "qup13_f2";
drive-strength = <2>;
bias-disable;
};

- qup_i2c0_default: qup-i2c0-default {
+ qup_i2c0_default: qup-i2c0-default-state {
pins = "gpio0", "gpio1";
function = "qup00";
drive-strength = <2>;
bias-pull-up;
};

- qup_i2c2_default: qup-i2c2-default {
+ qup_i2c2_default: qup-i2c2-default-state {
pins = "gpio45", "gpio46";
function = "qup02";
drive-strength = <2>;
bias-pull-up;
};

- qup_i2c6_default: qup-i2c6-default {
+ qup_i2c6_default: qup-i2c6-default-state {
pins = "gpio13", "gpio14";
function = "qup10";
drive-strength = <2>;
bias-pull-up;
};

- qup_i2c7_default: qup-i2c7-default {
+ qup_i2c7_default: qup-i2c7-default-state {
pins = "gpio27", "gpio28";
function = "qup11";
drive-strength = <2>;
bias-pull-up;
};

- qup_i2c8_default: qup-i2c8-default {
+ qup_i2c8_default: qup-i2c8-default-state {
pins = "gpio19", "gpio20";
function = "qup12";
drive-strength = <2>;
bias-pull-up;
};

- qup_i2c10_default: qup-i2c10-default {
+ qup_i2c10_default: qup-i2c10-default-state {
pins = "gpio4", "gpio5";
function = "qup14";
drive-strength = <2>;
--
2.34.1

2022-09-12 06:46:23

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 32/40] dt-bindings: pinctrl: qcom,sc8280xp-pinctrl: do not require function on non-GPIOs

Certain pins, like SDcard related, do not have functions and such should
not be required:

sdc1-clk-pins: 'function' is a required property

Signed-off-by: Krzysztof Kozlowski <[email protected]>

---

Another question is whether 'function' should be disallowed for such
pins?
---
.../bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml
index 5147afc28721..8610f2701388 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml
@@ -53,7 +53,6 @@ patternProperties:
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
- $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"

properties:
pins:
@@ -113,7 +112,16 @@ patternProperties:

required:
- pins
- - function
+
+ allOf:
+ - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
+ - if:
+ properties:
+ pins:
+ pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-1][0-9]|22[0-7])$"
+ then:
+ required:
+ - function

additionalProperties: false

--
2.34.1

2022-09-12 06:46:45

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 22/40] dt-bindings: pinctrl: qcom,sm8450-pinctrl: add gpio-line-names

Add common gpio-line-names property and restrict gpio-reserved-ranges to
fixed size.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml
index 296f503c1d97..9cd97a467648 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml
@@ -27,7 +27,14 @@ properties:
interrupt-controller: true
'#interrupt-cells': true
gpio-controller: true
- gpio-reserved-ranges: true
+
+ gpio-reserved-ranges:
+ minItems: 1
+ maxItems: 105
+
+ gpio-line-names:
+ maxItems: 209
+
'#gpio-cells': true
gpio-ranges: true
wakeup-parent: true
--
2.34.1

2022-09-12 06:47:01

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 02/40] dt-bindings: pinctrl: qcom,sm6115-pinctrl: require function on GPIOs

Require function on GPIOs (so not on SD card pins).

Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Iskren Chernev <[email protected]>
---
.../bindings/pinctrl/qcom,sm6115-pinctrl.yaml | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml
index 8a2b4767c7b6..28b29bf714b4 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml
@@ -69,7 +69,6 @@ patternProperties:
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
- $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"

properties:
pins:
@@ -121,6 +120,16 @@ patternProperties:
required:
- pins

+ allOf:
+ - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
+ - if:
+ properties:
+ pins:
+ pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-2])$"
+ then:
+ required:
+ - function
+
additionalProperties: false

allOf:
--
2.34.1

2022-09-12 06:47:53

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 27/40] dt-bindings: pinctrl: qcom,sc7280-pinctrl: fix indentation in example

Bindings example should be indented with 4-spaces.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 36 +++++++++----------
1 file changed, 18 insertions(+), 18 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
index 2ad79029d9b0..ad3496784678 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
@@ -150,22 +150,22 @@ additionalProperties: false

examples:
- |
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- tlmm: pinctrl@f000000 {
- compatible = "qcom,sc7280-pinctrl";
- reg = <0xf000000 0x1000000>;
- interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- gpio-ranges = <&tlmm 0 0 175>;
- wakeup-parent = <&pdc>;
-
- qup_uart5_default: qup-uart5-pins {
- pins = "gpio46", "gpio47";
- function = "qup13";
- drive-strength = <2>;
- bias-disable;
- };
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ tlmm: pinctrl@f000000 {
+ compatible = "qcom,sc7280-pinctrl";
+ reg = <0xf000000 0x1000000>;
+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-ranges = <&tlmm 0 0 175>;
+ wakeup-parent = <&pdc>;
+
+ qup_uart5_default: qup-uart5-pins {
+ pins = "gpio46", "gpio47";
+ function = "qup13";
+ drive-strength = <2>;
+ bias-disable;
};
+ };
--
2.34.1

2022-09-12 06:48:37

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 39/40] arm64: dts: qcom: sc7280: align TLMM pin configuration with DT schema

DT schema expects TLMM pin configuration nodes to be named with '-state'
suffix and their optional children with '-pins' suffix.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 44 +--
.../arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi | 8 +-
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 20 +-
arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi | 14 +-
arch/arm64/boot/dts/qcom/sc7280.dtsi | 316 +++++++++---------
5 files changed, 201 insertions(+), 201 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
index 45f6a1e1002e..82307722222a 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
@@ -717,27 +717,27 @@ &tlmm {
pinctrl-names = "default";
pinctrl-0 = <&bios_flash_wp_od>;

- amp_en: amp-en {
+ amp_en: amp-en-pins {
pins = "gpio63";
function = "gpio";
bias-disable;
drive-strength = <2>;
};

- ap_ec_int_l: ap-ec-int-l {
+ ap_ec_int_l: ap-ec-int-l-pins {
pins = "gpio18";
function = "gpio";
bias-pull-up;
};

- bios_flash_wp_od: bios-flash-wp-od {
+ bios_flash_wp_od: bios-flash-wp-od-pins {
pins = "gpio16";
function = "gpio";
/* Has external pull */
bias-disable;
};

- en_fp_rails: en-fp-rails {
+ en_fp_rails: en-fp-rails-pins {
pins = "gpio77";
function = "gpio";
bias-disable;
@@ -745,60 +745,60 @@ en_fp_rails: en-fp-rails {
output-high;
};

- en_pp3300_codec: en-pp3300-codec {
+ en_pp3300_codec: en-pp3300-codec-pins {
pins = "gpio105";
function = "gpio";
bias-disable;
drive-strength = <2>;
};

- en_pp3300_dx_edp: en-pp3300-dx-edp {
+ en_pp3300_dx_edp: en-pp3300-dx-edp-pins {
pins = "gpio80";
function = "gpio";
bias-disable;
drive-strength = <2>;
};

- fp_rst_l: fp-rst-l {
+ fp_rst_l: fp-rst-l-pins {
pins = "gpio78";
function = "gpio";
bias-disable;
drive-strength = <2>;
};

- fp_to_ap_irq_l: fp-to-ap-irq-l {
+ fp_to_ap_irq_l: fp-to-ap-irq-l-pins {
pins = "gpio61";
function = "gpio";
/* Has external pullup */
bias-disable;
};

- fpmcu_boot0: fpmcu-boot0 {
+ fpmcu_boot0: fpmcu-boot0-pins {
pins = "gpio68";
function = "gpio";
bias-disable;
};

- gsc_ap_int_odl: gsc-ap-int-odl {
+ gsc_ap_int_odl: gsc-ap-int-odl-pins {
pins = "gpio104";
function = "gpio";
bias-pull-up;
};

- hp_irq: hp-irq {
+ hp_irq: hp-irq-pins {
pins = "gpio101";
function = "gpio";
bias-pull-up;
};

- hub_en: hub-en {
+ hub_en: hub-en-pins {
pins = "gpio157";
function = "gpio";
bias-disable;
drive-strength = <2>;
};

- pe_wake_odl: pe-wake-odl {
+ pe_wake_odl: pe-wake-odl-pins {
pins = "gpio3";
function = "gpio";
/* Has external pull */
@@ -807,45 +807,45 @@ pe_wake_odl: pe-wake-odl {
};

/* For ap_spi_fp */
- qup_spi9_cs_gpio_init_high: qup-spi9-cs-gpio-init-high {
+ qup_spi9_cs_gpio_init_high: qup-spi9-cs-gpio-init-high-pins {
pins = "gpio39";
function = "gpio";
output-high;
};

/* For ap_ec_spi */
- qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high {
+ qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high-pins {
pins = "gpio43";
function = "gpio";
output-high;
};

- sar0_irq_odl: sar0-irq-odl {
+ sar0_irq_odl: sar0-irq-odl-pins {
pins = "gpio141";
function = "gpio";
bias-pull-up;
};

- sar1_irq_odl: sar1-irq-odl {
+ sar1_irq_odl: sar1-irq-odl-pins {
pins = "gpio140";
function = "gpio";
bias-pull-up;
};

- sd_cd_odl: sd-cd-odl {
+ sd_cd_odl: sd-cd-odl-pins {
pins = "gpio91";
function = "gpio";
bias-pull-up;
};

- ssd_en: ssd-en {
+ ssd_en: ssd-en-pins {
pins = "gpio51";
function = "gpio";
bias-disable;
drive-strength = <2>;
};

- ssd_rst_l: ssd-rst-l {
+ ssd_rst_l: ssd-rst-l-pins {
pins = "gpio2";
function = "gpio";
bias-disable;
@@ -853,14 +853,14 @@ ssd_rst_l: ssd-rst-l {
output-low;
};

- tp_int_odl: tp-int-odl {
+ tp_int_odl: tp-int-odl-pins {
pins = "gpio7";
function = "gpio";
/* Has external pullup */
bias-disable;
};

- wf_cam_en: wf-cam-en {
+ wf_cam_en: wf-cam-en-pins {
pins = "gpio119";
function = "gpio";
/* Has external pulldown */
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi
index a7c346aa3b02..7f5143e9bb80 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi
@@ -79,26 +79,26 @@ cr50: tpm@0 {
};

&tlmm {
- ap_ec_int_l: ap-ec-int-l {
+ ap_ec_int_l: ap-ec-int-l-pins {
pins = "gpio18";
function = "gpio";
input-enable;
bias-pull-up;
};

- h1_ap_int_odl: h1-ap-int-odl {
+ h1_ap_int_odl: h1-ap-int-odl-pins {
pins = "gpio104";
function = "gpio";
input-enable;
bias-pull-up;
};

- qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high {
+ qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high-pins {
pins = "gpio43";
output-high;
};

- qup_spi14_cs_gpio_init_high: qup-spi14-cs-gpio-init-high {
+ qup_spi14_cs_gpio_init_high: qup-spi14-cs-gpio-init-high-pins {
pins = "gpio59";
output-high;
};
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index 0c48db69e1ef..89ecf0d25a12 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -550,18 +550,18 @@ &sdc2_data {
};

&tlmm {
- bt_en: bt-en {
+ bt_en: bt-en-pins {
pins = "gpio85";
function = "gpio";
output-low;
bias-disable;
};

- nvme_pwren: nvme-pwren {
+ nvme_pwren: nvme-pwren-pins {
function = "gpio";
};

- pcie1_reset_n: pcie1-reset-n {
+ pcie1_reset_n: pcie1-reset-n-pins {
pins = "gpio2";
function = "gpio";

@@ -570,7 +570,7 @@ pcie1_reset_n: pcie1-reset-n {
bias-disable;
};

- pcie1_wake_n: pcie1-wake-n {
+ pcie1_wake_n: pcie1-wake-n-pins {
pins = "gpio3";
function = "gpio";

@@ -578,7 +578,7 @@ pcie1_wake_n: pcie1-wake-n {
bias-pull-up;
};

- qup_uart7_sleep_cts: qup-uart7-sleep-cts {
+ qup_uart7_sleep_cts: qup-uart7-sleep-cts-pins {
pins = "gpio28";
function = "gpio";
/*
@@ -591,7 +591,7 @@ qup_uart7_sleep_cts: qup-uart7-sleep-cts {
bias-bus-hold;
};

- qup_uart7_sleep_rts: qup-uart7-sleep-rts {
+ qup_uart7_sleep_rts: qup-uart7-sleep-rts-pins {
pins = "gpio29";
function = "gpio";
/*
@@ -603,7 +603,7 @@ qup_uart7_sleep_rts: qup-uart7-sleep-rts {
bias-pull-down;
};

- qup_uart7_sleep_tx: qup-uart7-sleep-tx {
+ qup_uart7_sleep_tx: qup-uart7-sleep-tx-pins {
pins = "gpio30";
function = "gpio";
/*
@@ -613,7 +613,7 @@ qup_uart7_sleep_tx: qup-uart7-sleep-tx {
bias-pull-up;
};

- qup_uart7_sleep_rx: qup-uart7-sleep-rx {
+ qup_uart7_sleep_rx: qup-uart7-sleep-rx-pins {
pins = "gpio31";
function = "gpio";
/*
@@ -624,13 +624,13 @@ qup_uart7_sleep_rx: qup-uart7-sleep-rx {
bias-pull-up;
};

- sd_cd: sd-cd {
+ sd_cd: sd-cd-pins {
pins = "gpio91";
function = "gpio";
bias-pull-up;
};

- sw_ctrl: sw-ctrl {
+ sw_ctrl: sw-ctrl-pins {
pins = "gpio86";
function = "gpio";
bias-pull-down;
diff --git a/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi b/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi
index 7cd91df7a118..0b56aecf857b 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi
@@ -542,7 +542,7 @@ pmic_edp_bl_pwm: pmic-edp-bl-pwm-state {
};

&tlmm {
- mos_bt_en: mos-bt-en {
+ mos_bt_en: mos-bt-en-pins {
pins = "gpio85";
function = "gpio";
drive-strength = <2>;
@@ -550,7 +550,7 @@ mos_bt_en: mos-bt-en {
};

/* For mos_bt_uart */
- qup_uart7_sleep_cts: qup-uart7-sleep-cts {
+ qup_uart7_sleep_cts: qup-uart7-sleep-cts-pins {
pins = "gpio28";
function = "gpio";
/*
@@ -564,7 +564,7 @@ qup_uart7_sleep_cts: qup-uart7-sleep-cts {
};

/* For mos_bt_uart */
- qup_uart7_sleep_rts: qup-uart7-sleep-rts {
+ qup_uart7_sleep_rts: qup-uart7-sleep-rts-pins {
pins = "gpio29";
function = "gpio";
/*
@@ -577,7 +577,7 @@ qup_uart7_sleep_rts: qup-uart7-sleep-rts {
};

/* For mos_bt_uart */
- qup_uart7_sleep_rx: qup-uart7-sleep-rx {
+ qup_uart7_sleep_rx: qup-uart7-sleep-rx-pins {
pins = "gpio31";
function = "gpio";
/*
@@ -589,7 +589,7 @@ qup_uart7_sleep_rx: qup-uart7-sleep-rx {
};

/* For mos_bt_uart */
- qup_uart7_sleep_tx: qup-uart7-sleep-tx {
+ qup_uart7_sleep_tx: qup-uart7-sleep-tx-pins {
pins = "gpio30";
function = "gpio";
/*
@@ -599,13 +599,13 @@ qup_uart7_sleep_tx: qup-uart7-sleep-tx {
bias-pull-up;
};

- ts_int_conn: ts-int-conn {
+ ts_int_conn: ts-int-conn-pins {
pins = "gpio55";
function = "gpio";
bias-pull-up;
};

- ts_rst_conn: ts-rst-conn {
+ ts_rst_conn: ts-rst-conn-pins {
pins = "gpio54";
function = "gpio";
drive-strength = <2>;
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index ad04025a8a1a..07fa3e417a96 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -4061,791 +4061,791 @@ tlmm: pinctrl@f100000 {
gpio-ranges = <&tlmm 0 0 175>;
wakeup-parent = <&pdc>;

- dp_hot_plug_det: dp-hot-plug-det {
+ dp_hot_plug_det: dp-hot-plug-det-pins {
pins = "gpio47";
function = "dp_hot";
};

- edp_hot_plug_det: edp-hot-plug-det {
+ edp_hot_plug_det: edp-hot-plug-det-pins {
pins = "gpio60";
function = "edp_hot";
};

- mi2s0_data0: mi2s0-data0 {
+ mi2s0_data0: mi2s0-data0-pins {
pins = "gpio98";
function = "mi2s0_data0";
};

- mi2s0_data1: mi2s0-data1 {
+ mi2s0_data1: mi2s0-data1-pins {
pins = "gpio99";
function = "mi2s0_data1";
};

- mi2s0_mclk: mi2s0-mclk {
+ mi2s0_mclk: mi2s0-mclk-pins {
pins = "gpio96";
function = "pri_mi2s";
};

- mi2s0_sclk: mi2s0-sclk {
+ mi2s0_sclk: mi2s0-sclk-pins {
pins = "gpio97";
function = "mi2s0_sck";
};

- mi2s0_ws: mi2s0-ws {
+ mi2s0_ws: mi2s0-ws-pins {
pins = "gpio100";
function = "mi2s0_ws";
};

- mi2s1_data0: mi2s1-data0 {
+ mi2s1_data0: mi2s1-data0-pins {
pins = "gpio107";
function = "mi2s1_data0";
};

- mi2s1_sclk: mi2s1-sclk {
+ mi2s1_sclk: mi2s1-sclk-pins {
pins = "gpio106";
function = "mi2s1_sck";
};

- mi2s1_ws: mi2s1-ws {
+ mi2s1_ws: mi2s1-ws-pins {
pins = "gpio108";
function = "mi2s1_ws";
};

- pcie1_clkreq_n: pcie1-clkreq-n {
+ pcie1_clkreq_n: pcie1-clkreq-n-pins {
pins = "gpio79";
function = "pcie1_clkreqn";
};

- qspi_clk: qspi-clk {
+ qspi_clk: qspi-clk-pins {
pins = "gpio14";
function = "qspi_clk";
};

- qspi_cs0: qspi-cs0 {
+ qspi_cs0: qspi-cs0-pins {
pins = "gpio15";
function = "qspi_cs";
};

- qspi_cs1: qspi-cs1 {
+ qspi_cs1: qspi-cs1-pins {
pins = "gpio19";
function = "qspi_cs";
};

- qspi_data01: qspi-data01 {
+ qspi_data01: qspi-data01-pins {
pins = "gpio12", "gpio13";
function = "qspi_data";
};

- qspi_data12: qspi-data12 {
+ qspi_data12: qspi-data12-pins {
pins = "gpio16", "gpio17";
function = "qspi_data";
};

- qup_i2c0_data_clk: qup-i2c0-data-clk {
+ qup_i2c0_data_clk: qup-i2c0-data-clk-pins {
pins = "gpio0", "gpio1";
function = "qup00";
};

- qup_i2c1_data_clk: qup-i2c1-data-clk {
+ qup_i2c1_data_clk: qup-i2c1-data-clk-pins {
pins = "gpio4", "gpio5";
function = "qup01";
};

- qup_i2c2_data_clk: qup-i2c2-data-clk {
+ qup_i2c2_data_clk: qup-i2c2-data-clk-pins {
pins = "gpio8", "gpio9";
function = "qup02";
};

- qup_i2c3_data_clk: qup-i2c3-data-clk {
+ qup_i2c3_data_clk: qup-i2c3-data-clk-pins {
pins = "gpio12", "gpio13";
function = "qup03";
};

- qup_i2c4_data_clk: qup-i2c4-data-clk {
+ qup_i2c4_data_clk: qup-i2c4-data-clk-pins {
pins = "gpio16", "gpio17";
function = "qup04";
};

- qup_i2c5_data_clk: qup-i2c5-data-clk {
+ qup_i2c5_data_clk: qup-i2c5-data-clk-pins {
pins = "gpio20", "gpio21";
function = "qup05";
};

- qup_i2c6_data_clk: qup-i2c6-data-clk {
+ qup_i2c6_data_clk: qup-i2c6-data-clk-pins {
pins = "gpio24", "gpio25";
function = "qup06";
};

- qup_i2c7_data_clk: qup-i2c7-data-clk {
+ qup_i2c7_data_clk: qup-i2c7-data-clk-pins {
pins = "gpio28", "gpio29";
function = "qup07";
};

- qup_i2c8_data_clk: qup-i2c8-data-clk {
+ qup_i2c8_data_clk: qup-i2c8-data-clk-pins {
pins = "gpio32", "gpio33";
function = "qup10";
};

- qup_i2c9_data_clk: qup-i2c9-data-clk {
+ qup_i2c9_data_clk: qup-i2c9-data-clk-pins {
pins = "gpio36", "gpio37";
function = "qup11";
};

- qup_i2c10_data_clk: qup-i2c10-data-clk {
+ qup_i2c10_data_clk: qup-i2c10-data-clk-pins {
pins = "gpio40", "gpio41";
function = "qup12";
};

- qup_i2c11_data_clk: qup-i2c11-data-clk {
+ qup_i2c11_data_clk: qup-i2c11-data-clk-pins {
pins = "gpio44", "gpio45";
function = "qup13";
};

- qup_i2c12_data_clk: qup-i2c12-data-clk {
+ qup_i2c12_data_clk: qup-i2c12-data-clk-pins {
pins = "gpio48", "gpio49";
function = "qup14";
};

- qup_i2c13_data_clk: qup-i2c13-data-clk {
+ qup_i2c13_data_clk: qup-i2c13-data-clk-pins {
pins = "gpio52", "gpio53";
function = "qup15";
};

- qup_i2c14_data_clk: qup-i2c14-data-clk {
+ qup_i2c14_data_clk: qup-i2c14-data-clk-pins {
pins = "gpio56", "gpio57";
function = "qup16";
};

- qup_i2c15_data_clk: qup-i2c15-data-clk {
+ qup_i2c15_data_clk: qup-i2c15-data-clk-pins {
pins = "gpio60", "gpio61";
function = "qup17";
};

- qup_spi0_data_clk: qup-spi0-data-clk {
+ qup_spi0_data_clk: qup-spi0-data-clk-pins {
pins = "gpio0", "gpio1", "gpio2";
function = "qup00";
};

- qup_spi0_cs: qup-spi0-cs {
+ qup_spi0_cs: qup-spi0-cs-pins {
pins = "gpio3";
function = "qup00";
};

- qup_spi0_cs_gpio: qup-spi0-cs-gpio {
+ qup_spi0_cs_gpio: qup-spi0-cs-gpio-pins {
pins = "gpio3";
function = "gpio";
};

- qup_spi1_data_clk: qup-spi1-data-clk {
+ qup_spi1_data_clk: qup-spi1-data-clk-pins {
pins = "gpio4", "gpio5", "gpio6";
function = "qup01";
};

- qup_spi1_cs: qup-spi1-cs {
+ qup_spi1_cs: qup-spi1-cs-pins {
pins = "gpio7";
function = "qup01";
};

- qup_spi1_cs_gpio: qup-spi1-cs-gpio {
+ qup_spi1_cs_gpio: qup-spi1-cs-gpio-pins {
pins = "gpio7";
function = "gpio";
};

- qup_spi2_data_clk: qup-spi2-data-clk {
+ qup_spi2_data_clk: qup-spi2-data-clk-pins {
pins = "gpio8", "gpio9", "gpio10";
function = "qup02";
};

- qup_spi2_cs: qup-spi2-cs {
+ qup_spi2_cs: qup-spi2-cs-pins {
pins = "gpio11";
function = "qup02";
};

- qup_spi2_cs_gpio: qup-spi2-cs-gpio {
+ qup_spi2_cs_gpio: qup-spi2-cs-gpio-pins {
pins = "gpio11";
function = "gpio";
};

- qup_spi3_data_clk: qup-spi3-data-clk {
+ qup_spi3_data_clk: qup-spi3-data-clk-pins {
pins = "gpio12", "gpio13", "gpio14";
function = "qup03";
};

- qup_spi3_cs: qup-spi3-cs {
+ qup_spi3_cs: qup-spi3-cs-pins {
pins = "gpio15";
function = "qup03";
};

- qup_spi3_cs_gpio: qup-spi3-cs-gpio {
+ qup_spi3_cs_gpio: qup-spi3-cs-gpio-pins {
pins = "gpio15";
function = "gpio";
};

- qup_spi4_data_clk: qup-spi4-data-clk {
+ qup_spi4_data_clk: qup-spi4-data-clk-pins {
pins = "gpio16", "gpio17", "gpio18";
function = "qup04";
};

- qup_spi4_cs: qup-spi4-cs {
+ qup_spi4_cs: qup-spi4-cs-pins {
pins = "gpio19";
function = "qup04";
};

- qup_spi4_cs_gpio: qup-spi4-cs-gpio {
+ qup_spi4_cs_gpio: qup-spi4-cs-gpio-pins {
pins = "gpio19";
function = "gpio";
};

- qup_spi5_data_clk: qup-spi5-data-clk {
+ qup_spi5_data_clk: qup-spi5-data-clk-pins {
pins = "gpio20", "gpio21", "gpio22";
function = "qup05";
};

- qup_spi5_cs: qup-spi5-cs {
+ qup_spi5_cs: qup-spi5-cs-pins {
pins = "gpio23";
function = "qup05";
};

- qup_spi5_cs_gpio: qup-spi5-cs-gpio {
+ qup_spi5_cs_gpio: qup-spi5-cs-gpio-pins {
pins = "gpio23";
function = "gpio";
};

- qup_spi6_data_clk: qup-spi6-data-clk {
+ qup_spi6_data_clk: qup-spi6-data-clk-pins {
pins = "gpio24", "gpio25", "gpio26";
function = "qup06";
};

- qup_spi6_cs: qup-spi6-cs {
+ qup_spi6_cs: qup-spi6-cs-pins {
pins = "gpio27";
function = "qup06";
};

- qup_spi6_cs_gpio: qup-spi6-cs-gpio {
+ qup_spi6_cs_gpio: qup-spi6-cs-gpio-pins {
pins = "gpio27";
function = "gpio";
};

- qup_spi7_data_clk: qup-spi7-data-clk {
+ qup_spi7_data_clk: qup-spi7-data-clk-pins {
pins = "gpio28", "gpio29", "gpio30";
function = "qup07";
};

- qup_spi7_cs: qup-spi7-cs {
+ qup_spi7_cs: qup-spi7-cs-pins {
pins = "gpio31";
function = "qup07";
};

- qup_spi7_cs_gpio: qup-spi7-cs-gpio {
+ qup_spi7_cs_gpio: qup-spi7-cs-gpio-pins {
pins = "gpio31";
function = "gpio";
};

- qup_spi8_data_clk: qup-spi8-data-clk {
+ qup_spi8_data_clk: qup-spi8-data-clk-pins {
pins = "gpio32", "gpio33", "gpio34";
function = "qup10";
};

- qup_spi8_cs: qup-spi8-cs {
+ qup_spi8_cs: qup-spi8-cs-pins {
pins = "gpio35";
function = "qup10";
};

- qup_spi8_cs_gpio: qup-spi8-cs-gpio {
+ qup_spi8_cs_gpio: qup-spi8-cs-gpio-pins {
pins = "gpio35";
function = "gpio";
};

- qup_spi9_data_clk: qup-spi9-data-clk {
+ qup_spi9_data_clk: qup-spi9-data-clk-pins {
pins = "gpio36", "gpio37", "gpio38";
function = "qup11";
};

- qup_spi9_cs: qup-spi9-cs {
+ qup_spi9_cs: qup-spi9-cs-pins {
pins = "gpio39";
function = "qup11";
};

- qup_spi9_cs_gpio: qup-spi9-cs-gpio {
+ qup_spi9_cs_gpio: qup-spi9-cs-gpio-pins {
pins = "gpio39";
function = "gpio";
};

- qup_spi10_data_clk: qup-spi10-data-clk {
+ qup_spi10_data_clk: qup-spi10-data-clk-pins {
pins = "gpio40", "gpio41", "gpio42";
function = "qup12";
};

- qup_spi10_cs: qup-spi10-cs {
+ qup_spi10_cs: qup-spi10-cs-pins {
pins = "gpio43";
function = "qup12";
};

- qup_spi10_cs_gpio: qup-spi10-cs-gpio {
+ qup_spi10_cs_gpio: qup-spi10-cs-gpio-pins {
pins = "gpio43";
function = "gpio";
};

- qup_spi11_data_clk: qup-spi11-data-clk {
+ qup_spi11_data_clk: qup-spi11-data-clk-pins {
pins = "gpio44", "gpio45", "gpio46";
function = "qup13";
};

- qup_spi11_cs: qup-spi11-cs {
+ qup_spi11_cs: qup-spi11-cs-pins {
pins = "gpio47";
function = "qup13";
};

- qup_spi11_cs_gpio: qup-spi11-cs-gpio {
+ qup_spi11_cs_gpio: qup-spi11-cs-gpio-pins {
pins = "gpio47";
function = "gpio";
};

- qup_spi12_data_clk: qup-spi12-data-clk {
+ qup_spi12_data_clk: qup-spi12-data-clk-pins {
pins = "gpio48", "gpio49", "gpio50";
function = "qup14";
};

- qup_spi12_cs: qup-spi12-cs {
+ qup_spi12_cs: qup-spi12-cs-pins {
pins = "gpio51";
function = "qup14";
};

- qup_spi12_cs_gpio: qup-spi12-cs-gpio {
+ qup_spi12_cs_gpio: qup-spi12-cs-gpio-pins {
pins = "gpio51";
function = "gpio";
};

- qup_spi13_data_clk: qup-spi13-data-clk {
+ qup_spi13_data_clk: qup-spi13-data-clk-pins {
pins = "gpio52", "gpio53", "gpio54";
function = "qup15";
};

- qup_spi13_cs: qup-spi13-cs {
+ qup_spi13_cs: qup-spi13-cs-pins {
pins = "gpio55";
function = "qup15";
};

- qup_spi13_cs_gpio: qup-spi13-cs-gpio {
+ qup_spi13_cs_gpio: qup-spi13-cs-gpio-pins {
pins = "gpio55";
function = "gpio";
};

- qup_spi14_data_clk: qup-spi14-data-clk {
+ qup_spi14_data_clk: qup-spi14-data-clk-pins {
pins = "gpio56", "gpio57", "gpio58";
function = "qup16";
};

- qup_spi14_cs: qup-spi14-cs {
+ qup_spi14_cs: qup-spi14-cs-pins {
pins = "gpio59";
function = "qup16";
};

- qup_spi14_cs_gpio: qup-spi14-cs-gpio {
+ qup_spi14_cs_gpio: qup-spi14-cs-gpio-pins {
pins = "gpio59";
function = "gpio";
};

- qup_spi15_data_clk: qup-spi15-data-clk {
+ qup_spi15_data_clk: qup-spi15-data-clk-pins {
pins = "gpio60", "gpio61", "gpio62";
function = "qup17";
};

- qup_spi15_cs: qup-spi15-cs {
+ qup_spi15_cs: qup-spi15-cs-pins {
pins = "gpio63";
function = "qup17";
};

- qup_spi15_cs_gpio: qup-spi15-cs-gpio {
+ qup_spi15_cs_gpio: qup-spi15-cs-gpio-pins {
pins = "gpio63";
function = "gpio";
};

- qup_uart0_cts: qup-uart0-cts {
+ qup_uart0_cts: qup-uart0-cts-pins {
pins = "gpio0";
function = "qup00";
};

- qup_uart0_rts: qup-uart0-rts {
+ qup_uart0_rts: qup-uart0-rts-pins {
pins = "gpio1";
function = "qup00";
};

- qup_uart0_tx: qup-uart0-tx {
+ qup_uart0_tx: qup-uart0-tx-pins {
pins = "gpio2";
function = "qup00";
};

- qup_uart0_rx: qup-uart0-rx {
+ qup_uart0_rx: qup-uart0-rx-pins {
pins = "gpio3";
function = "qup00";
};

- qup_uart1_cts: qup-uart1-cts {
+ qup_uart1_cts: qup-uart1-cts-pins {
pins = "gpio4";
function = "qup01";
};

- qup_uart1_rts: qup-uart1-rts {
+ qup_uart1_rts: qup-uart1-rts-pins {
pins = "gpio5";
function = "qup01";
};

- qup_uart1_tx: qup-uart1-tx {
+ qup_uart1_tx: qup-uart1-tx-pins {
pins = "gpio6";
function = "qup01";
};

- qup_uart1_rx: qup-uart1-rx {
+ qup_uart1_rx: qup-uart1-rx-pins {
pins = "gpio7";
function = "qup01";
};

- qup_uart2_cts: qup-uart2-cts {
+ qup_uart2_cts: qup-uart2-cts-pins {
pins = "gpio8";
function = "qup02";
};

- qup_uart2_rts: qup-uart2-rts {
+ qup_uart2_rts: qup-uart2-rts-pins {
pins = "gpio9";
function = "qup02";
};

- qup_uart2_tx: qup-uart2-tx {
+ qup_uart2_tx: qup-uart2-tx-pins {
pins = "gpio10";
function = "qup02";
};

- qup_uart2_rx: qup-uart2-rx {
+ qup_uart2_rx: qup-uart2-rx-pins {
pins = "gpio11";
function = "qup02";
};

- qup_uart3_cts: qup-uart3-cts {
+ qup_uart3_cts: qup-uart3-cts-pins {
pins = "gpio12";
function = "qup03";
};

- qup_uart3_rts: qup-uart3-rts {
+ qup_uart3_rts: qup-uart3-rts-pins {
pins = "gpio13";
function = "qup03";
};

- qup_uart3_tx: qup-uart3-tx {
+ qup_uart3_tx: qup-uart3-tx-pins {
pins = "gpio14";
function = "qup03";
};

- qup_uart3_rx: qup-uart3-rx {
+ qup_uart3_rx: qup-uart3-rx-pins {
pins = "gpio15";
function = "qup03";
};

- qup_uart4_cts: qup-uart4-cts {
+ qup_uart4_cts: qup-uart4-cts-pins {
pins = "gpio16";
function = "qup04";
};

- qup_uart4_rts: qup-uart4-rts {
+ qup_uart4_rts: qup-uart4-rts-pins {
pins = "gpio17";
function = "qup04";
};

- qup_uart4_tx: qup-uart4-tx {
+ qup_uart4_tx: qup-uart4-tx-pins {
pins = "gpio18";
function = "qup04";
};

- qup_uart4_rx: qup-uart4-rx {
+ qup_uart4_rx: qup-uart4-rx-pins {
pins = "gpio19";
function = "qup04";
};

- qup_uart5_cts: qup-uart5-cts {
+ qup_uart5_cts: qup-uart5-cts-pins {
pins = "gpio20";
function = "qup05";
};

- qup_uart5_rts: qup-uart5-rts {
+ qup_uart5_rts: qup-uart5-rts-pins {
pins = "gpio21";
function = "qup05";
};

- qup_uart5_tx: qup-uart5-tx {
+ qup_uart5_tx: qup-uart5-tx-pins {
pins = "gpio22";
function = "qup05";
};

- qup_uart5_rx: qup-uart5-rx {
+ qup_uart5_rx: qup-uart5-rx-pins {
pins = "gpio23";
function = "qup05";
};

- qup_uart6_cts: qup-uart6-cts {
+ qup_uart6_cts: qup-uart6-cts-pins {
pins = "gpio24";
function = "qup06";
};

- qup_uart6_rts: qup-uart6-rts {
+ qup_uart6_rts: qup-uart6-rts-pins {
pins = "gpio25";
function = "qup06";
};

- qup_uart6_tx: qup-uart6-tx {
+ qup_uart6_tx: qup-uart6-tx-pins {
pins = "gpio26";
function = "qup06";
};

- qup_uart6_rx: qup-uart6-rx {
+ qup_uart6_rx: qup-uart6-rx-pins {
pins = "gpio27";
function = "qup06";
};

- qup_uart7_cts: qup-uart7-cts {
+ qup_uart7_cts: qup-uart7-cts-pins {
pins = "gpio28";
function = "qup07";
};

- qup_uart7_rts: qup-uart7-rts {
+ qup_uart7_rts: qup-uart7-rts-pins {
pins = "gpio29";
function = "qup07";
};

- qup_uart7_tx: qup-uart7-tx {
+ qup_uart7_tx: qup-uart7-tx-pins {
pins = "gpio30";
function = "qup07";
};

- qup_uart7_rx: qup-uart7-rx {
+ qup_uart7_rx: qup-uart7-rx-pins {
pins = "gpio31";
function = "qup07";
};

- qup_uart8_cts: qup-uart8-cts {
+ qup_uart8_cts: qup-uart8-cts-pins {
pins = "gpio32";
function = "qup10";
};

- qup_uart8_rts: qup-uart8-rts {
+ qup_uart8_rts: qup-uart8-rts-pins {
pins = "gpio33";
function = "qup10";
};

- qup_uart8_tx: qup-uart8-tx {
+ qup_uart8_tx: qup-uart8-tx-pins {
pins = "gpio34";
function = "qup10";
};

- qup_uart8_rx: qup-uart8-rx {
+ qup_uart8_rx: qup-uart8-rx-pins {
pins = "gpio35";
function = "qup10";
};

- qup_uart9_cts: qup-uart9-cts {
+ qup_uart9_cts: qup-uart9-cts-pins {
pins = "gpio36";
function = "qup11";
};

- qup_uart9_rts: qup-uart9-rts {
+ qup_uart9_rts: qup-uart9-rts-pins {
pins = "gpio37";
function = "qup11";
};

- qup_uart9_tx: qup-uart9-tx {
+ qup_uart9_tx: qup-uart9-tx-pins {
pins = "gpio38";
function = "qup11";
};

- qup_uart9_rx: qup-uart9-rx {
+ qup_uart9_rx: qup-uart9-rx-pins {
pins = "gpio39";
function = "qup11";
};

- qup_uart10_cts: qup-uart10-cts {
+ qup_uart10_cts: qup-uart10-cts-pins {
pins = "gpio40";
function = "qup12";
};

- qup_uart10_rts: qup-uart10-rts {
+ qup_uart10_rts: qup-uart10-rts-pins {
pins = "gpio41";
function = "qup12";
};

- qup_uart10_tx: qup-uart10-tx {
+ qup_uart10_tx: qup-uart10-tx-pins {
pins = "gpio42";
function = "qup12";
};

- qup_uart10_rx: qup-uart10-rx {
+ qup_uart10_rx: qup-uart10-rx-pins {
pins = "gpio43";
function = "qup12";
};

- qup_uart11_cts: qup-uart11-cts {
+ qup_uart11_cts: qup-uart11-cts-pins {
pins = "gpio44";
function = "qup13";
};

- qup_uart11_rts: qup-uart11-rts {
+ qup_uart11_rts: qup-uart11-rts-pins {
pins = "gpio45";
function = "qup13";
};

- qup_uart11_tx: qup-uart11-tx {
+ qup_uart11_tx: qup-uart11-tx-pins {
pins = "gpio46";
function = "qup13";
};

- qup_uart11_rx: qup-uart11-rx {
+ qup_uart11_rx: qup-uart11-rx-pins {
pins = "gpio47";
function = "qup13";
};

- qup_uart12_cts: qup-uart12-cts {
+ qup_uart12_cts: qup-uart12-cts-pins {
pins = "gpio48";
function = "qup14";
};

- qup_uart12_rts: qup-uart12-rts {
+ qup_uart12_rts: qup-uart12-rts-pins {
pins = "gpio49";
function = "qup14";
};

- qup_uart12_tx: qup-uart12-tx {
+ qup_uart12_tx: qup-uart12-tx-pins {
pins = "gpio50";
function = "qup14";
};

- qup_uart12_rx: qup-uart12-rx {
+ qup_uart12_rx: qup-uart12-rx-pins {
pins = "gpio51";
function = "qup14";
};

- qup_uart13_cts: qup-uart13-cts {
+ qup_uart13_cts: qup-uart13-cts-pins {
pins = "gpio52";
function = "qup15";
};

- qup_uart13_rts: qup-uart13-rts {
+ qup_uart13_rts: qup-uart13-rts-pins {
pins = "gpio53";
function = "qup15";
};

- qup_uart13_tx: qup-uart13-tx {
+ qup_uart13_tx: qup-uart13-tx-pins {
pins = "gpio54";
function = "qup15";
};

- qup_uart13_rx: qup-uart13-rx {
+ qup_uart13_rx: qup-uart13-rx-pins {
pins = "gpio55";
function = "qup15";
};

- qup_uart14_cts: qup-uart14-cts {
+ qup_uart14_cts: qup-uart14-cts-pins {
pins = "gpio56";
function = "qup16";
};

- qup_uart14_rts: qup-uart14-rts {
+ qup_uart14_rts: qup-uart14-rts-pins {
pins = "gpio57";
function = "qup16";
};

- qup_uart14_tx: qup-uart14-tx {
+ qup_uart14_tx: qup-uart14-tx-pins {
pins = "gpio58";
function = "qup16";
};

- qup_uart14_rx: qup-uart14-rx {
+ qup_uart14_rx: qup-uart14-rx-pins {
pins = "gpio59";
function = "qup16";
};

- qup_uart15_cts: qup-uart15-cts {
+ qup_uart15_cts: qup-uart15-cts-pins {
pins = "gpio60";
function = "qup17";
};

- qup_uart15_rts: qup-uart15-rts {
+ qup_uart15_rts: qup-uart15-rts-pins {
pins = "gpio61";
function = "qup17";
};

- qup_uart15_tx: qup-uart15-tx {
+ qup_uart15_tx: qup-uart15-tx-pins {
pins = "gpio62";
function = "qup17";
};

- qup_uart15_rx: qup-uart15-rx {
+ qup_uart15_rx: qup-uart15-rx-pins {
pins = "gpio63";
function = "qup17";
};

- sdc1_clk: sdc1-clk {
+ sdc1_clk: sdc1-clk-pins {
pins = "sdc1_clk";
};

- sdc1_cmd: sdc1-cmd {
+ sdc1_cmd: sdc1-cmd-pins {
pins = "sdc1_cmd";
};

- sdc1_data: sdc1-data {
+ sdc1_data: sdc1-data-pins {
pins = "sdc1_data";
};

- sdc1_rclk: sdc1-rclk {
+ sdc1_rclk: sdc1-rclk-pins {
pins = "sdc1_rclk";
};

- sdc1_clk_sleep: sdc1-clk-sleep {
+ sdc1_clk_sleep: sdc1-clk-sleep-pins {
pins = "sdc1_clk";
drive-strength = <2>;
bias-bus-hold;
};

- sdc1_cmd_sleep: sdc1-cmd-sleep {
+ sdc1_cmd_sleep: sdc1-cmd-sleep-pins {
pins = "sdc1_cmd";
drive-strength = <2>;
bias-bus-hold;
};

- sdc1_data_sleep: sdc1-data-sleep {
+ sdc1_data_sleep: sdc1-data-sleep-pins {
pins = "sdc1_data";
drive-strength = <2>;
bias-bus-hold;
};

- sdc1_rclk_sleep: sdc1-rclk-sleep {
+ sdc1_rclk_sleep: sdc1-rclk-sleep-pins {
pins = "sdc1_rclk";
drive-strength = <2>;
bias-bus-hold;
};

- sdc2_clk: sdc2-clk {
+ sdc2_clk: sdc2-clk-pins {
pins = "sdc2_clk";
};

- sdc2_cmd: sdc2-cmd {
+ sdc2_cmd: sdc2-cmd-pins {
pins = "sdc2_cmd";
};

- sdc2_data: sdc2-data {
+ sdc2_data: sdc2-data-pins {
pins = "sdc2_data";
};

- sdc2_clk_sleep: sdc2-clk-sleep {
+ sdc2_clk_sleep: sdc2-clk-sleep-pins {
pins = "sdc2_clk";
drive-strength = <2>;
bias-bus-hold;
};

- sdc2_cmd_sleep: sdc2-cmd-sleep {
+ sdc2_cmd_sleep: sdc2-cmd-sleep-pins {
pins = "sdc2_cmd";
drive-strength = <2>;
bias-bus-hold;
};

- sdc2_data_sleep: sdc2-data-sleep {
+ sdc2_data_sleep: sdc2-data-sleep-pins {
pins = "sdc2_data";
drive-strength = <2>;
bias-bus-hold;
--
2.34.1

2022-09-12 06:57:27

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 19/40] dt-bindings: pinctrl: qcom,sm8450-pinctrl: fix matching pin config

Matching PMIC GPIOs config nodes within a '-state' node by '.*' pattern
does not work as expected because of linux,phandle in the DTB:

qcom/sm4250-oneplus-billie2.dtb: pinctrl@500000: sdc1-on-state: 'oneOf' conditional failed, one must be fixed:
'pins' is a required property
'clk', 'cmd', 'data', 'rclk' do not match any of the regexes: 'pinctrl-[0-9]+'
[[26]] is not of type 'object'

Make the schema stricter and expect such nodes to be followed with a
'-pins' suffix.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml
index 9c891246245b..d1d1c1455b3c 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml
@@ -43,8 +43,9 @@ patternProperties:
oneOf:
- $ref: "#/$defs/qcom-sm8450-tlmm-state"
- patternProperties:
- ".*":
+ "-pins$":
$ref: "#/$defs/qcom-sm8450-tlmm-state"
+ additionalProperties: false

$defs:
qcom-sm8450-tlmm-state:
@@ -127,13 +128,13 @@ examples:
};

uart-w-subnodes-state {
- rx {
+ rx-pins {
pins = "gpio26";
function = "qup7";
bias-pull-up;
};

- tx {
+ tx-pins {
pins = "gpio27";
function = "qup7";
bias-disable;
--
2.34.1

2022-09-12 06:57:27

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 16/40] dt-bindings: pinctrl: qcom,sm8350-pinctrl: fix matching pin config

Matching PMIC GPIOs config nodes within a '-state' node by '.*' pattern
does not work as expected because of linux,phandle in the DTB:

sm8350-hdk.dtb: pinctrl@f100000: qup-uart3-default-state: 'oneOf' conditional failed, one must be fixed:
'pins' is a required property
'function' is a required property
'rx', 'tx' do not match any of the regexes: 'pinctrl-[0-9]+'
[[59]] is not of type 'object'

Make the schema stricter and expect such nodes to be followed with a
'-pins' suffix.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../devicetree/bindings/pinctrl/qcom,sm8350-pinctrl.yaml | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-pinctrl.yaml
index 6b7789db2f75..211cca11f94f 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-pinctrl.yaml
@@ -44,8 +44,9 @@ patternProperties:
oneOf:
- $ref: "#/$defs/qcom-sm8350-tlmm-state"
- patternProperties:
- ".*":
+ "-pins$":
$ref: "#/$defs/qcom-sm8350-tlmm-state"
+ additionalProperties: false

$defs:
qcom-sm8350-tlmm-state:
@@ -130,13 +131,13 @@ examples:
};

uart-w-subnodes-state {
- rx {
+ rx-pins {
pins = "gpio18";
function = "qup3";
bias-pull-up;
};

- tx {
+ tx-pins {
pins = "gpio19";
function = "qup3";
bias-disable;
--
2.34.1

2022-09-12 06:57:32

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 09/40] dt-bindings: pinctrl: qcom,sm6350-pinctrl: fix indentation in example

Bindings example should be indented with 4-spaces.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../bindings/pinctrl/qcom,sm6350-pinctrl.yaml | 58 +++++++++----------
1 file changed, 29 insertions(+), 29 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-pinctrl.yaml
index 0c4bf6e90ba0..856b9c567ecb 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-pinctrl.yaml
@@ -125,34 +125,34 @@ $defs:

examples:
- |
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- pinctrl@f100000 {
- compatible = "qcom,sm6350-tlmm";
- reg = <0x0f100000 0x300000>;
- interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- gpio-ranges = <&tlmm 0 0 157>;
-
- gpio-wo-subnode-state {
- pins = "gpio1";
- function = "gpio";
- };
-
- uart-w-subnodes-state {
- rx-pins {
- pins = "gpio25";
- function = "qup13_f2";
- bias-disable;
- };
-
- tx-pins {
- pins = "gpio26";
- function = "qup13_f2";
- bias-disable;
- };
- };
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ pinctrl@f100000 {
+ compatible = "qcom,sm6350-tlmm";
+ reg = <0x0f100000 0x300000>;
+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-ranges = <&tlmm 0 0 157>;
+
+ gpio-wo-subnode-state {
+ pins = "gpio1";
+ function = "gpio";
};
+
+ uart-w-subnodes-state {
+ rx-pins {
+ pins = "gpio25";
+ function = "qup13_f2";
+ bias-disable;
+ };
+
+ tx-pins {
+ pins = "gpio26";
+ function = "qup13_f2";
+ bias-disable;
+ };
+ };
+ };
...
--
2.34.1

2022-09-12 06:58:57

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 01/40] dt-bindings: pinctrl: qcom,sm6115-pinctrl: fix matching pin config

Matching PMIC GPIOs config nodes within a '-state' node by '.*' pattern
does not work as expected because of linux,phandle in the DTB:

'pins' is a required property
'function' is a required property
'rx', 'tx' do not match any of the regexes: 'pinctrl-[0-9]+'
[[59]] is not of type 'object'

Make the schema stricter and expect such nodes to be followed with a
'-pins' suffix.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Iskren Chernev <[email protected]>
---
.../bindings/pinctrl/qcom,sm6115-pinctrl.yaml | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml
index d8443811767d..8a2b4767c7b6 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml
@@ -59,8 +59,9 @@ patternProperties:
oneOf:
- $ref: "#/$defs/qcom-sm6115-tlmm-state"
- patternProperties:
- ".*":
+ "-pins$":
$ref: "#/$defs/qcom-sm6115-tlmm-state"
+ additionalProperties: false

'$defs':
qcom-sm6115-tlmm-state:
@@ -155,25 +156,25 @@ examples:
gpio-ranges = <&tlmm 0 0 114>;

sdc2_on_state: sdc2-on-state {
- clk {
+ clk-pins {
pins = "sdc2_clk";
bias-disable;
drive-strength = <16>;
};

- cmd {
+ cmd-pins {
pins = "sdc2_cmd";
bias-pull-up;
drive-strength = <10>;
};

- data {
+ data-pins {
pins = "sdc2_data";
bias-pull-up;
drive-strength = <10>;
};

- sd-cd {
+ sd-cd-pins {
pins = "gpio88";
function = "gpio";
bias-pull-up;
--
2.34.1

2022-09-12 06:59:43

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 13/40] dt-bindings: pinctrl: qcom,sm8250-pinctrl: do not require function on non-GPIOs

Certain pins, like SDcard related, do not have functions and such should
not be required:

sdc1-clk-pins: 'function' is a required property

Signed-off-by: Krzysztof Kozlowski <[email protected]>

---

Another question is whether 'function' should be disallowed for such
pins?
---
.../bindings/pinctrl/qcom,sm8250-pinctrl.yaml | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml
index 15bb1018cf21..12bdc2e67c4d 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml
@@ -110,7 +110,15 @@ patternProperties:

required:
- pins
- - function
+
+ allOf:
+ - if:
+ properties:
+ pins:
+ pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9])$"
+ then:
+ required:
+ - function

additionalProperties: false

--
2.34.1

2022-09-12 07:00:13

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 25/40] dt-bindings: pinctrl: qcom,sc7280-pinctrl: add gpio-line-names

Add common gpio-line-names property (used on SC7280 Herobrine boards).

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 3 +++
1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
index b12e738cabfa..463f2e95e237 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
@@ -42,6 +42,9 @@ properties:
gpio-ranges:
maxItems: 1

+ gpio-line-names:
+ maxItems: 174
+
wakeup-parent: true

#PIN CONFIGURATION NODES
--
2.34.1

2022-09-12 07:01:30

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 15/40] dt-bindings: pinctrl: qcom,sm8250-pinctrl: fix indentation in example

Bindings example should be indented with 4-spaces.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../bindings/pinctrl/qcom,sm8250-pinctrl.yaml | 30 +++++++++----------
1 file changed, 15 insertions(+), 15 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml
index bccc83f22aae..c44d02d28bc9 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml
@@ -141,18 +141,18 @@ additionalProperties: false

examples:
- |
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- pinctrl@1f00000 {
- compatible = "qcom,sm8250-pinctrl";
- reg = <0x0f100000 0x300000>,
- <0x0f500000 0x300000>,
- <0x0f900000 0x300000>;
- reg-names = "west", "south", "north";
- interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- gpio-ranges = <&tlmm 0 0 180>;
- wakeup-parent = <&pdc>;
- };
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ pinctrl@1f00000 {
+ compatible = "qcom,sm8250-pinctrl";
+ reg = <0x0f100000 0x300000>,
+ <0x0f500000 0x300000>,
+ <0x0f900000 0x300000>;
+ reg-names = "west", "south", "north";
+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-ranges = <&tlmm 0 0 180>;
+ wakeup-parent = <&pdc>;
+ };
--
2.34.1

2022-09-12 07:02:10

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 03/40] dt-bindings: pinctrl: qcom,sm6115-pinctrl: fix indentation in example

Bindings example should be indented with 4-spaces.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Iskren Chernev <[email protected]>
---
.../bindings/pinctrl/qcom,sm6115-pinctrl.yaml | 80 +++++++++----------
1 file changed, 40 insertions(+), 40 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml
index 28b29bf714b4..e39fbb36d8c1 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml
@@ -150,44 +150,44 @@ additionalProperties: false

examples:
- |
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- tlmm: pinctrl@500000 {
- compatible = "qcom,sm6115-tlmm";
- reg = <0x500000 0x400000>,
- <0x900000 0x400000>,
- <0xd00000 0x400000>;
- reg-names = "west", "south", "east";
- interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- gpio-ranges = <&tlmm 0 0 114>;
-
- sdc2_on_state: sdc2-on-state {
- clk-pins {
- pins = "sdc2_clk";
- bias-disable;
- drive-strength = <16>;
- };
-
- cmd-pins {
- pins = "sdc2_cmd";
- bias-pull-up;
- drive-strength = <10>;
- };
-
- data-pins {
- pins = "sdc2_data";
- bias-pull-up;
- drive-strength = <10>;
- };
-
- sd-cd-pins {
- pins = "gpio88";
- function = "gpio";
- bias-pull-up;
- drive-strength = <2>;
- };
- };
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ tlmm: pinctrl@500000 {
+ compatible = "qcom,sm6115-tlmm";
+ reg = <0x500000 0x400000>,
+ <0x900000 0x400000>,
+ <0xd00000 0x400000>;
+ reg-names = "west", "south", "east";
+ interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-ranges = <&tlmm 0 0 114>;
+
+ sdc2_on_state: sdc2-on-state {
+ clk-pins {
+ pins = "sdc2_clk";
+ bias-disable;
+ drive-strength = <16>;
+ };
+
+ cmd-pins {
+ pins = "sdc2_cmd";
+ bias-pull-up;
+ drive-strength = <10>;
+ };
+
+ data-pins {
+ pins = "sdc2_data";
+ bias-pull-up;
+ drive-strength = <10>;
+ };
+
+ sd-cd-pins {
+ pins = "gpio88";
+ function = "gpio";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
};
+ };
--
2.34.1

2022-09-12 07:02:20

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 31/40] dt-bindings: pinctrl: qcom,sc8280xp-pinctrl: fix matching pin config

Matching PMIC GPIOs config nodes within a '-state' node by '.*' pattern
does not work as expected because of linux,phandle in the DTB:

'pins' is a required property
'function' is a required property
'rx', 'tx' do not match any of the regexes: 'pinctrl-[0-9]+'
[[59]] is not of type 'object'

Make the schema stricter and expect such nodes to be followed with a
'-pins' suffix.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml
index 87a381c9a19d..5147afc28721 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml
@@ -43,8 +43,9 @@ patternProperties:
oneOf:
- $ref: "#/$defs/qcom-sc8280xp-tlmm-state"
- patternProperties:
- ".*":
+ "-pins$":
$ref: "#/$defs/qcom-sc8280xp-tlmm-state"
+ additionalProperties: false

'$defs':
qcom-sc8280xp-tlmm-state:
@@ -135,13 +136,13 @@ examples:
};

uart-w-subnodes-state {
- rx {
+ rx-pins {
pins = "gpio4";
function = "qup14";
bias-pull-up;
};

- tx {
+ tx-pins {
pins = "gpio5";
function = "qup14";
bias-disable;
--
2.34.1

2022-09-12 07:03:02

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 30/40] dt-bindings: pinctrl: qcom,sc8180x-pinctrl: fix indentation in example

Bindings example should be indented with 4-spaces.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../pinctrl/qcom,sc8180x-pinctrl.yaml | 64 +++++++++----------
1 file changed, 32 insertions(+), 32 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml
index 4afe20bac87c..b98eeba2c530 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml
@@ -126,37 +126,37 @@ patternProperties:

examples:
- |
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- pinctrl@3100000 {
- compatible = "qcom,sc8180x-tlmm";
- reg = <0x03100000 0x300000>,
- <0x03500000 0x700000>,
- <0x03d00000 0x300000>;
- reg-names = "west", "east", "south";
- interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- gpio-ranges = <&tlmm 0 0 190>;
-
- gpio-wo-subnode-state {
- pins = "gpio1";
- function = "gpio";
- };
-
- uart-w-subnodes-state {
- rx-pins {
- pins = "gpio4";
- function = "qup6";
- bias-pull-up;
- };
-
- tx-pins {
- pins = "gpio5";
- function = "qup6";
- bias-disable;
- };
- };
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ pinctrl@3100000 {
+ compatible = "qcom,sc8180x-tlmm";
+ reg = <0x03100000 0x300000>,
+ <0x03500000 0x700000>,
+ <0x03d00000 0x300000>;
+ reg-names = "west", "east", "south";
+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-ranges = <&tlmm 0 0 190>;
+
+ gpio-wo-subnode-state {
+ pins = "gpio1";
+ function = "gpio";
};
+
+ uart-w-subnodes-state {
+ rx-pins {
+ pins = "gpio4";
+ function = "qup6";
+ bias-pull-up;
+ };
+
+ tx-pins {
+ pins = "gpio5";
+ function = "qup6";
+ bias-disable;
+ };
+ };
+ };
...
--
2.34.1

2022-09-12 07:03:04

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 34/40] arm64: dts: qcom: sm6125: align TLMM pin configuration with DT schema

DT schema expects TLMM pin configuration nodes to be named with '-state'
suffix and their optional children with '-pins' suffix.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts | 4 ++--
arch/arm64/boot/dts/qcom/sm6125.dtsi | 10 +++++-----
2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts
index 0aad2e94e757..6a8b88cc4385 100644
--- a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts
+++ b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts
@@ -87,7 +87,7 @@ &hsusb_phy1 {
};

&sdc2_off_state {
- sd-cd {
+ sd-cd-pins {
pins = "gpio98";
drive-strength = <2>;
bias-disable;
@@ -95,7 +95,7 @@ sd-cd {
};

&sdc2_on_state {
- sd-cd {
+ sd-cd-pins {
pins = "gpio98";
drive-strength = <2>;
bias-pull-up;
diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi
index 8c582a9e4ada..1fe3fa3ad877 100644
--- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi
@@ -387,19 +387,19 @@ tlmm: pinctrl@500000 {
#interrupt-cells = <2>;

sdc2_off_state: sdc2-off-state {
- clk {
+ clk-pins {
pins = "sdc2_clk";
drive-strength = <2>;
bias-disable;
};

- cmd {
+ cmd-pins {
pins = "sdc2_cmd";
drive-strength = <2>;
bias-pull-up;
};

- data {
+ data-pins {
pins = "sdc2_data";
drive-strength = <2>;
bias-pull-up;
@@ -413,13 +413,13 @@ clk {
bias-disable;
};

- cmd {
+ cmd-pins-pins {
pins = "sdc2_cmd";
drive-strength = <10>;
bias-pull-up;
};

- data {
+ data-pins {
pins = "sdc2_data";
drive-strength = <10>;
bias-pull-up;
--
2.34.1

2022-09-12 07:03:14

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 08/40] dt-bindings: pinctrl: qcom,sm6350-pinctrl: do not require function on non-GPIOs

Certain pins, like SDcard related, do not have functions and such should
not be required:

sdc1-clk-pins: 'function' is a required property

Signed-off-by: Krzysztof Kozlowski <[email protected]>

---

Another question is whether 'function' should be disallowed for such
pins?
---
.../bindings/pinctrl/qcom,sm6350-pinctrl.yaml | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-pinctrl.yaml
index 85a4ff5a5625..0c4bf6e90ba0 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-pinctrl.yaml
@@ -54,7 +54,6 @@ $defs:
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
- $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"

properties:
pins:
@@ -111,7 +110,16 @@ $defs:

required:
- pins
- - function
+
+ allOf:
+ - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
+ - if:
+ properties:
+ pins:
+ pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-7])$"
+ then:
+ required:
+ - function

additionalProperties: false

--
2.34.1

2022-09-12 07:03:42

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 38/40] arm64: dts: qcom: sm8450: align TLMM pin configuration with DT schema

DT schema expects TLMM pin configuration nodes to be named with '-state'
suffix and their optional children with '-pins' suffix.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../qcom/sm8450-sony-xperia-nagara-pdx223.dts | 12 +-
arch/arm64/boot/dts/qcom/sm8450.dtsi | 152 +++++++++---------
2 files changed, 82 insertions(+), 82 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx223.dts b/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx223.dts
index 7fe582b92a61..d68765eb6d4f 100644
--- a/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx223.dts
+++ b/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx223.dts
@@ -572,27 +572,27 @@ &spi10 {
&tlmm {
gpio-reserved-ranges = <28 4>;

- sdc2_default_state: sdc2-default {
- clk {
+ sdc2_default_state: sdc2-default-state {
+ clk-pins {
pins = "sdc2_clk";
drive-strength = <16>;
bias-disable;
};

- cmd {
+ cmd-pins {
pins = "sdc2_cmd";
drive-strength = <16>;
bias-pull-up;
};

- data {
+ data-pins {
pins = "sdc2_data";
drive-strength = <16>;
bias-pull-up;
};
};

- ts_int_default: ts-int-default {
+ ts_int_default: ts-int-default-state {
pins = "gpio23";
function = "gpio";
drive-strength = <2>;
@@ -600,7 +600,7 @@ ts_int_default: ts-int-default {
input-enable;
};

- sdc2_card_det_n: sd-card-det-n {
+ sdc2_card_det_n: sd-card-det-n-state {
pins = "gpio92";
function = "gpio";
drive-strength = <2>;
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index d0ebf61a0074..1d878256028f 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -2384,20 +2384,20 @@ tlmm: pinctrl@f100000 {
gpio-ranges = <&tlmm 0 0 211>;
wakeup-parent = <&pdc>;

- sdc2_sleep_state: sdc2-sleep {
- clk {
+ sdc2_sleep_state: sdc2-sleep-state {
+ clk-pins {
pins = "sdc2_clk";
drive-strength = <2>;
bias-disable;
};

- cmd {
+ cmd-pins {
pins = "sdc2_cmd";
drive-strength = <2>;
bias-pull-up;
};

- data {
+ data-pins {
pins = "sdc2_data";
drive-strength = <2>;
bias-pull-up;
@@ -2405,21 +2405,21 @@ data {
};

pcie0_default_state: pcie0-default-state {
- perst {
+ perst-pins {
pins = "gpio94";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};

- clkreq {
+ clkreq-pins {
pins = "gpio95";
function = "pcie0_clkreqn";
drive-strength = <2>;
bias-pull-up;
};

- wake {
+ wake-pins {
pins = "gpio96";
function = "gpio";
drive-strength = <2>;
@@ -2428,21 +2428,21 @@ wake {
};

pcie1_default_state: pcie1-default-state {
- perst {
+ perst-pins {
pins = "gpio97";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};

- clkreq {
+ clkreq-pins {
pins = "gpio98";
function = "pcie1_clkreqn";
drive-strength = <2>;
bias-pull-up;
};

- wake {
+ wake-pins {
pins = "gpio99";
function = "gpio";
drive-strength = <2>;
@@ -2450,350 +2450,350 @@ wake {
};
};

- qup_i2c0_data_clk: qup-i2c0-data-clk {
+ qup_i2c0_data_clk: qup-i2c0-data-clk-state {
pins = "gpio0", "gpio1";
function = "qup0";
};

- qup_i2c1_data_clk: qup-i2c1-data-clk {
+ qup_i2c1_data_clk: qup-i2c1-data-clk-state {
pins = "gpio4", "gpio5";
function = "qup1";
};

- qup_i2c2_data_clk: qup-i2c2-data-clk {
+ qup_i2c2_data_clk: qup-i2c2-data-clk-state {
pins = "gpio8", "gpio9";
function = "qup2";
};

- qup_i2c3_data_clk: qup-i2c3-data-clk {
+ qup_i2c3_data_clk: qup-i2c3-data-clk-state {
pins = "gpio12", "gpio13";
function = "qup3";
};

- qup_i2c4_data_clk: qup-i2c4-data-clk {
+ qup_i2c4_data_clk: qup-i2c4-data-clk-state {
pins = "gpio16", "gpio17";
function = "qup4";
};

- qup_i2c5_data_clk: qup-i2c5-data-clk {
+ qup_i2c5_data_clk: qup-i2c5-data-clk-state {
pins = "gpio206", "gpio207";
function = "qup5";
};

- qup_i2c6_data_clk: qup-i2c6-data-clk {
+ qup_i2c6_data_clk: qup-i2c6-data-clk-state {
pins = "gpio20", "gpio21";
function = "qup6";
};

- qup_i2c8_data_clk: qup-i2c8-data-clk {
+ qup_i2c8_data_clk: qup-i2c8-data-clk-state {
pins = "gpio28", "gpio29";
function = "qup8";
};

- qup_i2c9_data_clk: qup-i2c9-data-clk {
+ qup_i2c9_data_clk: qup-i2c9-data-clk-state {
pins = "gpio32", "gpio33";
function = "qup9";
};

- qup_i2c10_data_clk: qup-i2c10-data-clk {
+ qup_i2c10_data_clk: qup-i2c10-data-clk-state {
pins = "gpio36", "gpio37";
function = "qup10";
};

- qup_i2c11_data_clk: qup-i2c11-data-clk {
+ qup_i2c11_data_clk: qup-i2c11-data-clk-state {
pins = "gpio40", "gpio41";
function = "qup11";
};

- qup_i2c12_data_clk: qup-i2c12-data-clk {
+ qup_i2c12_data_clk: qup-i2c12-data-clk-state {
pins = "gpio44", "gpio45";
function = "qup12";
};

- qup_i2c13_data_clk: qup-i2c13-data-clk {
+ qup_i2c13_data_clk: qup-i2c13-data-clk-state {
pins = "gpio48", "gpio49";
function = "qup13";
drive-strength = <2>;
bias-pull-up;
};

- qup_i2c14_data_clk: qup-i2c14-data-clk {
+ qup_i2c14_data_clk: qup-i2c14-data-clk-state {
pins = "gpio52", "gpio53";
function = "qup14";
drive-strength = <2>;
bias-pull-up;
};

- qup_i2c15_data_clk: qup-i2c15-data-clk {
+ qup_i2c15_data_clk: qup-i2c15-data-clk-state {
pins = "gpio56", "gpio57";
function = "qup15";
};

- qup_i2c16_data_clk: qup-i2c16-data-clk {
+ qup_i2c16_data_clk: qup-i2c16-data-clk-state {
pins = "gpio60", "gpio61";
function = "qup16";
};

- qup_i2c17_data_clk: qup-i2c17-data-clk {
+ qup_i2c17_data_clk: qup-i2c17-data-clk-state {
pins = "gpio64", "gpio65";
function = "qup17";
};

- qup_i2c18_data_clk: qup-i2c18-data-clk {
+ qup_i2c18_data_clk: qup-i2c18-data-clk-state {
pins = "gpio68", "gpio69";
function = "qup18";
};

- qup_i2c19_data_clk: qup-i2c19-data-clk {
+ qup_i2c19_data_clk: qup-i2c19-data-clk-state {
pins = "gpio72", "gpio73";
function = "qup19";
};

- qup_i2c20_data_clk: qup-i2c20-data-clk {
+ qup_i2c20_data_clk: qup-i2c20-data-clk-state {
pins = "gpio76", "gpio77";
function = "qup20";
};

- qup_i2c21_data_clk: qup-i2c21-data-clk {
+ qup_i2c21_data_clk: qup-i2c21-data-clk-state {
pins = "gpio80", "gpio81";
function = "qup21";
};

- qup_spi0_cs: qup-spi0-cs {
+ qup_spi0_cs: qup-spi0-cs-state {
pins = "gpio3";
function = "qup0";
};

- qup_spi0_data_clk: qup-spi0-data-clk {
+ qup_spi0_data_clk: qup-spi0-data-clk-state {
pins = "gpio0", "gpio1", "gpio2";
function = "qup0";
};

- qup_spi1_cs: qup-spi1-cs {
+ qup_spi1_cs: qup-spi1-cs-state {
pins = "gpio7";
function = "qup1";
};

- qup_spi1_data_clk: qup-spi1-data-clk {
+ qup_spi1_data_clk: qup-spi1-data-clk-state {
pins = "gpio4", "gpio5", "gpio6";
function = "qup1";
};

- qup_spi2_cs: qup-spi2-cs {
+ qup_spi2_cs: qup-spi2-cs-state {
pins = "gpio11";
function = "qup2";
};

- qup_spi2_data_clk: qup-spi2-data-clk {
+ qup_spi2_data_clk: qup-spi2-data-clk-state {
pins = "gpio8", "gpio9", "gpio10";
function = "qup2";
};

- qup_spi3_cs: qup-spi3-cs {
+ qup_spi3_cs: qup-spi3-cs-state {
pins = "gpio15";
function = "qup3";
};

- qup_spi3_data_clk: qup-spi3-data-clk {
+ qup_spi3_data_clk: qup-spi3-data-clk-state {
pins = "gpio12", "gpio13", "gpio14";
function = "qup3";
};

- qup_spi4_cs: qup-spi4-cs {
+ qup_spi4_cs: qup-spi4-cs-state {
pins = "gpio19";
function = "qup4";
drive-strength = <6>;
bias-disable;
};

- qup_spi4_data_clk: qup-spi4-data-clk {
+ qup_spi4_data_clk: qup-spi4-data-clk-state {
pins = "gpio16", "gpio17", "gpio18";
function = "qup4";
};

- qup_spi5_cs: qup-spi5-cs {
+ qup_spi5_cs: qup-spi5-cs-state {
pins = "gpio85";
function = "qup5";
};

- qup_spi5_data_clk: qup-spi5-data-clk {
+ qup_spi5_data_clk: qup-spi5-data-clk-state {
pins = "gpio206", "gpio207", "gpio84";
function = "qup5";
};

- qup_spi6_cs: qup-spi6-cs {
+ qup_spi6_cs: qup-spi6-cs-state {
pins = "gpio23";
function = "qup6";
};

- qup_spi6_data_clk: qup-spi6-data-clk {
+ qup_spi6_data_clk: qup-spi6-data-clk-state {
pins = "gpio20", "gpio21", "gpio22";
function = "qup6";
};

- qup_spi8_cs: qup-spi8-cs {
+ qup_spi8_cs: qup-spi8-cs-state {
pins = "gpio31";
function = "qup8";
};

- qup_spi8_data_clk: qup-spi8-data-clk {
+ qup_spi8_data_clk: qup-spi8-data-clk-state {
pins = "gpio28", "gpio29", "gpio30";
function = "qup8";
};

- qup_spi9_cs: qup-spi9-cs {
+ qup_spi9_cs: qup-spi9-cs-state {
pins = "gpio35";
function = "qup9";
};

- qup_spi9_data_clk: qup-spi9-data-clk {
+ qup_spi9_data_clk: qup-spi9-data-clk-state {
pins = "gpio32", "gpio33", "gpio34";
function = "qup9";
};

- qup_spi10_cs: qup-spi10-cs {
+ qup_spi10_cs: qup-spi10-cs-state {
pins = "gpio39";
function = "qup10";
};

- qup_spi10_data_clk: qup-spi10-data-clk {
+ qup_spi10_data_clk: qup-spi10-data-clk-state {
pins = "gpio36", "gpio37", "gpio38";
function = "qup10";
};

- qup_spi11_cs: qup-spi11-cs {
+ qup_spi11_cs: qup-spi11-cs-state {
pins = "gpio43";
function = "qup11";
};

- qup_spi11_data_clk: qup-spi11-data-clk {
+ qup_spi11_data_clk: qup-spi11-data-clk-state {
pins = "gpio40", "gpio41", "gpio42";
function = "qup11";
};

- qup_spi12_cs: qup-spi12-cs {
+ qup_spi12_cs: qup-spi12-cs-state {
pins = "gpio47";
function = "qup12";
};

- qup_spi12_data_clk: qup-spi12-data-clk {
+ qup_spi12_data_clk: qup-spi12-data-clk-state {
pins = "gpio44", "gpio45", "gpio46";
function = "qup12";
};

- qup_spi13_cs: qup-spi13-cs {
+ qup_spi13_cs: qup-spi13-cs-state {
pins = "gpio51";
function = "qup13";
};

- qup_spi13_data_clk: qup-spi13-data-clk {
+ qup_spi13_data_clk: qup-spi13-data-clk-state {
pins = "gpio48", "gpio49", "gpio50";
function = "qup13";
};

- qup_spi14_cs: qup-spi14-cs {
+ qup_spi14_cs: qup-spi14-cs-state {
pins = "gpio55";
function = "qup14";
};

- qup_spi14_data_clk: qup-spi14-data-clk {
+ qup_spi14_data_clk: qup-spi14-data-clk-state {
pins = "gpio52", "gpio53", "gpio54";
function = "qup14";
};

- qup_spi15_cs: qup-spi15-cs {
+ qup_spi15_cs: qup-spi15-cs-state {
pins = "gpio59";
function = "qup15";
};

- qup_spi15_data_clk: qup-spi15-data-clk {
+ qup_spi15_data_clk: qup-spi15-data-clk-state {
pins = "gpio56", "gpio57", "gpio58";
function = "qup15";
};

- qup_spi16_cs: qup-spi16-cs {
+ qup_spi16_cs: qup-spi16-cs-state {
pins = "gpio63";
function = "qup16";
};

- qup_spi16_data_clk: qup-spi16-data-clk {
+ qup_spi16_data_clk: qup-spi16-data-clk-state {
pins = "gpio60", "gpio61", "gpio62";
function = "qup16";
};

- qup_spi17_cs: qup-spi17-cs {
+ qup_spi17_cs: qup-spi17-cs-state {
pins = "gpio67";
function = "qup17";
};

- qup_spi17_data_clk: qup-spi17-data-clk {
+ qup_spi17_data_clk: qup-spi17-data-clk-state {
pins = "gpio64", "gpio65", "gpio66";
function = "qup17";
};

- qup_spi18_cs: qup-spi18-cs {
+ qup_spi18_cs: qup-spi18-cs-state {
pins = "gpio71";
function = "qup18";
drive-strength = <6>;
bias-disable;
};

- qup_spi18_data_clk: qup-spi18-data-clk {
+ qup_spi18_data_clk: qup-spi18-data-clk-state {
pins = "gpio68", "gpio69", "gpio70";
function = "qup18";
drive-strength = <6>;
bias-disable;
};

- qup_spi19_cs: qup-spi19-cs {
+ qup_spi19_cs: qup-spi19-cs-state {
pins = "gpio75";
function = "qup19";
drive-strength = <6>;
bias-disable;
};

- qup_spi19_data_clk: qup-spi19-data-clk {
+ qup_spi19_data_clk: qup-spi19-data-clk-state {
pins = "gpio72", "gpio73", "gpio74";
function = "qup19";
drive-strength = <6>;
bias-disable;
};

- qup_spi20_cs: qup-spi20-cs {
+ qup_spi20_cs: qup-spi20-cs-state {
pins = "gpio79";
function = "qup20";
};

- qup_spi20_data_clk: qup-spi20-data-clk {
+ qup_spi20_data_clk: qup-spi20-data-clk-state {
pins = "gpio76", "gpio77", "gpio78";
function = "qup20";
};

- qup_spi21_cs: qup-spi21-cs {
+ qup_spi21_cs: qup-spi21-cs-state {
pins = "gpio83";
function = "qup21";
};

- qup_spi21_data_clk: qup-spi21-data-clk {
+ qup_spi21_data_clk: qup-spi21-data-clk-state {
pins = "gpio80", "gpio81", "gpio82";
function = "qup21";
};

- qup_uart7_rx: qup-uart7-rx {
+ qup_uart7_rx: qup-uart7-rx-state {
pins = "gpio26";
function = "qup7";
drive-strength = <2>;
bias-disable;
};

- qup_uart7_tx: qup-uart7-tx {
+ qup_uart7_tx: qup-uart7-tx-state {
pins = "gpio27";
function = "qup7";
drive-strength = <2>;
bias-disable;
};

- qup_uart20_default: qup-uart20-default {
+ qup_uart20_default: qup-uart20-default-state {
pins = "gpio76", "gpio77", "gpio78", "gpio79";
function = "qup20";
};
--
2.34.1

2022-09-12 07:04:50

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 33/40] dt-bindings: pinctrl: qcom,sc8280xp-pinctrl: fix indentation in example

Bindings example should be indented with 4-spaces.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../pinctrl/qcom,sc8280xp-pinctrl.yaml | 58 +++++++++----------
1 file changed, 29 insertions(+), 29 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml
index 8610f2701388..b9ab130cd558 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml
@@ -127,34 +127,34 @@ patternProperties:

examples:
- |
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- pinctrl@f100000 {
- compatible = "qcom,sc8280xp-tlmm";
- reg = <0x0f100000 0x300000>;
- interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- gpio-ranges = <&tlmm 0 0 230>;
-
- gpio-wo-subnode-state {
- pins = "gpio1";
- function = "gpio";
- };
-
- uart-w-subnodes-state {
- rx-pins {
- pins = "gpio4";
- function = "qup14";
- bias-pull-up;
- };
-
- tx-pins {
- pins = "gpio5";
- function = "qup14";
- bias-disable;
- };
- };
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ pinctrl@f100000 {
+ compatible = "qcom,sc8280xp-tlmm";
+ reg = <0x0f100000 0x300000>;
+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-ranges = <&tlmm 0 0 230>;
+
+ gpio-wo-subnode-state {
+ pins = "gpio1";
+ function = "gpio";
};
+
+ uart-w-subnodes-state {
+ rx-pins {
+ pins = "gpio4";
+ function = "qup14";
+ bias-pull-up;
+ };
+
+ tx-pins {
+ pins = "gpio5";
+ function = "qup14";
+ bias-disable;
+ };
+ };
+ };
...
--
2.34.1

2022-09-12 07:05:40

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 23/40] dt-bindings: pinctrl: qcom,sc7280-pinctrl: correct number of GPIOs

There are 182 GPIOs on SC7280.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
index 2bd60c49a442..76de3b1eb8c7 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
@@ -60,7 +60,7 @@ patternProperties:
subnode.
items:
oneOf:
- - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-4])$"
+ - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9]|18[0-2])$"
- enum: [ sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk,
sdc2_cmd, sdc2_data, ufs_reset ]
minItems: 1
--
2.34.1

2022-09-12 07:06:52

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 20/40] dt-bindings: pinctrl: qcom,sm8450-pinctrl: fix indentation in example

Bindings example should be indented with 4-spaces.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../bindings/pinctrl/qcom,sm8450-pinctrl.yaml | 58 +++++++++----------
1 file changed, 29 insertions(+), 29 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml
index d1d1c1455b3c..87347e9c5f1c 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml
@@ -111,34 +111,34 @@ $defs:

examples:
- |
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- pinctrl@f100000 {
- compatible = "qcom,sm8450-tlmm";
- reg = <0x0f100000 0x300000>;
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&tlmm 0 0 211>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
-
- gpio-wo-subnode-state {
- pins = "gpio1";
- function = "gpio";
- };
-
- uart-w-subnodes-state {
- rx-pins {
- pins = "gpio26";
- function = "qup7";
- bias-pull-up;
- };
-
- tx-pins {
- pins = "gpio27";
- function = "qup7";
- bias-disable;
- };
- };
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ pinctrl@f100000 {
+ compatible = "qcom,sm8450-tlmm";
+ reg = <0x0f100000 0x300000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&tlmm 0 0 211>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+
+ gpio-wo-state {
+ pins = "gpio1";
+ function = "gpio";
};
+
+ uart-w-state {
+ rx-pins {
+ pins = "gpio26";
+ function = "qup7";
+ bias-pull-up;
+ };
+
+ tx-pins {
+ pins = "gpio27";
+ function = "qup7";
+ bias-disable;
+ };
+ };
+ };
...
--
2.34.1

2022-09-12 07:07:24

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 18/40] dt-bindings: pinctrl: qcom,sm8350-pinctrl: do not require function on non-GPIOs

Certain pins, like SDcard related, do not have functions and such should
not be required:

sdc1-clk-pins: 'function' is a required property

Signed-off-by: Krzysztof Kozlowski <[email protected]>

---

Another question is whether 'function' should be disallowed for such
pins?
---
.../bindings/pinctrl/qcom,sm8350-pinctrl.yaml | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-pinctrl.yaml
index f3106d25adcf..6ae5571f60da 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-pinctrl.yaml
@@ -54,7 +54,6 @@ $defs:
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
- $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"

properties:
pins:
@@ -108,7 +107,16 @@ $defs:

required:
- pins
- - function
+
+ allOf:
+ - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
+ - if:
+ properties:
+ pins:
+ pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-3])$"
+ then:
+ required:
+ - function

additionalProperties: false

--
2.34.1

2022-09-12 07:07:46

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 04/40] dt-bindings: pinctrl: qcom,sm6125-pinctrl: fix matching pin config

Matching PMIC GPIOs config nodes within a '-state' node by '.*' pattern
does not work as expected because of linux,phandle in the DTB:

'pins' is a required property
'function' is a required property
'rx', 'tx' do not match any of the regexes: 'pinctrl-[0-9]+'
[[59]] is not of type 'object'

Make the schema stricter and expect such nodes to be followed with a
'-pins' suffix.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../devicetree/bindings/pinctrl/qcom,sm6125-pinctrl.yaml | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-pinctrl.yaml
index c8eec845ade9..84ed16f9915d 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-pinctrl.yaml
@@ -51,8 +51,9 @@ patternProperties:
oneOf:
- $ref: "#/$defs/qcom-sm6125-tlmm-state"
- patternProperties:
- ".*":
+ "-pins$":
$ref: "#/$defs/qcom-sm6125-tlmm-state"
+ additionalProperties: false

$defs:
qcom-sm6125-tlmm-state:
--
2.34.1

2022-09-12 07:17:01

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v2 40/40] arm64: dts: qcom: sc7280-herobrine: correct TLMM gpio-line-names

There are 174 GPIOs in SC7280.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts | 2 --
1 file changed, 2 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
index bc795c480352..3448e9ed8b03 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
@@ -371,7 +371,5 @@ &tlmm {
"", /* 170 */
"MOS_BLE_UART_TX",
"MOS_BLE_UART_RX",
- "",
- "",
"";
};
--
2.34.1

2022-09-13 19:59:04

by Bjorn Andersson

[permalink] [raw]
Subject: Re: [PATCH v2 00/40] pinctrl/arm64: qcom: fix some of Qualcomm pinctrl schema warnings

On Mon, Sep 12, 2022 at 08:17:06AM +0200, Krzysztof Kozlowski wrote:
> Hi,
>
> That's a set for some of arm64 pinctrl bindings fixing most common warnings. I
> have a plan to continue this for remaining arm64 (sm8250 needs updates) and for
> arm.

Very nice.

Reviewed-by: Bjorn Andersson <[email protected]>

@Linus, please pick the dt binding patches through your tree. I will
pick the dts changes at the end.

Regards,
Bjorn

>
> Changes since v1
> ================
> 1. Correct commit msg in commits "fix matching pin config".
> 2. Correct commit msg in commit #2 .
> 3. Add Rb tags.
>
> Dependencies
> ============
> 1. dt-bindings are independent of DTS patches.
>
> Best regards,
> Krzysztof
>
> Krzysztof Kozlowski (40):
> dt-bindings: pinctrl: qcom,sm6115-pinctrl: fix matching pin config
> dt-bindings: pinctrl: qcom,sm6115-pinctrl: require function on GPIOs
> dt-bindings: pinctrl: qcom,sm6115-pinctrl: fix indentation in example
> dt-bindings: pinctrl: qcom,sm6125-pinctrl: fix matching pin config
> dt-bindings: pinctrl: qcom,sm6125-pinctrl: do not require function on
> non-GPIOs
> dt-bindings: pinctrl: qcom,sm6125-pinctrl: extend example
> dt-bindings: pinctrl: qcom,sm6350-pinctrl: fix matching pin config
> dt-bindings: pinctrl: qcom,sm6350-pinctrl: do not require function on
> non-GPIOs
> dt-bindings: pinctrl: qcom,sm6350-pinctrl: fix indentation in example
> dt-bindings: pinctrl: qcom,sm6375-pinctrl: fix matching pin config
> dt-bindings: pinctrl: qcom,sm6375-pinctrl: do not require function on
> non-GPIOs
> dt-bindings: pinctrl: qcom,sm6375-pinctrl: fix indentation in example
> dt-bindings: pinctrl: qcom,sm8250-pinctrl: do not require function on
> non-GPIOs
> dt-bindings: pinctrl: qcom,sm8250-pinctrl: reference tlmm common pins
> dt-bindings: pinctrl: qcom,sm8250-pinctrl: fix indentation in example
> dt-bindings: pinctrl: qcom,sm8350-pinctrl: fix matching pin config
> dt-bindings: pinctrl: qcom,sm8350-pinctrl: fix indentation in example
> dt-bindings: pinctrl: qcom,sm8350-pinctrl: do not require function on
> non-GPIOs
> dt-bindings: pinctrl: qcom,sm8450-pinctrl: fix matching pin config
> dt-bindings: pinctrl: qcom,sm8450-pinctrl: fix indentation in example
> dt-bindings: pinctrl: qcom,sm8450-pinctrl: do not require function on
> non-GPIOs
> dt-bindings: pinctrl: qcom,sm8450-pinctrl: add gpio-line-names
> dt-bindings: pinctrl: qcom,sc7280-pinctrl: correct number of GPIOs
> dt-bindings: pinctrl: qcom,sc7280-pinctrl: do not require function on
> non-GPIOs
> dt-bindings: pinctrl: qcom,sc7280-pinctrl: add gpio-line-names
> dt-bindings: pinctrl: qcom,sc7280-pinctrl: reference tlmm schema
> dt-bindings: pinctrl: qcom,sc7280-pinctrl: fix indentation in example
> dt-bindings: pinctrl: qcom,sc8180x-pinctrl: fix matching pin config
> dt-bindings: pinctrl: qcom,sc8180x-pinctrl: do not require function on
> non-GPIOs
> dt-bindings: pinctrl: qcom,sc8180x-pinctrl: fix indentation in example
> dt-bindings: pinctrl: qcom,sc8280xp-pinctrl: fix matching pin config
> dt-bindings: pinctrl: qcom,sc8280xp-pinctrl: do not require function
> on non-GPIOs
> dt-bindings: pinctrl: qcom,sc8280xp-pinctrl: fix indentation in
> example
> arm64: dts: qcom: sm6125: align TLMM pin configuration with DT schema
> arm64: dts: qcom: sm6350: align TLMM pin configuration with DT schema
> arm64: dts: qcom: sm8350-sagami: correct TS pin property
> arm64: dts: qcom: sm8350: align TLMM pin configuration with DT schema
> arm64: dts: qcom: sm8450: align TLMM pin configuration with DT schema
> arm64: dts: qcom: sc7280: align TLMM pin configuration with DT schema
> arm64: dts: qcom: sc7280-herobrine: correct TLMM gpio-line-names
>
> .../bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 55 +--
> .../pinctrl/qcom,sc8180x-pinctrl.yaml | 79 +++--
> .../pinctrl/qcom,sc8280xp-pinctrl.yaml | 73 ++--
> .../bindings/pinctrl/qcom,sm6115-pinctrl.yaml | 94 +++---
> .../bindings/pinctrl/qcom,sm6125-pinctrl.yaml | 61 +++-
> .../bindings/pinctrl/qcom,sm6350-pinctrl.yaml | 73 ++--
> .../bindings/pinctrl/qcom,sm6375-tlmm.yaml | 73 ++--
> .../bindings/pinctrl/qcom,sm8250-pinctrl.yaml | 41 ++-
> .../bindings/pinctrl/qcom,sm8350-pinctrl.yaml | 73 ++--
> .../bindings/pinctrl/qcom,sm8450-pinctrl.yaml | 82 +++--
> .../boot/dts/qcom/sc7280-herobrine-crd.dts | 2 -
> .../arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 44 +--
> .../arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi | 8 +-
> arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 20 +-
> arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi | 14 +-
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 316 +++++++++---------
> .../qcom/sm6125-sony-xperia-seine-pdx201.dts | 4 +-
> arch/arm64/boot/dts/qcom/sm6125.dtsi | 10 +-
> arch/arm64/boot/dts/qcom/sm6350.dtsi | 14 +-
> .../dts/qcom/sm8350-sony-xperia-sagami.dtsi | 4 +-
> arch/arm64/boot/dts/qcom/sm8350.dtsi | 44 +--
> .../qcom/sm8450-sony-xperia-nagara-pdx223.dts | 12 +-
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 152 ++++-----
> 23 files changed, 733 insertions(+), 615 deletions(-)
>
> --
> 2.34.1
>

2022-09-13 22:51:17

by Bjorn Andersson

[permalink] [raw]
Subject: Re: (subset) [PATCH v2 00/40] pinctrl/arm64: qcom: fix some of Qualcomm pinctrl schema warnings

On Mon, 12 Sep 2022 08:17:06 +0200, Krzysztof Kozlowski wrote:
> That's a set for some of arm64 pinctrl bindings fixing most common warnings. I
> have a plan to continue this for remaining arm64 (sm8250 needs updates) and for
> arm.
>
> Changes since v1
> ================
> 1. Correct commit msg in commits "fix matching pin config".
> 2. Correct commit msg in commit #2 .
> 3. Add Rb tags.
>
> [...]

Applied, thanks!

[34/40] arm64: dts: qcom: sm6125: align TLMM pin configuration with DT schema
commit: be24fd19b1b42e0b38e77e0d6a379282bafb6aa6
[35/40] arm64: dts: qcom: sm6350: align TLMM pin configuration with DT schema
commit: 448f5a002fedb2ff2d19e5a563d3af1ea5e123e1
[36/40] arm64: dts: qcom: sm8350-sagami: correct TS pin property
commit: c9c53d1f4329564f98ed0decfe3c377c6639ec5d
[37/40] arm64: dts: qcom: sm8350: align TLMM pin configuration with DT schema
commit: e227fa2970fd259fa65f97c4defb0b85dffc62d7
[38/40] arm64: dts: qcom: sm8450: align TLMM pin configuration with DT schema
commit: a73747528867fabea8e285a1b604594181091507
[39/40] arm64: dts: qcom: sc7280: align TLMM pin configuration with DT schema
commit: d801357a0573105ff5db9fbfde80c3572369a261
[40/40] arm64: dts: qcom: sc7280-herobrine: correct TLMM gpio-line-names
commit: e0eeb08522c94860c3528816f612c335a6d6552c

Best regards,
--
Bjorn Andersson <[email protected]>

2022-09-14 10:50:41

by Linus Walleij

[permalink] [raw]
Subject: Re: [PATCH v2 00/40] pinctrl/arm64: qcom: fix some of Qualcomm pinctrl schema warnings

On Mon, Sep 12, 2022 at 8:17 AM Krzysztof Kozlowski
<[email protected]> wrote:

> That's a set for some of arm64 pinctrl bindings fixing most common warnings. I
> have a plan to continue this for remaining arm64 (sm8250 needs updates) and for
> arm.

I applied patches 1-33 to the pinctrl tree after I saw Bjorn was happy
and has applied the DTS changes.

Yours,
Linus Walleij

2022-10-09 18:06:10

by Marijn Suijten

[permalink] [raw]
Subject: Re: [PATCH v2 34/40] arm64: dts: qcom: sm6125: align TLMM pin configuration with DT schema

On 2022-09-12 08:17:40, Krzysztof Kozlowski wrote:
> DT schema expects TLMM pin configuration nodes to be named with '-state'
> suffix and their optional children with '-pins' suffix.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> .../boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts | 4 ++--
> arch/arm64/boot/dts/qcom/sm6125.dtsi | 10 +++++-----
> 2 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts
> index 0aad2e94e757..6a8b88cc4385 100644
> --- a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts
> +++ b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts
> @@ -87,7 +87,7 @@ &hsusb_phy1 {
> };
>
> &sdc2_off_state {
> - sd-cd {
> + sd-cd-pins {
> pins = "gpio98";
> drive-strength = <2>;
> bias-disable;
> @@ -95,7 +95,7 @@ sd-cd {
> };
>
> &sdc2_on_state {
> - sd-cd {
> + sd-cd-pins {
> pins = "gpio98";
> drive-strength = <2>;
> bias-pull-up;
> diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi
> index 8c582a9e4ada..1fe3fa3ad877 100644
> --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi
> @@ -387,19 +387,19 @@ tlmm: pinctrl@500000 {
> #interrupt-cells = <2>;
>
> sdc2_off_state: sdc2-off-state {
> - clk {
> + clk-pins {
> pins = "sdc2_clk";
> drive-strength = <2>;
> bias-disable;
> };
>
> - cmd {
> + cmd-pins {
> pins = "sdc2_cmd";
> drive-strength = <2>;
> bias-pull-up;
> };
>
> - data {
> + data-pins {
> pins = "sdc2_data";
> drive-strength = <2>;
> bias-pull-up;
> @@ -413,13 +413,13 @@ clk {
> bias-disable;
> };
>
> - cmd {
> + cmd-pins-pins {

Is this double -pins-pins suffix intended?

- Marijn

> pins = "sdc2_cmd";
> drive-strength = <10>;
> bias-pull-up;
> };
>
> - data {
> + data-pins {
> pins = "sdc2_data";
> drive-strength = <10>;
> bias-pull-up;
> --
> 2.34.1
>

2022-10-10 10:42:18

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH v2 34/40] arm64: dts: qcom: sm6125: align TLMM pin configuration with DT schema

On 09/10/2022 13:46, Marijn Suijten wrote:
>> diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi
>> index 8c582a9e4ada..1fe3fa3ad877 100644
>> --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi
>> @@ -387,19 +387,19 @@ tlmm: pinctrl@500000 {
>> #interrupt-cells = <2>;
>>
>> sdc2_off_state: sdc2-off-state {
>> - clk {
>> + clk-pins {
>> pins = "sdc2_clk";
>> drive-strength = <2>;
>> bias-disable;
>> };
>>
>> - cmd {
>> + cmd-pins {
>> pins = "sdc2_cmd";
>> drive-strength = <2>;
>> bias-pull-up;
>> };
>>
>> - data {
>> + data-pins {
>> pins = "sdc2_data";
>> drive-strength = <2>;
>> bias-pull-up;
>> @@ -413,13 +413,13 @@ clk {
>> bias-disable;
>> };
>>
>> - cmd {
>> + cmd-pins-pins {
>
> Is this double -pins-pins suffix intended?
>

No, thanks for noticing it.

Best regards,
Krzysztof

2022-10-10 11:47:47

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH v2 34/40] arm64: dts: qcom: sm6125: align TLMM pin configuration with DT schema

On 10/10/2022 06:26, Krzysztof Kozlowski wrote:
> On 09/10/2022 13:46, Marijn Suijten wrote:
>>> diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi
>>> index 8c582a9e4ada..1fe3fa3ad877 100644
>>> --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi
>>> @@ -387,19 +387,19 @@ tlmm: pinctrl@500000 {
>>> #interrupt-cells = <2>;
>>>
>>> sdc2_off_state: sdc2-off-state {
>>> - clk {
>>> + clk-pins {
>>> pins = "sdc2_clk";
>>> drive-strength = <2>;
>>> bias-disable;
>>> };
>>>
>>> - cmd {
>>> + cmd-pins {
>>> pins = "sdc2_cmd";
>>> drive-strength = <2>;
>>> bias-pull-up;
>>> };
>>>
>>> - data {
>>> + data-pins {
>>> pins = "sdc2_data";
>>> drive-strength = <2>;
>>> bias-pull-up;
>>> @@ -413,13 +413,13 @@ clk {
>>> bias-disable;
>>> };
>>>
>>> - cmd {
>>> + cmd-pins-pins {
>>
>> Is this double -pins-pins suffix intended?
>>
>
> No, thanks for noticing it.

Wait, you commented on patch which was already merged. Fix is here already:
https://lore.kernel.org/linux-devicetree/[email protected]/

Best regards,
Krzysztof

2022-10-10 13:54:07

by Marijn Suijten

[permalink] [raw]
Subject: Re: [PATCH v2 34/40] arm64: dts: qcom: sm6125: align TLMM pin configuration with DT schema

On 2022-10-10 07:31:31, Krzysztof Kozlowski wrote:
> On 10/10/2022 06:26, Krzysztof Kozlowski wrote:
> > On 09/10/2022 13:46, Marijn Suijten wrote:
> >>> [..]
> >>> - cmd {
> >>> + cmd-pins-pins {
> >>
> >> Is this double -pins-pins suffix intended?
> >>
> >
> > No, thanks for noticing it.
>
> Wait, you commented on patch which was already merged. Fix is here already:
> https://lore.kernel.org/linux-devicetree/[email protected]/

Correct, I came across this while working on another SoC on -next and
wasn't sure if this patch was pulled in through some staging branch, or
if you or I should send up a followup patch. Seems you've already done
so, thanks!

- Marijn