From: Kuppuswamy Sathyanarayanan <[email protected]>
According to Whiskey cove PMIC spec, bit 7 of GPIOIRQ0_REG belongs to
battery IO. So we should skip this bit when checking for GPIO irq pending
status. Otherwise, wcove_gpio_irq_handler() might go into the infinite
loop until irq "pending" status becomes 0. This patch fixes this issue.
Signed-off-by: Kuppuswamy Sathyanarayanan <[email protected]>
---
drivers/gpio/gpio-wcove.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpio/gpio-wcove.c b/drivers/gpio/gpio-wcove.c
index 97613de..68ef061 100644
--- a/drivers/gpio/gpio-wcove.c
+++ b/drivers/gpio/gpio-wcove.c
@@ -51,6 +51,8 @@
#define GROUP1_NR_IRQS 6
#define IRQ_MASK_BASE 0x4e19
#define IRQ_STATUS_BASE 0x4e0b
+#define GPIO_IRQ0_MASK 0x7f
+#define GPIO_IRQ1_MASK 0x3f
#define UPDATE_IRQ_TYPE BIT(0)
#define UPDATE_IRQ_MASK BIT(1)
@@ -309,7 +311,7 @@ static irqreturn_t wcove_gpio_irq_handler(int irq, void *data)
return IRQ_NONE;
}
- pending = p[0] | (p[1] << 8);
+ pending = (p[0] & GPIO_IRQ0_MASK) | ((p[1] & GPIO_IRQ1_MASK) << 7);
if (!pending)
return IRQ_NONE;
@@ -333,7 +335,8 @@ static irqreturn_t wcove_gpio_irq_handler(int irq, void *data)
break;
}
- pending = p[0] | (p[1] << 8);
+ pending = (p[0] & GPIO_IRQ0_MASK) |
+ ((p[1] & GPIO_IRQ1_MASK) << 7);
}
return IRQ_HANDLED;
--
2.7.4
From: Kuppuswamy Sathyanarayanan <[email protected]>
Whiskey cove PMIC has three GPIO banks with total number of 13 GPIO
pins. But when checking for the pending status, for_each_set_bit() uses
bit width of 7 and hence it only checks the status for first 7 GPIO pins
missing to check/clear the status of rest of the GPIO pins. This patch
fixes this issue.
Signed-off-by: Kuppuswamy Sathyanarayanan <[email protected]>
---
drivers/gpio/gpio-wcove.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpio/gpio-wcove.c b/drivers/gpio/gpio-wcove.c
index 68ef061..48c1504 100644
--- a/drivers/gpio/gpio-wcove.c
+++ b/drivers/gpio/gpio-wcove.c
@@ -319,7 +319,7 @@ static irqreturn_t wcove_gpio_irq_handler(int irq, void *data)
while (pending) {
/* One iteration is for all pending bits */
for_each_set_bit(gpio, (const unsigned long *)&pending,
- GROUP0_NR_IRQS) {
+ WCOVE_GPIO_NUM) {
offset = (gpio > GROUP0_NR_IRQS) ? 1 : 0;
mask = (offset == 1) ? BIT(gpio - GROUP0_NR_IRQS) :
BIT(gpio);
--
2.7.4
On Fri, Apr 14, 2017 at 8:29 PM,
<[email protected]> wrote:
> From: Kuppuswamy Sathyanarayanan <[email protected]>
>
> According to Whiskey cove PMIC spec, bit 7 of GPIOIRQ0_REG belongs to
cove -> Cove
> battery IO. So we should skip this bit when checking for GPIO irq pending
irq -> IRQ
> status. Otherwise, wcove_gpio_irq_handler() might go into the infinite
> loop until irq "pending" status becomes 0. This patch fixes this issue.
Ditto.
> +#define GPIO_IRQ0_MASK 0x7f
> +#define GPIO_IRQ1_MASK 0x3f
GENMASK()
> - pending = p[0] | (p[1] << 8);
> + pending = (p[0] & GPIO_IRQ0_MASK) |
> + ((p[1] & GPIO_IRQ1_MASK) << 7);
I would leave this on one line despite 80 characters limit (actually
how long is it?).
--
With Best Regards,
Andy Shevchenko
Hi Andy,
Thanks for the review.
On 04/19/2017 01:41 PM, Andy Shevchenko wrote:
> On Fri, Apr 14, 2017 at 8:29 PM,
> <[email protected]> wrote:
>> From: Kuppuswamy Sathyanarayanan <[email protected]>
>>
>> According to Whiskey cove PMIC spec, bit 7 of GPIOIRQ0_REG belongs to
> cove -> Cove
Will fix it in next version.
>
>> battery IO. So we should skip this bit when checking for GPIO irq pending
> irq -> IRQ
Ditto.
>
>> status. Otherwise, wcove_gpio_irq_handler() might go into the infinite
>> loop until irq "pending" status becomes 0. This patch fixes this issue.
> Ditto.
>
>> +#define GPIO_IRQ0_MASK 0x7f
>> +#define GPIO_IRQ1_MASK 0x3f
> GENMASK()
Ditto.
>
>> - pending = p[0] | (p[1] << 8);
>> + pending = (p[0] & GPIO_IRQ0_MASK) |
>> + ((p[1] & GPIO_IRQ1_MASK) << 7);
> I would leave this on one line despite 80 characters limit (actually
> how long is it?).
It comes to 84 characters. Should I leave it as it is ?
>
--
Sathyanarayanan Kuppuswamy
Android kernel developer
On Fri, Apr 14, 2017 at 7:29 PM,
<[email protected]> wrote:
> From: Kuppuswamy Sathyanarayanan <[email protected]>
>
> Whiskey cove PMIC has three GPIO banks with total number of 13 GPIO
> pins. But when checking for the pending status, for_each_set_bit() uses
> bit width of 7 and hence it only checks the status for first 7 GPIO pins
> missing to check/clear the status of rest of the GPIO pins. This patch
> fixes this issue.
>
> Signed-off-by: Kuppuswamy Sathyanarayanan <[email protected]>
Looks reasonable so patch applied.
Just looping in Mika & Andy so they have an idea about what's going
on.
Yours,
Linus Walleij
On Mon, 2017-04-24 at 15:15 +0200, Linus Walleij wrote:
> On Fri, Apr 14, 2017 at 7:29 PM,
> <[email protected]> wrote:
>
> > From: Kuppuswamy Sathyanarayanan <[email protected]
> > ntel.com>
> >
> > Whiskey cove PMIC has three GPIO banks with total number of 13 GPIO
> > pins. But when checking for the pending status, for_each_set_bit()
> > uses
> > bit width of 7 and hence it only checks the status for first 7 GPIO
> > pins
> > missing to check/clear the status of rest of the GPIO pins. This
> > patch
> > fixes this issue.
> >
> > Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswam
> > [email protected]>
>
> Looks reasonable so patch applied.
>
> Just looping in Mika & Andy so they have an idea about what's going
> on.
This is fine by me, thanks!
--
Andy Shevchenko <[email protected]>
Intel Finland Oy
From: Kuppuswamy Sathyanarayanan <[email protected]>
According to Whiskey Cove PMIC spec, bit 7 of GPIOIRQ0_REG belongs to
battery IO. So we should skip this bit when checking for GPIO IRQ pending
status. Otherwise, wcove_gpio_irq_handler() might go into the infinite
loop until IRQ "pending" status becomes 0. This patch fixes this issue.
Signed-off-by: Kuppuswamy Sathyanarayanan <[email protected]>
---
drivers/gpio/gpio-wcove.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
Changes since v1:
* Used GENMASK API.
* Fixed some style issues.
* Updated commit message.
diff --git a/drivers/gpio/gpio-wcove.c b/drivers/gpio/gpio-wcove.c
index 97613de..7872435 100644
--- a/drivers/gpio/gpio-wcove.c
+++ b/drivers/gpio/gpio-wcove.c
@@ -51,6 +51,8 @@
#define GROUP1_NR_IRQS 6
#define IRQ_MASK_BASE 0x4e19
#define IRQ_STATUS_BASE 0x4e0b
+#define GPIO_IRQ0_MASK GENMASK(6, 0)
+#define GPIO_IRQ1_MASK GENMASK(5, 0)
#define UPDATE_IRQ_TYPE BIT(0)
#define UPDATE_IRQ_MASK BIT(1)
@@ -309,7 +311,7 @@ static irqreturn_t wcove_gpio_irq_handler(int irq, void *data)
return IRQ_NONE;
}
- pending = p[0] | (p[1] << 8);
+ pending = (p[0] & GPIO_IRQ0_MASK) | ((p[1] & GPIO_IRQ1_MASK) << 7);
if (!pending)
return IRQ_NONE;
@@ -333,7 +335,7 @@ static irqreturn_t wcove_gpio_irq_handler(int irq, void *data)
break;
}
- pending = p[0] | (p[1] << 8);
+ pending = (p[0] & GPIO_IRQ0_MASK) | ((p[1] & GPIO_IRQ1_MASK) << 7);
}
return IRQ_HANDLED;
--
2.7.4
On Mon, Apr 24, 2017 at 9:15 PM,
<[email protected]> wrote:
> From: Kuppuswamy Sathyanarayanan <[email protected]>
>
> According to Whiskey Cove PMIC spec, bit 7 of GPIOIRQ0_REG belongs to
> battery IO. So we should skip this bit when checking for GPIO IRQ pending
> status. Otherwise, wcove_gpio_irq_handler() might go into the infinite
> loop until IRQ "pending" status becomes 0. This patch fixes this issue.
>
> Signed-off-by: Kuppuswamy Sathyanarayanan <[email protected]>
Looks fine to me, tentatively applied.
Bin, Mika, Andy, OK?
Yours,
Linus Walleij
On Wed, Apr 26, 2017 at 04:26:17PM +0200, Linus Walleij wrote:
> On Mon, Apr 24, 2017 at 9:15 PM,
> <[email protected]> wrote:
>
> > From: Kuppuswamy Sathyanarayanan <[email protected]>
> >
> > According to Whiskey Cove PMIC spec, bit 7 of GPIOIRQ0_REG belongs to
> > battery IO. So we should skip this bit when checking for GPIO IRQ pending
> > status. Otherwise, wcove_gpio_irq_handler() might go into the infinite
> > loop until IRQ "pending" status becomes 0. This patch fixes this issue.
> >
> > Signed-off-by: Kuppuswamy Sathyanarayanan <[email protected]>
>
> Looks fine to me, tentatively applied.
>
> Bin, Mika, Andy, OK?
Looks fine to me as well :)
Acked-by: Mika Westerberg <[email protected]>
On Wed, Apr 26, 2017 at 5:26 PM, Linus Walleij <[email protected]> wrote:
> On Mon, Apr 24, 2017 at 9:15 PM,
> <[email protected]> wrote:
>
>> From: Kuppuswamy Sathyanarayanan <[email protected]>
>>
>> According to Whiskey Cove PMIC spec, bit 7 of GPIOIRQ0_REG belongs to
>> battery IO. So we should skip this bit when checking for GPIO IRQ pending
>> status. Otherwise, wcove_gpio_irq_handler() might go into the infinite
>> loop until IRQ "pending" status becomes 0. This patch fixes this issue.
>>
>> Signed-off-by: Kuppuswamy Sathyanarayanan <[email protected]>
>
> Looks fine to me, tentatively applied.
>
> Bin, Mika, Andy, OK?
Yes, thanks!
--
With Best Regards,
Andy Shevchenko
On Wed, April 26, 2017 at 7:26 AM, Linus Walleij wrote:
>On Mon, Apr 24, 2017 at 9:15 PM,
><[email protected]> wrote:
>
>> From: Kuppuswamy Sathyanarayanan
>> <[email protected]>
>>
>> According to Whiskey Cove PMIC spec, bit 7 of GPIOIRQ0_REG belongs to
>> battery IO. So we should skip this bit when checking for GPIO IRQ
>> pending status. Otherwise, wcove_gpio_irq_handler() might go into the
>> infinite loop until IRQ "pending" status becomes 0. This patch fixes this issue.
>>
>> Signed-off-by: Kuppuswamy Sathyanarayanan
>> <[email protected]>
>
>Looks fine to me, tentatively applied.
>
>Bin, Mika, Andy, OK?
>
>Yours,
>Linus Walleij
Looks reasonable to me.
Thanks,
Bin