These patch series introduces the MediaTek DRAM controller driver (DRAMC)
on MT6779 SoC, and enables to be built as a module by default for the
ARM64 builds.
MediaTek DRAMC driver provides cross-platform features as below:
- API provided to other kernel modules for querying DRAM type,
rank count, rank size, channel count and mode register settings.
- Sysfs interface used to pass DRAM mode register settings and current
DRAM data rate to user-space for MediaTek ecosystem.
The API user includes MediaTek External Memory Interface (EMI) and
DVFS Resource Control (DVFSRC), which will be sent to mainline later.
Changes since v1:
- add prefix to vendor properties in device tree, dt-binding and drivers
- fix dt-binding check fail
Po-Kai Chi (4):
dt-bindings: memory: Add binding for MediaTek DRAM Controller
memory: mediatek: add DRAM controller driver
arm64: dts: add DRAMC node for MT6779
arm64: defconfig: Enable MediaTek DRAMC common driver
.../memory-controllers/mediatek,dramc.yaml | 162 ++++
arch/arm64/boot/dts/mediatek/mt6779-evb.dts | 9 +
arch/arm64/boot/dts/mediatek/mt6779.dtsi | 18 +
arch/arm64/configs/defconfig | 1 +
drivers/memory/Kconfig | 1 +
drivers/memory/Makefile | 1 +
drivers/memory/mediatek/Kconfig | 9 +
drivers/memory/mediatek/Makefile | 3 +
drivers/memory/mediatek/mtk-dramc.c | 711 ++++++++++++++++++
include/memory/mediatek/dramc.h | 18 +
10 files changed, 933 insertions(+)
create mode 100644 Documentation/devicetree/bindings/memory-controllers/mediatek,dramc.yaml
create mode 100644 drivers/memory/mediatek/Kconfig
create mode 100644 drivers/memory/mediatek/Makefile
create mode 100644 drivers/memory/mediatek/mtk-dramc.c
create mode 100644 include/memory/mediatek/dramc.h
This commit enables MediaTek DRAMC common driver to be built
as a module by default for the ARM64 builds.
Signed-off-by: Po-Kai Chi <[email protected]>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index d612f63..49d7464 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -1163,3 +1163,4 @@ CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_PREEMPT is not set
# CONFIG_FTRACE is not set
CONFIG_MEMTEST=y
+CONFIG_MTK_DRAMC=m
--
1.7.9.5
This patch adds the documentation of the device-tree binding for
MediaTek DRAM Controller.
Signed-off-by: Po-Kai Chi <[email protected]>
---
.../memory-controllers/mediatek,dramc.yaml | 162 ++++++++++++++++++++
1 file changed, 162 insertions(+)
create mode 100644 Documentation/devicetree/bindings/memory-controllers/mediatek,dramc.yaml
diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,dramc.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,dramc.yaml
new file mode 100644
index 0000000..18f77c2
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,dramc.yaml
@@ -0,0 +1,162 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (c) 2021 MediaTek Inc.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/memory-controllers/mediatek,dramc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek DRAM Controller
+
+maintainers:
+ - Po-Kai Chi <[email protected]>
+
+description: |
+ MediaTek DRAM controller (DRAMC) provides an interface to query information
+ about DRAM which collected from bootloader and device tree.
+ This is mainly used by MediaTek Extended Memory Interface (EMI) and DVFS Resource
+ Control (DVFSRC).
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - mediatek,mt6779-dramc
+
+ reg:
+ description:
+ Base address of MediaTek DRAM related hardware modules, each channel has
+ its own base address in order of
+ DRAMC_AO_{CH}, DRAMC_NAO_{CH}, DDRPHY_AO_{CH}.
+ minItems: 3 # 3 * N channels
+ maxItems: 6
+
+ mediatek,dram-type:
+ description:
+ The DRAM type of current DRAM chip.
+ This property is filled in by bootloader according to the board hardware
+ configuration.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 7
+
+ mediatek,support-channel-cnt:
+ description:
+ The maximum DRAM channel count supported by SoC.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 1
+ maximum: 4
+
+ mediatek,channel-cnt:
+ description:
+ The DRAM channel count of current DRAM chip.
+ This property is filled in by bootloader according to the board hardware
+ configuration.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 1
+ maximum: 4
+
+ mediatek,rank-cnt:
+ description:
+ The DRAM rank count of current DRAM chip.
+ This property is filled in by bootloader according to the board hardware
+ configuration.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 1
+ maximum: 2
+
+ mediatek,rank-size:
+ description:
+ An array of 64-bits unsigned integer that describes the size of each
+ DRAM rank.
+ This property is filled in by bootloader according to the board hardware
+ configuration.
+ $ref: /schemas/types.yaml#/definitions/uint64-array
+ minItems: 1
+ maxItems: 2
+ items:
+ minimum: 0x0
+ maximum: 0x100000000 # support up to 4GB in single rank
+
+ mediatek,mr-cnt:
+ description:
+ Specifies how many sets of DRAM mode register information to provide.
+ This property is filled in by bootloader according to the board hardware
+ configuration.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ maximum: 40 # total 40 MRs for JEDEC LPDDR4X
+
+ mediatek,mr:
+ description:
+ Pair of DRAM mode register information.
+ This property is filled in by bootloader according to the board hardware
+ configuration.
+ $ref: /schemas/types.yaml#/definitions/uint32-matrix
+ maxItems: 40 # align with mediatek,mr-cnt
+ items:
+ items:
+ - description:
+ Mode register index
+ - description:
+ Mode register value
+
+ mediatek,freq-cnt:
+ description:
+ Specifies how many sets of DRAM data clock rate supported by SoC.
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ mediatek,freq-step:
+ description:
+ The DRAM data clock rate may be slightly different from those defined
+ by the specification due to errors in multiples of the base frequency.
+ This describe the mapping from real data clock rate measured by
+ frequency meter to JEDEC data clock rate.
+ $ref: /schemas/types.yaml#/definitions/uint32-matrix
+ items:
+ items:
+ - description:
+ Real data rate
+ - description:
+ Spec data rate
+
+required:
+ - compatible
+ - reg
+ - mediatek,dram-type
+ - mediatek,support-channel-cnt
+ - mediatek,channel-cnt
+ - mediatek,rank-cnt
+ - mediatek,mr-cnt
+ - mediatek,freq-cnt
+
+additionalProperties: false
+
+examples:
+ - |
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ dramc@10230000 {
+ compatible = "mediatek,mt6779-dramc";
+ reg = <0 0x10230000 0 0x2000>, /* DRAMC AO CHA */
+ <0 0x10240000 0 0x2000>, /* DRAMC AO CHB */
+ <0 0x10234000 0 0x1000>, /* DRAMC NAO CHA */
+ <0 0x10244000 0 0x1000>, /* DRAMC NAO CHB */
+ <0 0x10238000 0 0x2000>, /* DDRPHY AO CHA */
+ <0 0x10248000 0 0x2000>; /* DDRPHY AO CHB */
+ mediatek,dram-type = <0>;
+ mediatek,support-channel-cnt = <2>;
+ mediatek,channel-cnt = <2>;
+ mediatek,rank-cnt = <2>;
+ mediatek,rank-size = <0x40000000 0x40000000>;
+ mediatek,mr-cnt = <1>;
+ mediatek,mr = <0x5 0xff>;
+ mediatek,freq-cnt = <6>;
+ mediatek,freq-step = <3718 3733>,
+ <3094 3200>,
+ <2392 2400>,
+ <1534 1600>,
+ <1196 1200>,
+ <754 800>;
+ };
+ };
--
1.7.9.5
Add the DRAMC node for the DRAMC kernel driver.
Properties are divided into three categories:
- Platform DTS:
MediaTek DRAMC platform common part.
- Project DTS:
Runtime filled in by bootloader according to the board
hardware configuration.
- Driver level:
Hardware-specific register settings, encapsulated as
compatible data for better DTS compatibility.
Signed-off-by: Po-Kai Chi <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt6779-evb.dts | 9 +++++++++
arch/arm64/boot/dts/mediatek/mt6779.dtsi | 18 ++++++++++++++++++
2 files changed, 27 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt6779-evb.dts b/arch/arm64/boot/dts/mediatek/mt6779-evb.dts
index 164f5cb..5d2dde7 100644
--- a/arch/arm64/boot/dts/mediatek/mt6779-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt6779-evb.dts
@@ -29,3 +29,12 @@
&uart0 {
status = "okay";
};
+
+&dramc {
+ mediatek,dram-type = <0>;
+ mediatek,channel-cnt = <2>;
+ mediatek,rank-cnt = <2>;
+ mediatek,rank-size = <0x0 0x0>;
+ mediatek,mr-cnt = <1>;
+ mediatek,mr = <0x5 0xff>;
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt6779.dtsi b/arch/arm64/boot/dts/mediatek/mt6779.dtsi
index 9bdf514..28492a0 100644
--- a/arch/arm64/boot/dts/mediatek/mt6779.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt6779.dtsi
@@ -206,6 +206,24 @@
clock-names = "devapc-infra-clock";
};
+ dramc: dramc@10230000 {
+ compatible = "mediatek,mt6779-dramc";
+ reg = <0 0x10230000 0 0x2000>, /* DRAMC AO CHA */
+ <0 0x10240000 0 0x2000>, /* DRAMC AO CHB */
+ <0 0x10234000 0 0x1000>, /* DRAMC NAO CHA */
+ <0 0x10244000 0 0x1000>, /* DRAMC NAO CHB */
+ <0 0x10238000 0 0x2000>, /* DDRPHY AO CHA */
+ <0 0x10248000 0 0x2000>; /* DDRPHY AO CHB */
+ mediatek,support-channel-cnt = <2>;
+ mediatek,freq-cnt = <6>;
+ mediatek,freq-step = <3718 3733>,
+ <3094 3200>,
+ <2392 2400>,
+ <1534 1600>,
+ <1196 1200>,
+ <754 800>;
+ };
+
uart0: serial@11002000 {
compatible = "mediatek,mt6779-uart",
"mediatek,mt6577-uart";
--
1.7.9.5
On Fri, 16 Apr 2021 at 06:30, Po-Kai Chi <[email protected]> wrote:
>
> These patch series introduces the MediaTek DRAM controller driver (DRAMC)
> on MT6779 SoC, and enables to be built as a module by default for the
> ARM64 builds.
>
> MediaTek DRAMC driver provides cross-platform features as below:
> - API provided to other kernel modules for querying DRAM type,
> rank count, rank size, channel count and mode register settings.
> - Sysfs interface used to pass DRAM mode register settings and current
> DRAM data rate to user-space for MediaTek ecosystem.
>
> The API user includes MediaTek External Memory Interface (EMI) and
> DVFS Resource Control (DVFSRC), which will be sent to mainline later.
>
> Changes since v1:
> - add prefix to vendor properties in device tree, dt-binding and drivers
> - fix dt-binding check fail
>
> Po-Kai Chi (4):
> dt-bindings: memory: Add binding for MediaTek DRAM Controller
> memory: mediatek: add DRAM controller driver
> arm64: dts: add DRAMC node for MT6779
> arm64: defconfig: Enable MediaTek DRAMC common driver
>
> .../memory-controllers/mediatek,dramc.yaml | 162 ++++
> arch/arm64/boot/dts/mediatek/mt6779-evb.dts | 9 +
> arch/arm64/boot/dts/mediatek/mt6779.dtsi | 18 +
> arch/arm64/configs/defconfig | 1 +
> drivers/memory/Kconfig | 1 +
> drivers/memory/Makefile | 1 +
> drivers/memory/mediatek/Kconfig | 9 +
> drivers/memory/mediatek/Makefile | 3 +
> drivers/memory/mediatek/mtk-dramc.c | 711 ++++++++++++++++++
> include/memory/mediatek/dramc.h | 18 +
I found this patchset by coincidence as you never cc-ed me. Please use
scripts/get_maintainer.pl to get the list of people you need to Cc.
All this should go via memory drivers tree.
Best regards,
Krzysztof
On 16/04/2021 05:32, Po-Kai Chi wrote:
> This patch adds the documentation of the device-tree binding for
> MediaTek DRAM Controller.
>
> Signed-off-by: Po-Kai Chi <[email protected]>
> ---
> .../memory-controllers/mediatek,dramc.yaml | 162 ++++++++++++++++++++
> 1 file changed, 162 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/memory-controllers/mediatek,dramc.yaml
>
> diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,dramc.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,dramc.yaml
> new file mode 100644
> index 0000000..18f77c2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,dramc.yaml
> @@ -0,0 +1,162 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (c) 2021 MediaTek Inc.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/memory-controllers/mediatek,dramc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek DRAM Controller
> +
> +maintainers:
> + - Po-Kai Chi <[email protected]>
> +
> +description: |
> + MediaTek DRAM controller (DRAMC) provides an interface to query information
> + about DRAM which collected from bootloader and device tree.
> + This is mainly used by MediaTek Extended Memory Interface (EMI) and DVFS Resource
> + Control (DVFSRC).
> +
> +properties:
> + compatible:
> + items:
> + - enum:
Not an enum.
> + - mediatek,mt6779-dramc
NAK.
You missed to Cc people who should review this (e.g. Rob). Please start
using get_maintainers script.
Best regards,
Krzysztof
On 16/04/2021 05:32, Po-Kai Chi wrote:
> This commit enables MediaTek DRAMC common driver to be built
> as a module by default for the ARM64 builds.
Don't write "This commit".
https://elixir.bootlin.com/linux/latest/source/Documentation/process/submitting-patches.rst#L89
Please read entire doc above.
Best regards,
Krzysztof