This Series(v5) addressed the review comments provided by Vinod, and
patch 05/10 is moved to 01/10 so that documentation patch comes before
driver.
Apart from it, changes are made in patch 03/10(earlier it was 02/10)
to replace of_match_device() with of_device_get_match_data() and
removed uintptr_t from type-cast.
This Series is rebased on top of 5.8.0-rc3.
---------------------------------------------------------------------
Series(v4) addressed the review comments provided by Mani, and
there are changes in patch 1/10, 2/10 and 6/10 for it.
For first couple of patches , old comments are preserved and more
details about how DMA descriptors fields are programmed is added.
Apart from it, Typo is fixed patch 6/10 and placed the header file
in alphabetical order.
Also, this series fixes one compilation warning (reported by Kbuild)
introduced by patch 2/10 using clang compiler.
------------------------------------------------------------------------
Series(v3) addressed the review comments provided by Rob, and
there are changes in patch 5/10 for it.
Also, one of the important change for this series(v3) is about the way we
we handle address range conflict between pinctrl and sps node.
In the last Series(v2), patch 4/10 was sent as *do not merge* but while
discussing about some proper solution for it, we have come up with
idea of limiting pinctrl address range(to 0x100) to avoid this conflict.
This is safe to do as current pinctrl driver uses address range only
up to 0x100 (even less than that?), and this would let sps to work properly.
Since sps block is now enabled , we have to provide power-domain bit
for dma to work properly and patch 6/10 has that change now.
Looking forward have some comments for this series.
---------------------------------------------------------------------------
Series(v2) addressed the review comments provided by Andre, and
there are changes in patch 1/10, 2/10, 5/10 and 9/10.
* Accessor function (to get the frame lenght) has moved from
patch 2/9 to patch 1/9 with inline removed.
* Removed the unnecessary line break.
* Added comments about the way DMA descriptor differs between S700
and S900.
* Added a macro to define fcnt value.
* Updated dma DT bindings.
* Used SoC secific compatible string for MMC.
Apart from it, a new patch 8/10 is added in this series to
update mmc DT bindings.
Series is rebased on 5.7.0-rc6.
-----------------------------------------------------------------------------
Series(v1) have following changes from the previous series.
New patch(5/8) has been introduced that converts dma dt-binding
for Actions OWL SoC from text format to yaml file.
For patch(2/8) new accessor function is added to get the frame
lenght which is common to both S900 and S700. Apart from it
SoC check is removed from irq routine as it is not needed.
Patch(4/8) which is an hack to prove our DMA and MMC works
for S700 is now sent as *do not merge* patch.
DMA is tested using dmatest with follwoing result:
root@ubuntu:~# echo dma0chan1 > /sys/module/dmatest/parameters/channel
root@ubuntu:~# echo 2000 > /sys/module/dmatest/parameters/timeout
root@ubuntu:~# echo 1 > /sys/module/dmatest/parameters/iterations
root@ubuntu:~# echo 1 > /sys/module/dmatest/parameters/run
root@ubuntu:~# dmesg | tail
[ 303.362586] dmatest: Added 1 threads using dma0chan1
[ 317.258658] dmatest: Started 1 threads using dma0chan1
[ 317.259397] dmatest: dma0chan1-copy0: summary 1 tests, 0 failures 16129.03 iops 32258 KB/s (0)
-------------------------------------------------------------------------------
The intention of RFC series is to enable uSD and DMA support for
Cubieboard7 based on Actions S700 SoC, and on the way we found that
it requires changes in dmaengine present on S700 as its different
from what is present on S900.
Patch(1/8) does provide a new way to describe DMA descriptor, idea is
to remove the bit-fields as its less maintainable. It is only build
tested and it would be great if this can be tested on S900 based
hardware.
Patch(2/8) adds S700 DMA engine support, there is new compatible
string added for it, which means a changed bindings needed to submitted
for this. I would plan to send it later the converted "owl-dma.yaml".
Patch(4/8) disables the sps node as its memory range is conflicting
pinctrl node and results in pinctrl proble failure.
Rest of patches in the series adds DMA/MMC nodes for S700
alone with binding constants and enables the uSD for Cubieboard7.
This whole series is tested, by building/compiling Kernel on
Cubieboard7-lite which was *almost* successful (OOM kicked in,
while Linking due to less RAM present on hardware).
Following is the mmc speed :
ubuntu@ubuntu:~$ sudo hdparm -tT /dev/mmcblk0
/dev/mmcblk0:
Timing cached reads: 1310 MB in 2.00 seconds = 655.15 MB/sec
Timing buffered disk reads: 62 MB in 3.05 seconds = 20.30 MB/sec
Amit Singh Tomar (10):
dt-bindings: dmaengine: convert Actions Semi Owl SoCs bindings to yaml
dmaengine: Actions: get rid of bit fields from dma descriptor
dmaengine: Actions: Add support for S700 DMA engine
clk: actions: Add MMC clock-register reset bits
arm64: dts: actions: limit address range for pinctrl node
arm64: dts: actions: Add DMA Controller for S700
dt-bindings: reset: s700: Add binding constants for mmc
dt-bindings: mmc: owl: add compatible string actions,s700-mmc
arm64: dts: actions: Add MMC controller support for S700
arm64: dts: actions: Add uSD support for Cubieboard7
Documentation/devicetree/bindings/dma/owl-dma.txt | 47 -------
Documentation/devicetree/bindings/dma/owl-dma.yaml | 79 ++++++++++++
Documentation/devicetree/bindings/mmc/owl-mmc.yaml | 6 +-
arch/arm64/boot/dts/actions/s700-cubieboard7.dts | 41 ++++++
arch/arm64/boot/dts/actions/s700.dtsi | 51 +++++++-
drivers/clk/actions/owl-s700.c | 3 +
drivers/dma/owl-dma.c | 139 +++++++++++++--------
include/dt-bindings/reset/actions,s700-reset.h | 3 +
8 files changed, 271 insertions(+), 98 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/dma/owl-dma.txt
create mode 100644 Documentation/devicetree/bindings/dma/owl-dma.yaml
--
2.7.4
Converts the device tree bindings for the Actions Semi Owl SoCs DMA
Controller over to YAML schemas.
It also adds new compatible string "actions,s700-dma".
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Amit Singh Tomar <[email protected]>
---
Changes since v4:
* Added Rob's Reviewed-by tag.
* Re-order it from 05/10 to 01/10.
Changes since v3:
* No change.
Changes since v2:
* Addressed Rob's comments:
- removed unnecessary description.
- added unevaluatedProperties
- added relevant information about
dma-channels and dma-request
* Added power-domain property.
Change since v1:
* Updated the description field to reflect
only the necessary information.
* replaced the maxItems field with description for each
controller attribute(except interrupts).
* Replaced the clock macro with number to keep the example
as independent as possible.
---
Documentation/devicetree/bindings/dma/owl-dma.txt | 47 -------------
Documentation/devicetree/bindings/dma/owl-dma.yaml | 79 ++++++++++++++++++++++
2 files changed, 79 insertions(+), 47 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/dma/owl-dma.txt
create mode 100644 Documentation/devicetree/bindings/dma/owl-dma.yaml
diff --git a/Documentation/devicetree/bindings/dma/owl-dma.txt b/Documentation/devicetree/bindings/dma/owl-dma.txt
deleted file mode 100644
index 03e9bb12b75f..000000000000
--- a/Documentation/devicetree/bindings/dma/owl-dma.txt
+++ /dev/null
@@ -1,47 +0,0 @@
-* Actions Semi Owl SoCs DMA controller
-
-This binding follows the generic DMA bindings defined in dma.txt.
-
-Required properties:
-- compatible: Should be "actions,s900-dma".
-- reg: Should contain DMA registers location and length.
-- interrupts: Should contain 4 interrupts shared by all channel.
-- #dma-cells: Must be <1>. Used to represent the number of integer
- cells in the dmas property of client device.
-- dma-channels: Physical channels supported.
-- dma-requests: Number of DMA request signals supported by the controller.
- Refer to Documentation/devicetree/bindings/dma/dma.txt
-- clocks: Phandle and Specifier of the clock feeding the DMA controller.
-
-Example:
-
-Controller:
- dma: dma-controller@e0260000 {
- compatible = "actions,s900-dma";
- reg = <0x0 0xe0260000 0x0 0x1000>;
- interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
- #dma-cells = <1>;
- dma-channels = <12>;
- dma-requests = <46>;
- clocks = <&clock CLK_DMAC>;
- };
-
-Client:
-
-DMA clients connected to the Actions Semi Owl SoCs DMA controller must
-use the format described in the dma.txt file, using a two-cell specifier
-for each channel.
-
-The two cells in order are:
-1. A phandle pointing to the DMA controller.
-2. The channel id.
-
-uart5: serial@e012a000 {
- ...
- dma-names = "tx", "rx";
- dmas = <&dma 26>, <&dma 27>;
- ...
-};
diff --git a/Documentation/devicetree/bindings/dma/owl-dma.yaml b/Documentation/devicetree/bindings/dma/owl-dma.yaml
new file mode 100644
index 000000000000..5577cd910781
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/owl-dma.yaml
@@ -0,0 +1,79 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/owl-dma.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Actions Semi Owl SoCs DMA controller
+
+description: |
+ The OWL DMA is a general-purpose direct memory access controller capable of
+ supporting 10 and 12 independent DMA channels for S700 and S900 SoCs
+ respectively.
+
+maintainers:
+ - Manivannan Sadhasivam <[email protected]>
+
+allOf:
+ - $ref: "dma-controller.yaml#"
+
+properties:
+ compatible:
+ enum:
+ - actions,s900-dma
+ - actions,s700-dma
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ description:
+ controller supports 4 interrupts, which are freely assignable to the
+ DMA channels.
+ maxItems: 4
+
+ "#dma-cells":
+ const: 1
+
+ dma-channels:
+ maximum: 12
+
+ dma-requests:
+ maximum: 46
+
+ clocks:
+ maxItems: 1
+ description:
+ Phandle and Specifier of the clock feeding the DMA controller.
+
+ power-domains:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - "#dma-cells"
+ - dma-channels
+ - dma-requests
+ - clocks
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ dma: dma-controller@e0260000 {
+ compatible = "actions,s900-dma";
+ reg = <0x0 0xe0260000 0x0 0x1000>;
+ interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ dma-channels = <12>;
+ dma-requests = <46>;
+ clocks = <&clock 22>;
+ };
+
+...
--
2.7.4
At the moment, Driver uses bit fields to describe registers of the DMA
descriptor structure that makes it less portable and maintainable, and
Andre suugested(and even sketched important bits for it) to make use of
array to describe this DMA descriptors instead. It gives the flexibility
while extending support for other platform such as Actions S700.
This commit removes the "owl_dma_lli_hw" (that includes bit-fields) and
uses array to describe DMA descriptor.
Suggested-by: Andre Przywara <[email protected]>
Signed-off-by: Amit Singh Tomar <[email protected]>
---
Changes since v4:
* Reordered it from 01/10 to 02/10.
Changes since v3:
* Added description for enum fields.
* Restored the old comment.
* Added detailed comment about, the way FLEN
and FCNT values are filled.
Changes since v2:
* No change.
Changes since v1:
* Defined macro for frame count value.
* Introduced llc_hw_flen() from patch 2/9.
* Removed the unnecessary line break.
Changes since rfc:
* No change.
---
drivers/dma/owl-dma.c | 98 +++++++++++++++++++++++++++++----------------------
1 file changed, 56 insertions(+), 42 deletions(-)
diff --git a/drivers/dma/owl-dma.c b/drivers/dma/owl-dma.c
index 66ef70b00ec0..948d1bead860 100644
--- a/drivers/dma/owl-dma.c
+++ b/drivers/dma/owl-dma.c
@@ -120,30 +120,33 @@
#define BIT_FIELD(val, width, shift, newshift) \
((((val) >> (shift)) & ((BIT(width)) - 1)) << (newshift))
+/* Frame count value is fixed as 1 */
+#define FCNT_VAL 0x1
+
/**
- * struct owl_dma_lli_hw - Hardware link list for dma transfer
- * @next_lli: physical address of the next link list
- * @saddr: source physical address
- * @daddr: destination physical address
- * @flen: frame length
- * @fcnt: frame count
- * @src_stride: source stride
- * @dst_stride: destination stride
- * @ctrla: dma_mode and linklist ctrl config
- * @ctrlb: interrupt config
- * @const_num: data for constant fill
+ * owl_dmadesc_offsets - Describe DMA descriptor, hardware link
+ * list for dma transfer
+ * @OWL_DMADESC_NEXT_LLI: physical address of the next link list
+ * @OWL_DMADESC_SADDR: source physical address
+ * @OWL_DMADESC_DADDR: destination physical address
+ * @OWL_DMADESC_FLEN: frame length
+ * @OWL_DMADESC_SRC_STRIDE: source stride
+ * @OWL_DMADESC_DST_STRIDE: destination stride
+ * @OWL_DMADESC_CTRLA: dma_mode and linklist ctrl config
+ * @OWL_DMADESC_CTRLB: interrupt config
+ * @OWL_DMADESC_CONST_NUM: data for constant fill
*/
-struct owl_dma_lli_hw {
- u32 next_lli;
- u32 saddr;
- u32 daddr;
- u32 flen:20;
- u32 fcnt:12;
- u32 src_stride;
- u32 dst_stride;
- u32 ctrla;
- u32 ctrlb;
- u32 const_num;
+enum owl_dmadesc_offsets {
+ OWL_DMADESC_NEXT_LLI = 0,
+ OWL_DMADESC_SADDR,
+ OWL_DMADESC_DADDR,
+ OWL_DMADESC_FLEN,
+ OWL_DMADESC_SRC_STRIDE,
+ OWL_DMADESC_DST_STRIDE,
+ OWL_DMADESC_CTRLA,
+ OWL_DMADESC_CTRLB,
+ OWL_DMADESC_CONST_NUM,
+ OWL_DMADESC_SIZE
};
/**
@@ -153,7 +156,7 @@ struct owl_dma_lli_hw {
* @node: node for txd's lli_list
*/
struct owl_dma_lli {
- struct owl_dma_lli_hw hw;
+ u32 hw[OWL_DMADESC_SIZE];
dma_addr_t phys;
struct list_head node;
};
@@ -318,6 +321,11 @@ static inline u32 llc_hw_ctrlb(u32 int_ctl)
return ctl;
}
+static u32 llc_hw_flen(struct owl_dma_lli *lli)
+{
+ return lli->hw[OWL_DMADESC_FLEN] & GENMASK(19, 0);
+}
+
static void owl_dma_free_lli(struct owl_dma *od,
struct owl_dma_lli *lli)
{
@@ -349,8 +357,9 @@ static struct owl_dma_lli *owl_dma_add_lli(struct owl_dma_txd *txd,
list_add_tail(&next->node, &txd->lli_list);
if (prev) {
- prev->hw.next_lli = next->phys;
- prev->hw.ctrla |= llc_hw_ctrla(OWL_DMA_MODE_LME, 0);
+ prev->hw[OWL_DMADESC_NEXT_LLI] = next->phys;
+ prev->hw[OWL_DMADESC_CTRLA] |=
+ llc_hw_ctrla(OWL_DMA_MODE_LME, 0);
}
return next;
@@ -363,8 +372,7 @@ static inline int owl_dma_cfg_lli(struct owl_dma_vchan *vchan,
struct dma_slave_config *sconfig,
bool is_cyclic)
{
- struct owl_dma_lli_hw *hw = &lli->hw;
- u32 mode;
+ u32 mode, ctrlb;
mode = OWL_DMA_MODE_PW(0);
@@ -405,22 +413,28 @@ static inline int owl_dma_cfg_lli(struct owl_dma_vchan *vchan,
return -EINVAL;
}
- hw->next_lli = 0; /* One link list by default */
- hw->saddr = src;
- hw->daddr = dst;
-
- hw->fcnt = 1; /* Frame count fixed as 1 */
- hw->flen = len; /* Max frame length is 1MB */
- hw->src_stride = 0;
- hw->dst_stride = 0;
- hw->ctrla = llc_hw_ctrla(mode,
- OWL_DMA_LLC_SAV_LOAD_NEXT |
- OWL_DMA_LLC_DAV_LOAD_NEXT);
+ lli->hw[OWL_DMADESC_CTRLA] = llc_hw_ctrla(mode,
+ OWL_DMA_LLC_SAV_LOAD_NEXT |
+ OWL_DMA_LLC_DAV_LOAD_NEXT);
if (is_cyclic)
- hw->ctrlb = llc_hw_ctrlb(OWL_DMA_INTCTL_BLOCK);
+ ctrlb = llc_hw_ctrlb(OWL_DMA_INTCTL_BLOCK);
else
- hw->ctrlb = llc_hw_ctrlb(OWL_DMA_INTCTL_SUPER_BLOCK);
+ ctrlb = llc_hw_ctrlb(OWL_DMA_INTCTL_SUPER_BLOCK);
+
+ lli->hw[OWL_DMADESC_NEXT_LLI] = 0; /* One link list by default */
+ lli->hw[OWL_DMADESC_SADDR] = src;
+ lli->hw[OWL_DMADESC_DADDR] = dst;
+ lli->hw[OWL_DMADESC_SRC_STRIDE] = 0;
+ lli->hw[OWL_DMADESC_DST_STRIDE] = 0;
+ /*
+ * Word starts from offset 0xC is shared between frame length
+ * (max frame length is 1MB) and frame count, where first 20
+ * bits are for frame length and rest of 12 bits are for frame
+ * count.
+ */
+ lli->hw[OWL_DMADESC_FLEN] = len | FCNT_VAL << 20;
+ lli->hw[OWL_DMADESC_CTRLB] = ctrlb;
return 0;
}
@@ -752,7 +766,7 @@ static u32 owl_dma_getbytes_chan(struct owl_dma_vchan *vchan)
/* Start from the next active node */
if (lli->phys == next_lli_phy) {
list_for_each_entry(lli, &txd->lli_list, node)
- bytes += lli->hw.flen;
+ bytes += llc_hw_flen(lli);
break;
}
}
@@ -783,7 +797,7 @@ static enum dma_status owl_dma_tx_status(struct dma_chan *chan,
if (vd) {
txd = to_owl_txd(&vd->tx);
list_for_each_entry(lli, &txd->lli_list, node)
- bytes += lli->hw.flen;
+ bytes += llc_hw_flen(lli);
} else {
bytes = owl_dma_getbytes_chan(vchan);
}
--
2.7.4
DMA controller present on S700 SoC is compatible with the one on S900
(as most of registers are same), but it has different DMA descriptor
structure where registers "fcnt" and "ctrlb" uses different encoding.
For instance, on S900 "fcnt" starts at offset 0x0c and uses upper 12
bits whereas on S700, it starts at offset 0x1c and uses lower 12 bits.
This commit adds support for DMA controller present on S700.
Signed-off-by: Amit Singh Tomar <[email protected]>
---
Changes since v4:
* Reordered it from 02/10 to 03/10.
* Used of_device_get_match_data() instead of
of_match_device().
* Removed the uintptr_t used for typecast.
Changes since v3:
* Added description for enum fields.
* Restored the old comment.
* Added detailed comment about, the way FLEN
and FCNT values are filled.
Changes since v2:
* No change.
Changes since v1:
* Defined macro for frame count value.
* Introduced llc_hw_flen() from patch 2/9.
* Removed the unnecessary line break.
Changes since rfc:
* No change.
---
drivers/dma/owl-dma.c | 57 +++++++++++++++++++++++++++++++++++++--------------
1 file changed, 42 insertions(+), 15 deletions(-)
diff --git a/drivers/dma/owl-dma.c b/drivers/dma/owl-dma.c
index 948d1bead860..331c8d8b10a3 100644
--- a/drivers/dma/owl-dma.c
+++ b/drivers/dma/owl-dma.c
@@ -149,6 +149,11 @@ enum owl_dmadesc_offsets {
OWL_DMADESC_SIZE
};
+enum owl_dma_id {
+ S900_DMA,
+ S700_DMA,
+};
+
/**
* struct owl_dma_lli - Link list for dma transfer
* @hw: hardware link list
@@ -213,6 +218,7 @@ struct owl_dma_vchan {
* @pchans: array of data for the physical channels
* @nr_vchans: the number of physical channels
* @vchans: array of data for the physical channels
+ * @devid: device id based on OWL SoC
*/
struct owl_dma {
struct dma_device dma;
@@ -227,6 +233,7 @@ struct owl_dma {
unsigned int nr_vchans;
struct owl_dma_vchan *vchans;
+ enum owl_dma_id devid;
};
static void pchan_update(struct owl_dma_pchan *pchan, u32 reg,
@@ -316,6 +323,10 @@ static inline u32 llc_hw_ctrlb(u32 int_ctl)
{
u32 ctl;
+ /*
+ * Irrespective of the SoC, ctrlb value starts filling from
+ * bit 18.
+ */
ctl = BIT_FIELD(int_ctl, 7, 0, 18);
return ctl;
@@ -372,6 +383,7 @@ static inline int owl_dma_cfg_lli(struct owl_dma_vchan *vchan,
struct dma_slave_config *sconfig,
bool is_cyclic)
{
+ struct owl_dma *od = to_owl_dma(vchan->vc.chan.device);
u32 mode, ctrlb;
mode = OWL_DMA_MODE_PW(0);
@@ -427,14 +439,26 @@ static inline int owl_dma_cfg_lli(struct owl_dma_vchan *vchan,
lli->hw[OWL_DMADESC_DADDR] = dst;
lli->hw[OWL_DMADESC_SRC_STRIDE] = 0;
lli->hw[OWL_DMADESC_DST_STRIDE] = 0;
- /*
- * Word starts from offset 0xC is shared between frame length
- * (max frame length is 1MB) and frame count, where first 20
- * bits are for frame length and rest of 12 bits are for frame
- * count.
- */
- lli->hw[OWL_DMADESC_FLEN] = len | FCNT_VAL << 20;
- lli->hw[OWL_DMADESC_CTRLB] = ctrlb;
+
+ if (od->devid == S700_DMA) {
+ /* Max frame length is 1MB */
+ lli->hw[OWL_DMADESC_FLEN] = len;
+ /*
+ * On S700, word starts from offset 0x1C is shared between
+ * frame count and ctrlb, where first 12 bits are for frame
+ * count and rest of 20 bits are for ctrlb.
+ */
+ lli->hw[OWL_DMADESC_CTRLB] = FCNT_VAL | ctrlb;
+ } else {
+ /*
+ * On S900, word starts from offset 0xC is shared between
+ * frame length (max frame length is 1MB) and frame count,
+ * where first 20 bits are for frame length and rest of
+ * 12 bits are for frame count.
+ */
+ lli->hw[OWL_DMADESC_FLEN] = len | FCNT_VAL << 20;
+ lli->hw[OWL_DMADESC_CTRLB] = ctrlb;
+ }
return 0;
}
@@ -596,7 +620,7 @@ static irqreturn_t owl_dma_interrupt(int irq, void *dev_id)
global_irq_pending = dma_readl(od, OWL_DMA_IRQ_PD0);
- if (chan_irq_pending && !(global_irq_pending & BIT(i))) {
+ if (chan_irq_pending && !(global_irq_pending & BIT(i))) {
dev_dbg(od->dma.dev,
"global and channel IRQ pending match err\n");
@@ -1054,6 +1078,13 @@ static struct dma_chan *owl_dma_of_xlate(struct of_phandle_args *dma_spec,
return chan;
}
+static const struct of_device_id owl_dma_match[] = {
+ { .compatible = "actions,s900-dma", .data = (void *)S900_DMA,},
+ { .compatible = "actions,s700-dma", .data = (void *)S700_DMA,},
+ { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, owl_dma_match);
+
static int owl_dma_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
@@ -1083,6 +1114,8 @@ static int owl_dma_probe(struct platform_device *pdev)
dev_info(&pdev->dev, "dma-channels %d, dma-requests %d\n",
nr_channels, nr_requests);
+ od->devid = (enum owl_dma_id)of_device_get_match_data(&pdev->dev);
+
od->nr_pchans = nr_channels;
od->nr_vchans = nr_requests;
@@ -1215,12 +1248,6 @@ static int owl_dma_remove(struct platform_device *pdev)
return 0;
}
-static const struct of_device_id owl_dma_match[] = {
- { .compatible = "actions,s900-dma", },
- { /* sentinel */ }
-};
-MODULE_DEVICE_TABLE(of, owl_dma_match);
-
static struct platform_driver owl_dma_driver = {
.probe = owl_dma_probe,
.remove = owl_dma_remove,
--
2.7.4
This commit adds reset bits needed for MMC clock registers present
on Actions S700 SoC.
Signed-off-by: Amit Singh Tomar <[email protected]>
---
Changes from v4:
* Reordered it from 03/10 to 04/10.
Changes from v3:
* NO change.
Changes from v2:
* No change.
Changes from v1:
* No change.
Changes from RFC:
* No change.
---
drivers/clk/actions/owl-s700.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/clk/actions/owl-s700.c b/drivers/clk/actions/owl-s700.c
index a2f34d13fb54..cd60eca7727d 100644
--- a/drivers/clk/actions/owl-s700.c
+++ b/drivers/clk/actions/owl-s700.c
@@ -577,6 +577,9 @@ static const struct owl_reset_map s700_resets[] = {
[RESET_DSI] = { CMU_DEVRST0, BIT(2) },
[RESET_CSI] = { CMU_DEVRST0, BIT(13) },
[RESET_SI] = { CMU_DEVRST0, BIT(14) },
+ [RESET_SD0] = { CMU_DEVRST0, BIT(22) },
+ [RESET_SD1] = { CMU_DEVRST0, BIT(23) },
+ [RESET_SD2] = { CMU_DEVRST0, BIT(24) },
[RESET_I2C0] = { CMU_DEVRST1, BIT(0) },
[RESET_I2C1] = { CMU_DEVRST1, BIT(1) },
[RESET_I2C2] = { CMU_DEVRST1, BIT(2) },
--
2.7.4
This commit adds DMA controller present on Actions S700, it differs from
S900 in terms of number of dma channels and requests.
Signed-off-by: Amit Singh Tomar <[email protected]>
---
Changes since v4:
* No change.
Changes since v3:
* Fixed typo in commit message.
* Placed owl-s700-powergate.h in alphabetical order.
Changes since v2:
* added power-domain property as sps
is enabled now and DMA needs it.
Changes since v1:
* No Change.
Changes since RFC:
* No Change.
---
arch/arm64/boot/dts/actions/s700.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/actions/s700.dtsi b/arch/arm64/boot/dts/actions/s700.dtsi
index f8eb72bb4125..2c78caebf515 100644
--- a/arch/arm64/boot/dts/actions/s700.dtsi
+++ b/arch/arm64/boot/dts/actions/s700.dtsi
@@ -5,6 +5,7 @@
#include <dt-bindings/clock/actions,s700-cmu.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/power/owl-s700-powergate.h>
#include <dt-bindings/reset/actions,s700-reset.h>
/ {
@@ -244,5 +245,19 @@
<GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
};
+
+ dma: dma-controller@e0230000 {
+ compatible = "actions,s700-dma";
+ reg = <0x0 0xe0230000 0x0 0x1000>;
+ interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ dma-channels = <10>;
+ dma-requests = <44>;
+ clocks = <&cmu CLK_DMAC>;
+ power-domains = <&sps S700_PD_DMA>;
+ };
};
};
--
2.7.4
This commit adds device tree binding reset constants for mmc controller
present on Actions S700 Soc.
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Amit Singh Tomar <[email protected]>
---
Changes since v4:
* No change.
Changes since v3:
* No change.
Changes since v2:
* No change.
Changes since v1:
* No change.
Changes since RFC:
* added Rob's acked-by tag
---
include/dt-bindings/reset/actions,s700-reset.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/dt-bindings/reset/actions,s700-reset.h b/include/dt-bindings/reset/actions,s700-reset.h
index 5e3b16b8ef53..a3118de6d7aa 100644
--- a/include/dt-bindings/reset/actions,s700-reset.h
+++ b/include/dt-bindings/reset/actions,s700-reset.h
@@ -30,5 +30,8 @@
#define RESET_UART4 20
#define RESET_UART5 21
#define RESET_UART6 22
+#define RESET_SD0 23
+#define RESET_SD1 24
+#define RESET_SD2 25
#endif /* __DT_BINDINGS_ACTIONS_S700_RESET_H */
--
2.7.4
This commits adds support for MMC controllers present on Actions S700 SoC,
there are 3 MMC controllers in this SoC which can be used for accessing
SD/EMMC/SDIO cards.
Signed-off-by: Amit Singh Tomar <[email protected]>
---
Changes since v4:
* No change.
Changes since v3:
* No change.
Changes since v2:
* No change.
Changes since v1:
* Added SoC specific compatibe string.
Changes since RFC:
* No change
---
arch/arm64/boot/dts/actions/s700.dtsi | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm64/boot/dts/actions/s700.dtsi b/arch/arm64/boot/dts/actions/s700.dtsi
index 2c78caebf515..9ed88aafc2da 100644
--- a/arch/arm64/boot/dts/actions/s700.dtsi
+++ b/arch/arm64/boot/dts/actions/s700.dtsi
@@ -259,5 +259,38 @@
clocks = <&cmu CLK_DMAC>;
power-domains = <&sps S700_PD_DMA>;
};
+
+ mmc0: mmc@e0210000 {
+ compatible = "actions,s700-mmc", "actions,owl-mmc";
+ reg = <0x0 0xe0210000 0x0 0x4000>;
+ interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cmu CLK_SD0>;
+ resets = <&cmu RESET_SD0>;
+ dmas = <&dma 2>;
+ dma-names = "mmc";
+ status = "disabled";
+ };
+
+ mmc1: mmc@e0214000 {
+ compatible = "actions,s700-mmc", "actions,owl-mmc";
+ reg = <0x0 0xe0214000 0x0 0x4000>;
+ interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cmu CLK_SD1>;
+ resets = <&cmu RESET_SD1>;
+ dmas = <&dma 3>;
+ dma-names = "mmc";
+ status = "disabled";
+ };
+
+ mmc2: mmc@e0218000 {
+ compatible = "actions,s700-mmc", "actions,owl-mmc";
+ reg = <0x0 0xe0218000 0x0 0x4000>;
+ interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cmu CLK_SD2>;
+ resets = <&cmu RESET_SD2>;
+ dmas = <&dma 4>;
+ dma-names = "mmc";
+ status = "disabled";
+ };
};
};
--
2.7.4
The commit adds a new SoC specific compatible string "actions,s700-mmc"
in combination with more generic string "actions,owl-mmc".
Placement order of these strings should abide by the principle of
"from most specific to most general".
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Amit Singh Tomar <[email protected]>
---
Changes since v4:
* No change.
Changes since v3:
* No change.
Changes since v2:
* Added Rob's Reviewed-by tag
---
Documentation/devicetree/bindings/mmc/owl-mmc.yaml | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mmc/owl-mmc.yaml b/Documentation/devicetree/bindings/mmc/owl-mmc.yaml
index 1380501fb8f0..5eab25ccf7ae 100644
--- a/Documentation/devicetree/bindings/mmc/owl-mmc.yaml
+++ b/Documentation/devicetree/bindings/mmc/owl-mmc.yaml
@@ -14,7 +14,11 @@ maintainers:
properties:
compatible:
- const: actions,owl-mmc
+ oneOf:
+ - const: actions,owl-mmc
+ - items:
+ - const: actions,s700-mmc
+ - const: actions,owl-mmc
reg:
maxItems: 1
--
2.7.4
After commit 7cdf8446ed1d ("arm64: dts: actions: Add pinctrl node for
Actions Semi S700") following error has been observed while booting
Linux on Cubieboard7-lite(based on S700 SoC).
[ 0.257415] pinctrl-s700 e01b0000.pinctrl: can't request region for
resource [mem 0xe01b0000-0xe01b0fff]
[ 0.266902] pinctrl-s700: probe of e01b0000.pinctrl failed with error -16
This is due to the fact that memory range for "sps" power domain controller
clashes with pinctrl.
One way to fix it, is to limit pinctrl address range which is safe
to do as current pinctrl driver uses address range only up to 0x100.
This commit limits the pinctrl address range to 0x100 so that it doesn't
conflict with sps range.
Fixes: 7cdf8446ed1d ("arm64: dts: actions: Add pinctrl node for Actions
Semi S700")
Suggested-by: Andre Przywara <[email protected]>
Signed-off-by: Amit Singh Tomar <[email protected]>
---
Changes since v4:
* Reordered it from 04/10 to 05/10.
Changes since v3:
* No change.
Changes since v2:
* this is no more don't merge and fixed
the broken S700 boot by limiting pinctrl
address range.
* Modified the subject to reflect the changes.
Changes since v1:
* No change.
Changes since RFC:
* kept as do not merge.
---
arch/arm64/boot/dts/actions/s700.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/actions/s700.dtsi b/arch/arm64/boot/dts/actions/s700.dtsi
index 2006ad5424fa..f8eb72bb4125 100644
--- a/arch/arm64/boot/dts/actions/s700.dtsi
+++ b/arch/arm64/boot/dts/actions/s700.dtsi
@@ -231,7 +231,7 @@
pinctrl: pinctrl@e01b0000 {
compatible = "actions,s700-pinctrl";
- reg = <0x0 0xe01b0000 0x0 0x1000>;
+ reg = <0x0 0xe01b0000 0x0 0x100>;
clocks = <&cmu CLK_GPIO>;
gpio-controller;
gpio-ranges = <&pinctrl 0 0 136>;
--
2.7.4
This commit adds uSD support for Cubieboard7 board based on Actions Semi
S700 SoC. SD0 is connected to uSD slot. Since there is no PMIC support
added yet, fixed regulator has been used as a regulator node.
Signed-off-by: Amit Singh Tomar <[email protected]>
---
Changes since v4:
* No change.
Changes since v3:
* No change.
Changes since v2:
* No change.
Changes since v1:
* No change.
Changes since RFC:
* No change.
---
arch/arm64/boot/dts/actions/s700-cubieboard7.dts | 41 ++++++++++++++++++++++++
arch/arm64/boot/dts/actions/s700.dtsi | 1 +
2 files changed, 42 insertions(+)
diff --git a/arch/arm64/boot/dts/actions/s700-cubieboard7.dts b/arch/arm64/boot/dts/actions/s700-cubieboard7.dts
index 63e375cd9eb4..ec117eb12f3a 100644
--- a/arch/arm64/boot/dts/actions/s700-cubieboard7.dts
+++ b/arch/arm64/boot/dts/actions/s700-cubieboard7.dts
@@ -13,6 +13,7 @@
aliases {
serial3 = &uart3;
+ mmc0 = &mmc0;
};
chosen {
@@ -28,6 +29,23 @@
device_type = "memory";
reg = <0x1 0xe0000000 0x0 0x0>;
};
+
+ /* Fixed regulator used in the absence of PMIC */
+ vcc_3v1: vcc-3v1 {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.1V";
+ regulator-min-microvolt = <3100000>;
+ regulator-max-microvolt = <3100000>;
+ };
+
+ /* Fixed regulator used in the absence of PMIC */
+ sd_vcc: sd-vcc {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.1V";
+ regulator-min-microvolt = <3100000>;
+ regulator-max-microvolt = <3100000>;
+ regulator-always-on;
+ };
};
&i2c0 {
@@ -81,6 +99,14 @@
bias-pull-up;
};
};
+
+ mmc0_default: mmc0_default {
+ pinmux {
+ groups = "sd0_d0_mfp", "sd0_d1_mfp", "sd0_d2_d3_mfp",
+ "sd0_cmd_mfp", "sd0_clk_mfp";
+ function = "sd0";
+ };
+ };
};
&timer {
@@ -90,3 +116,18 @@
&uart3 {
status = "okay";
};
+
+/* uSD */
+&mmc0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_default>;
+ cd-gpios = <&pinctrl 120 GPIO_ACTIVE_LOW>;
+ no-sdio;
+ no-mmc;
+ no-1-8-v;
+ bus-width = <4>;
+ vmmc-supply = <&sd_vcc>;
+ vqmmc-supply = <&sd_vcc>;
+};
+
diff --git a/arch/arm64/boot/dts/actions/s700.dtsi b/arch/arm64/boot/dts/actions/s700.dtsi
index 9ed88aafc2da..ba498cf9217d 100644
--- a/arch/arm64/boot/dts/actions/s700.dtsi
+++ b/arch/arm64/boot/dts/actions/s700.dtsi
@@ -4,6 +4,7 @@
*/
#include <dt-bindings/clock/actions,s700-cmu.h>
+#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/owl-s700-powergate.h>
#include <dt-bindings/reset/actions,s700-reset.h>
--
2.7.4
On Thu, 02 Jul 2020 20:22:47 +0530, Amit Singh Tomar wrote:
> Converts the device tree bindings for the Actions Semi Owl SoCs DMA
> Controller over to YAML schemas.
>
> It also adds new compatible string "actions,s700-dma".
>
> Reviewed-by: Rob Herring <[email protected]>
> Signed-off-by: Amit Singh Tomar <[email protected]>
> ---
> Changes since v4:
> * Added Rob's Reviewed-by tag.
> * Re-order it from 05/10 to 01/10.
> Changes since v3:
> * No change.
> Changes since v2:
> * Addressed Rob's comments:
> - removed unnecessary description.
> - added unevaluatedProperties
> - added relevant information about
> dma-channels and dma-request
> * Added power-domain property.
> Change since v1:
> * Updated the description field to reflect
> only the necessary information.
> * replaced the maxItems field with description for each
> controller attribute(except interrupts).
> * Replaced the clock macro with number to keep the example
> as independent as possible.
> ---
> Documentation/devicetree/bindings/dma/owl-dma.txt | 47 -------------
> Documentation/devicetree/bindings/dma/owl-dma.yaml | 79 ++++++++++++++++++++++
> 2 files changed, 79 insertions(+), 47 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/dma/owl-dma.txt
> create mode 100644 Documentation/devicetree/bindings/dma/owl-dma.yaml
>
My bot found errors running 'make dt_binding_check' on your patch:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/dma/owl-dma.example.dt.yaml: example-0: dma-controller@e0260000:reg:0: [0, 3760586752, 0, 4096] is too long
See https://patchwork.ozlabs.org/patch/1321538
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure dt-schema is up to date:
pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade
Please check and re-submit.
Hi Amit,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on robh/for-next]
[also build test WARNING on clk/clk-next pza/reset/next linus/master v5.8-rc3 next-20200702]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Amit-Singh-Tomar/Add-MMC-and-DMA-support-for-Actions-S700/20200702-225741
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: arm64-randconfig-r002-20200701 (attached as .config)
compiler: clang version 11.0.0 (https://github.com/llvm/llvm-project 003a086ffc0d1affbb8300b36225fb8150a2d40a)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm64 cross compiling tool for clang build
# apt-get install binutils-aarch64-linux-gnu
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <[email protected]>
All warnings (new ones prefixed by >>):
>> drivers/dma/owl-dma.c:1117:14: warning: cast to smaller integer type 'enum owl_dma_id' from 'const void *' [-Wvoid-pointer-to-enum-cast]
od->devid = (enum owl_dma_id)of_device_get_match_data(&pdev->dev);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1 warning generated.
vim +1117 drivers/dma/owl-dma.c
1087
1088 static int owl_dma_probe(struct platform_device *pdev)
1089 {
1090 struct device_node *np = pdev->dev.of_node;
1091 struct owl_dma *od;
1092 int ret, i, nr_channels, nr_requests;
1093
1094 od = devm_kzalloc(&pdev->dev, sizeof(*od), GFP_KERNEL);
1095 if (!od)
1096 return -ENOMEM;
1097
1098 od->base = devm_platform_ioremap_resource(pdev, 0);
1099 if (IS_ERR(od->base))
1100 return PTR_ERR(od->base);
1101
1102 ret = of_property_read_u32(np, "dma-channels", &nr_channels);
1103 if (ret) {
1104 dev_err(&pdev->dev, "can't get dma-channels\n");
1105 return ret;
1106 }
1107
1108 ret = of_property_read_u32(np, "dma-requests", &nr_requests);
1109 if (ret) {
1110 dev_err(&pdev->dev, "can't get dma-requests\n");
1111 return ret;
1112 }
1113
1114 dev_info(&pdev->dev, "dma-channels %d, dma-requests %d\n",
1115 nr_channels, nr_requests);
1116
> 1117 od->devid = (enum owl_dma_id)of_device_get_match_data(&pdev->dev);
1118
1119 od->nr_pchans = nr_channels;
1120 od->nr_vchans = nr_requests;
1121
1122 pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
1123
1124 platform_set_drvdata(pdev, od);
1125 spin_lock_init(&od->lock);
1126
1127 dma_cap_set(DMA_MEMCPY, od->dma.cap_mask);
1128 dma_cap_set(DMA_SLAVE, od->dma.cap_mask);
1129 dma_cap_set(DMA_CYCLIC, od->dma.cap_mask);
1130
1131 od->dma.dev = &pdev->dev;
1132 od->dma.device_free_chan_resources = owl_dma_free_chan_resources;
1133 od->dma.device_tx_status = owl_dma_tx_status;
1134 od->dma.device_issue_pending = owl_dma_issue_pending;
1135 od->dma.device_prep_dma_memcpy = owl_dma_prep_memcpy;
1136 od->dma.device_prep_slave_sg = owl_dma_prep_slave_sg;
1137 od->dma.device_prep_dma_cyclic = owl_prep_dma_cyclic;
1138 od->dma.device_config = owl_dma_config;
1139 od->dma.device_pause = owl_dma_pause;
1140 od->dma.device_resume = owl_dma_resume;
1141 od->dma.device_terminate_all = owl_dma_terminate_all;
1142 od->dma.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
1143 od->dma.dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
1144 od->dma.directions = BIT(DMA_MEM_TO_MEM);
1145 od->dma.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
1146
1147 INIT_LIST_HEAD(&od->dma.channels);
1148
1149 od->clk = devm_clk_get(&pdev->dev, NULL);
1150 if (IS_ERR(od->clk)) {
1151 dev_err(&pdev->dev, "unable to get clock\n");
1152 return PTR_ERR(od->clk);
1153 }
1154
1155 /*
1156 * Eventhough the DMA controller is capable of generating 4
1157 * IRQ's for DMA priority feature, we only use 1 IRQ for
1158 * simplification.
1159 */
1160 od->irq = platform_get_irq(pdev, 0);
1161 ret = devm_request_irq(&pdev->dev, od->irq, owl_dma_interrupt, 0,
1162 dev_name(&pdev->dev), od);
1163 if (ret) {
1164 dev_err(&pdev->dev, "unable to request IRQ\n");
1165 return ret;
1166 }
1167
1168 /* Init physical channel */
1169 od->pchans = devm_kcalloc(&pdev->dev, od->nr_pchans,
1170 sizeof(struct owl_dma_pchan), GFP_KERNEL);
1171 if (!od->pchans)
1172 return -ENOMEM;
1173
1174 for (i = 0; i < od->nr_pchans; i++) {
1175 struct owl_dma_pchan *pchan = &od->pchans[i];
1176
1177 pchan->id = i;
1178 pchan->base = od->base + OWL_DMA_CHAN_BASE(i);
1179 }
1180
1181 /* Init virtual channel */
1182 od->vchans = devm_kcalloc(&pdev->dev, od->nr_vchans,
1183 sizeof(struct owl_dma_vchan), GFP_KERNEL);
1184 if (!od->vchans)
1185 return -ENOMEM;
1186
1187 for (i = 0; i < od->nr_vchans; i++) {
1188 struct owl_dma_vchan *vchan = &od->vchans[i];
1189
1190 vchan->vc.desc_free = owl_dma_desc_free;
1191 vchan_init(&vchan->vc, &od->dma);
1192 }
1193
1194 /* Create a pool of consistent memory blocks for hardware descriptors */
1195 od->lli_pool = dma_pool_create(dev_name(od->dma.dev), od->dma.dev,
1196 sizeof(struct owl_dma_lli),
1197 __alignof__(struct owl_dma_lli),
1198 0);
1199 if (!od->lli_pool) {
1200 dev_err(&pdev->dev, "unable to allocate DMA descriptor pool\n");
1201 return -ENOMEM;
1202 }
1203
1204 clk_prepare_enable(od->clk);
1205
1206 ret = dma_async_device_register(&od->dma);
1207 if (ret) {
1208 dev_err(&pdev->dev, "failed to register DMA engine device\n");
1209 goto err_pool_free;
1210 }
1211
1212 /* Device-tree DMA controller registration */
1213 ret = of_dma_controller_register(pdev->dev.of_node,
1214 owl_dma_of_xlate, od);
1215 if (ret) {
1216 dev_err(&pdev->dev, "of_dma_controller_register failed\n");
1217 goto err_dma_unregister;
1218 }
1219
1220 return 0;
1221
1222 err_dma_unregister:
1223 dma_async_device_unregister(&od->dma);
1224 err_pool_free:
1225 clk_disable_unprepare(od->clk);
1226 dma_pool_destroy(od->lli_pool);
1227
1228 return ret;
1229 }
1230
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/[email protected]
Hi Rob,
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure dt-schema is up to date:
>
> pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade
>
> Please check and re-submit.
I wasn't able to reproduce it, even after updating the dt-schema.
Kindly have a look at logs:
https://pastebin.ubuntu.com/p/xTBNNyBdFv/
Thanks,
-Amit
On Fri, Jul 3, 2020 at 12:48 PM Amit Tomer <[email protected]> wrote:
>
> Hi Rob,
>
>
> > If you already ran 'make dt_binding_check' and didn't see the above
> > error(s), then make sure dt-schema is up to date:
> >
> > pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade
> >
> > Please check and re-submit.
>
> I wasn't able to reproduce it, even after updating the dt-schema.
> Kindly have a look at logs:
>
> https://pastebin.ubuntu.com/p/xTBNNyBdFv/
Looks like, dtschema even after upgrade pointing to older commit "6a941d46b9f5".
Wondering why it has not been pointing to latest commit "6a941d46b9f5"
After upgrading the pip version for python3, and upgrading the dt-schema again
https://pastebin.ubuntu.com/p/Rd9knQgvKH/
Issue is still reproduced.
Thanks
-Amit
On Fri, Jul 3, 2020 at 1:55 AM Amit Tomer <[email protected]> wrote:
>
> On Fri, Jul 3, 2020 at 12:48 PM Amit Tomer <[email protected]> wrote:
> >
> > Hi Rob,
> >
> >
> > > If you already ran 'make dt_binding_check' and didn't see the above
> > > error(s), then make sure dt-schema is up to date:
> > >
> > > pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade
> > >
> > > Please check and re-submit.
> >
> > I wasn't able to reproduce it, even after updating the dt-schema.
> > Kindly have a look at logs:
> >
> > https://pastebin.ubuntu.com/p/xTBNNyBdFv/
>
> Looks like, dtschema even after upgrade pointing to older commit "6a941d46b9f5".
> Wondering why it has not been pointing to latest commit "6a941d46b9f5"
>
> After upgrading the pip version for python3, and upgrading the dt-schema again
> https://pastebin.ubuntu.com/p/Rd9knQgvKH/
>
> Issue is still reproduced.
If dtschema is changed, you need a clean tree as make doesn't track
that changing. Specifically, processed-schema-examples.yaml needs to
be removed.
Rob
On Thu, Jul 02, 2020 at 08:22:48PM +0530, Amit Singh Tomar wrote:
> At the moment, Driver uses bit fields to describe registers of the DMA
> descriptor structure that makes it less portable and maintainable, and
> Andre suugested(and even sketched important bits for it) to make use of
> array to describe this DMA descriptors instead. It gives the flexibility
> while extending support for other platform such as Actions S700.
>
> This commit removes the "owl_dma_lli_hw" (that includes bit-fields) and
> uses array to describe DMA descriptor.
>
> Suggested-by: Andre Przywara <[email protected]>
> Signed-off-by: Amit Singh Tomar <[email protected]>
Reviewed-by: Manivannan Sadhasivam <[email protected]>
Thanks,
Mani
> ---
> Changes since v4:
> * Reordered it from 01/10 to 02/10.
> Changes since v3:
> * Added description for enum fields.
> * Restored the old comment.
> * Added detailed comment about, the way FLEN
> and FCNT values are filled.
> Changes since v2:
> * No change.
> Changes since v1:
> * Defined macro for frame count value.
> * Introduced llc_hw_flen() from patch 2/9.
> * Removed the unnecessary line break.
> Changes since rfc:
> * No change.
> ---
> drivers/dma/owl-dma.c | 98 +++++++++++++++++++++++++++++----------------------
> 1 file changed, 56 insertions(+), 42 deletions(-)
>
> diff --git a/drivers/dma/owl-dma.c b/drivers/dma/owl-dma.c
> index 66ef70b00ec0..948d1bead860 100644
> --- a/drivers/dma/owl-dma.c
> +++ b/drivers/dma/owl-dma.c
> @@ -120,30 +120,33 @@
> #define BIT_FIELD(val, width, shift, newshift) \
> ((((val) >> (shift)) & ((BIT(width)) - 1)) << (newshift))
>
> +/* Frame count value is fixed as 1 */
> +#define FCNT_VAL 0x1
> +
> /**
> - * struct owl_dma_lli_hw - Hardware link list for dma transfer
> - * @next_lli: physical address of the next link list
> - * @saddr: source physical address
> - * @daddr: destination physical address
> - * @flen: frame length
> - * @fcnt: frame count
> - * @src_stride: source stride
> - * @dst_stride: destination stride
> - * @ctrla: dma_mode and linklist ctrl config
> - * @ctrlb: interrupt config
> - * @const_num: data for constant fill
> + * owl_dmadesc_offsets - Describe DMA descriptor, hardware link
> + * list for dma transfer
> + * @OWL_DMADESC_NEXT_LLI: physical address of the next link list
> + * @OWL_DMADESC_SADDR: source physical address
> + * @OWL_DMADESC_DADDR: destination physical address
> + * @OWL_DMADESC_FLEN: frame length
> + * @OWL_DMADESC_SRC_STRIDE: source stride
> + * @OWL_DMADESC_DST_STRIDE: destination stride
> + * @OWL_DMADESC_CTRLA: dma_mode and linklist ctrl config
> + * @OWL_DMADESC_CTRLB: interrupt config
> + * @OWL_DMADESC_CONST_NUM: data for constant fill
> */
> -struct owl_dma_lli_hw {
> - u32 next_lli;
> - u32 saddr;
> - u32 daddr;
> - u32 flen:20;
> - u32 fcnt:12;
> - u32 src_stride;
> - u32 dst_stride;
> - u32 ctrla;
> - u32 ctrlb;
> - u32 const_num;
> +enum owl_dmadesc_offsets {
> + OWL_DMADESC_NEXT_LLI = 0,
> + OWL_DMADESC_SADDR,
> + OWL_DMADESC_DADDR,
> + OWL_DMADESC_FLEN,
> + OWL_DMADESC_SRC_STRIDE,
> + OWL_DMADESC_DST_STRIDE,
> + OWL_DMADESC_CTRLA,
> + OWL_DMADESC_CTRLB,
> + OWL_DMADESC_CONST_NUM,
> + OWL_DMADESC_SIZE
> };
>
> /**
> @@ -153,7 +156,7 @@ struct owl_dma_lli_hw {
> * @node: node for txd's lli_list
> */
> struct owl_dma_lli {
> - struct owl_dma_lli_hw hw;
> + u32 hw[OWL_DMADESC_SIZE];
> dma_addr_t phys;
> struct list_head node;
> };
> @@ -318,6 +321,11 @@ static inline u32 llc_hw_ctrlb(u32 int_ctl)
> return ctl;
> }
>
> +static u32 llc_hw_flen(struct owl_dma_lli *lli)
> +{
> + return lli->hw[OWL_DMADESC_FLEN] & GENMASK(19, 0);
> +}
> +
> static void owl_dma_free_lli(struct owl_dma *od,
> struct owl_dma_lli *lli)
> {
> @@ -349,8 +357,9 @@ static struct owl_dma_lli *owl_dma_add_lli(struct owl_dma_txd *txd,
> list_add_tail(&next->node, &txd->lli_list);
>
> if (prev) {
> - prev->hw.next_lli = next->phys;
> - prev->hw.ctrla |= llc_hw_ctrla(OWL_DMA_MODE_LME, 0);
> + prev->hw[OWL_DMADESC_NEXT_LLI] = next->phys;
> + prev->hw[OWL_DMADESC_CTRLA] |=
> + llc_hw_ctrla(OWL_DMA_MODE_LME, 0);
> }
>
> return next;
> @@ -363,8 +372,7 @@ static inline int owl_dma_cfg_lli(struct owl_dma_vchan *vchan,
> struct dma_slave_config *sconfig,
> bool is_cyclic)
> {
> - struct owl_dma_lli_hw *hw = &lli->hw;
> - u32 mode;
> + u32 mode, ctrlb;
>
> mode = OWL_DMA_MODE_PW(0);
>
> @@ -405,22 +413,28 @@ static inline int owl_dma_cfg_lli(struct owl_dma_vchan *vchan,
> return -EINVAL;
> }
>
> - hw->next_lli = 0; /* One link list by default */
> - hw->saddr = src;
> - hw->daddr = dst;
> -
> - hw->fcnt = 1; /* Frame count fixed as 1 */
> - hw->flen = len; /* Max frame length is 1MB */
> - hw->src_stride = 0;
> - hw->dst_stride = 0;
> - hw->ctrla = llc_hw_ctrla(mode,
> - OWL_DMA_LLC_SAV_LOAD_NEXT |
> - OWL_DMA_LLC_DAV_LOAD_NEXT);
> + lli->hw[OWL_DMADESC_CTRLA] = llc_hw_ctrla(mode,
> + OWL_DMA_LLC_SAV_LOAD_NEXT |
> + OWL_DMA_LLC_DAV_LOAD_NEXT);
>
> if (is_cyclic)
> - hw->ctrlb = llc_hw_ctrlb(OWL_DMA_INTCTL_BLOCK);
> + ctrlb = llc_hw_ctrlb(OWL_DMA_INTCTL_BLOCK);
> else
> - hw->ctrlb = llc_hw_ctrlb(OWL_DMA_INTCTL_SUPER_BLOCK);
> + ctrlb = llc_hw_ctrlb(OWL_DMA_INTCTL_SUPER_BLOCK);
> +
> + lli->hw[OWL_DMADESC_NEXT_LLI] = 0; /* One link list by default */
> + lli->hw[OWL_DMADESC_SADDR] = src;
> + lli->hw[OWL_DMADESC_DADDR] = dst;
> + lli->hw[OWL_DMADESC_SRC_STRIDE] = 0;
> + lli->hw[OWL_DMADESC_DST_STRIDE] = 0;
> + /*
> + * Word starts from offset 0xC is shared between frame length
> + * (max frame length is 1MB) and frame count, where first 20
> + * bits are for frame length and rest of 12 bits are for frame
> + * count.
> + */
> + lli->hw[OWL_DMADESC_FLEN] = len | FCNT_VAL << 20;
> + lli->hw[OWL_DMADESC_CTRLB] = ctrlb;
>
> return 0;
> }
> @@ -752,7 +766,7 @@ static u32 owl_dma_getbytes_chan(struct owl_dma_vchan *vchan)
> /* Start from the next active node */
> if (lli->phys == next_lli_phy) {
> list_for_each_entry(lli, &txd->lli_list, node)
> - bytes += lli->hw.flen;
> + bytes += llc_hw_flen(lli);
> break;
> }
> }
> @@ -783,7 +797,7 @@ static enum dma_status owl_dma_tx_status(struct dma_chan *chan,
> if (vd) {
> txd = to_owl_txd(&vd->tx);
> list_for_each_entry(lli, &txd->lli_list, node)
> - bytes += lli->hw.flen;
> + bytes += llc_hw_flen(lli);
> } else {
> bytes = owl_dma_getbytes_chan(vchan);
> }
> --
> 2.7.4
>
On Thu, Jul 02, 2020 at 08:22:50PM +0530, Amit Singh Tomar wrote:
> This commit adds reset bits needed for MMC clock registers present
> on Actions S700 SoC.
>
> Signed-off-by: Amit Singh Tomar <[email protected]>
Reviewed-by: Manivannan Sadhasivam <[email protected]>
Thanks,
Mani
> ---
> Changes from v4:
> * Reordered it from 03/10 to 04/10.
> Changes from v3:
> * NO change.
> Changes from v2:
> * No change.
> Changes from v1:
> * No change.
> Changes from RFC:
> * No change.
> ---
> drivers/clk/actions/owl-s700.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/clk/actions/owl-s700.c b/drivers/clk/actions/owl-s700.c
> index a2f34d13fb54..cd60eca7727d 100644
> --- a/drivers/clk/actions/owl-s700.c
> +++ b/drivers/clk/actions/owl-s700.c
> @@ -577,6 +577,9 @@ static const struct owl_reset_map s700_resets[] = {
> [RESET_DSI] = { CMU_DEVRST0, BIT(2) },
> [RESET_CSI] = { CMU_DEVRST0, BIT(13) },
> [RESET_SI] = { CMU_DEVRST0, BIT(14) },
> + [RESET_SD0] = { CMU_DEVRST0, BIT(22) },
> + [RESET_SD1] = { CMU_DEVRST0, BIT(23) },
> + [RESET_SD2] = { CMU_DEVRST0, BIT(24) },
> [RESET_I2C0] = { CMU_DEVRST1, BIT(0) },
> [RESET_I2C1] = { CMU_DEVRST1, BIT(1) },
> [RESET_I2C2] = { CMU_DEVRST1, BIT(2) },
> --
> 2.7.4
>
On Thu, Jul 02, 2020 at 08:22:51PM +0530, Amit Singh Tomar wrote:
> After commit 7cdf8446ed1d ("arm64: dts: actions: Add pinctrl node for
> Actions Semi S700") following error has been observed while booting
> Linux on Cubieboard7-lite(based on S700 SoC).
>
> [ 0.257415] pinctrl-s700 e01b0000.pinctrl: can't request region for
> resource [mem 0xe01b0000-0xe01b0fff]
> [ 0.266902] pinctrl-s700: probe of e01b0000.pinctrl failed with error -16
>
> This is due to the fact that memory range for "sps" power domain controller
> clashes with pinctrl.
>
> One way to fix it, is to limit pinctrl address range which is safe
> to do as current pinctrl driver uses address range only up to 0x100.
>
> This commit limits the pinctrl address range to 0x100 so that it doesn't
> conflict with sps range.
>
> Fixes: 7cdf8446ed1d ("arm64: dts: actions: Add pinctrl node for Actions
> Semi S700")
>
> Suggested-by: Andre Przywara <[email protected]>
> Signed-off-by: Amit Singh Tomar <[email protected]>
Reviewed-by: Manivannan Sadhasivam <[email protected]>
Thanks,
Mani
> ---
> Changes since v4:
> * Reordered it from 04/10 to 05/10.
> Changes since v3:
> * No change.
> Changes since v2:
> * this is no more don't merge and fixed
> the broken S700 boot by limiting pinctrl
> address range.
> * Modified the subject to reflect the changes.
> Changes since v1:
> * No change.
> Changes since RFC:
> * kept as do not merge.
> ---
> arch/arm64/boot/dts/actions/s700.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/actions/s700.dtsi b/arch/arm64/boot/dts/actions/s700.dtsi
> index 2006ad5424fa..f8eb72bb4125 100644
> --- a/arch/arm64/boot/dts/actions/s700.dtsi
> +++ b/arch/arm64/boot/dts/actions/s700.dtsi
> @@ -231,7 +231,7 @@
>
> pinctrl: pinctrl@e01b0000 {
> compatible = "actions,s700-pinctrl";
> - reg = <0x0 0xe01b0000 0x0 0x1000>;
> + reg = <0x0 0xe01b0000 0x0 0x100>;
> clocks = <&cmu CLK_GPIO>;
> gpio-controller;
> gpio-ranges = <&pinctrl 0 0 136>;
> --
> 2.7.4
>
On Thu, Jul 02, 2020 at 08:22:53PM +0530, Amit Singh Tomar wrote:
> This commit adds device tree binding reset constants for mmc controller
> present on Actions S700 Soc.
>
> Acked-by: Rob Herring <[email protected]>
> Signed-off-by: Amit Singh Tomar <[email protected]>
Reviewed-by: Manivannan Sadhasivam <[email protected]>
Thanks,
Mani
> ---
> Changes since v4:
> * No change.
> Changes since v3:
> * No change.
> Changes since v2:
> * No change.
> Changes since v1:
> * No change.
> Changes since RFC:
> * added Rob's acked-by tag
> ---
> include/dt-bindings/reset/actions,s700-reset.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/include/dt-bindings/reset/actions,s700-reset.h b/include/dt-bindings/reset/actions,s700-reset.h
> index 5e3b16b8ef53..a3118de6d7aa 100644
> --- a/include/dt-bindings/reset/actions,s700-reset.h
> +++ b/include/dt-bindings/reset/actions,s700-reset.h
> @@ -30,5 +30,8 @@
> #define RESET_UART4 20
> #define RESET_UART5 21
> #define RESET_UART6 22
> +#define RESET_SD0 23
> +#define RESET_SD1 24
> +#define RESET_SD2 25
>
> #endif /* __DT_BINDINGS_ACTIONS_S700_RESET_H */
> --
> 2.7.4
>
On Thu, Jul 02, 2020 at 08:22:52PM +0530, Amit Singh Tomar wrote:
> This commit adds DMA controller present on Actions S700, it differs from
> S900 in terms of number of dma channels and requests.
>
> Signed-off-by: Amit Singh Tomar <[email protected]>
Reviewed-by: Manivannan Sadhasivam <[email protected]>
Thanks,
Mani
> ---
> Changes since v4:
> * No change.
> Changes since v3:
> * Fixed typo in commit message.
> * Placed owl-s700-powergate.h in alphabetical order.
> Changes since v2:
> * added power-domain property as sps
> is enabled now and DMA needs it.
> Changes since v1:
> * No Change.
> Changes since RFC:
> * No Change.
> ---
> arch/arm64/boot/dts/actions/s700.dtsi | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/actions/s700.dtsi b/arch/arm64/boot/dts/actions/s700.dtsi
> index f8eb72bb4125..2c78caebf515 100644
> --- a/arch/arm64/boot/dts/actions/s700.dtsi
> +++ b/arch/arm64/boot/dts/actions/s700.dtsi
> @@ -5,6 +5,7 @@
>
> #include <dt-bindings/clock/actions,s700-cmu.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/power/owl-s700-powergate.h>
> #include <dt-bindings/reset/actions,s700-reset.h>
>
> / {
> @@ -244,5 +245,19 @@
> <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
> };
> +
> + dma: dma-controller@e0230000 {
> + compatible = "actions,s700-dma";
> + reg = <0x0 0xe0230000 0x0 0x1000>;
> + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
> + #dma-cells = <1>;
> + dma-channels = <10>;
> + dma-requests = <44>;
> + clocks = <&cmu CLK_DMAC>;
> + power-domains = <&sps S700_PD_DMA>;
> + };
> };
> };
> --
> 2.7.4
>
On Thu, Jul 02, 2020 at 08:22:54PM +0530, Amit Singh Tomar wrote:
> The commit adds a new SoC specific compatible string "actions,s700-mmc"
> in combination with more generic string "actions,owl-mmc".
>
> Placement order of these strings should abide by the principle of
> "from most specific to most general".
>
> Reviewed-by: Rob Herring <[email protected]>
> Signed-off-by: Amit Singh Tomar <[email protected]>
Reviewed-by: Manivannan Sadhasivam <[email protected]>
Thanks,
Mani
> ---
> Changes since v4:
> * No change.
> Changes since v3:
> * No change.
> Changes since v2:
> * Added Rob's Reviewed-by tag
> ---
> Documentation/devicetree/bindings/mmc/owl-mmc.yaml | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/mmc/owl-mmc.yaml b/Documentation/devicetree/bindings/mmc/owl-mmc.yaml
> index 1380501fb8f0..5eab25ccf7ae 100644
> --- a/Documentation/devicetree/bindings/mmc/owl-mmc.yaml
> +++ b/Documentation/devicetree/bindings/mmc/owl-mmc.yaml
> @@ -14,7 +14,11 @@ maintainers:
>
> properties:
> compatible:
> - const: actions,owl-mmc
> + oneOf:
> + - const: actions,owl-mmc
> + - items:
> + - const: actions,s700-mmc
> + - const: actions,owl-mmc
>
> reg:
> maxItems: 1
> --
> 2.7.4
>
On Thu, Jul 02, 2020 at 08:22:55PM +0530, Amit Singh Tomar wrote:
> This commits adds support for MMC controllers present on Actions S700 SoC,
> there are 3 MMC controllers in this SoC which can be used for accessing
> SD/EMMC/SDIO cards.
>
> Signed-off-by: Amit Singh Tomar <[email protected]>
Reviewed-by: Manivannan Sadhasivam <[email protected]>
Thanks,
Mani
> ---
> Changes since v4:
> * No change.
> Changes since v3:
> * No change.
> Changes since v2:
> * No change.
> Changes since v1:
> * Added SoC specific compatibe string.
> Changes since RFC:
> * No change
> ---
> arch/arm64/boot/dts/actions/s700.dtsi | 33 +++++++++++++++++++++++++++++++++
> 1 file changed, 33 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/actions/s700.dtsi b/arch/arm64/boot/dts/actions/s700.dtsi
> index 2c78caebf515..9ed88aafc2da 100644
> --- a/arch/arm64/boot/dts/actions/s700.dtsi
> +++ b/arch/arm64/boot/dts/actions/s700.dtsi
> @@ -259,5 +259,38 @@
> clocks = <&cmu CLK_DMAC>;
> power-domains = <&sps S700_PD_DMA>;
> };
> +
> + mmc0: mmc@e0210000 {
> + compatible = "actions,s700-mmc", "actions,owl-mmc";
> + reg = <0x0 0xe0210000 0x0 0x4000>;
> + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cmu CLK_SD0>;
> + resets = <&cmu RESET_SD0>;
> + dmas = <&dma 2>;
> + dma-names = "mmc";
> + status = "disabled";
> + };
> +
> + mmc1: mmc@e0214000 {
> + compatible = "actions,s700-mmc", "actions,owl-mmc";
> + reg = <0x0 0xe0214000 0x0 0x4000>;
> + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cmu CLK_SD1>;
> + resets = <&cmu RESET_SD1>;
> + dmas = <&dma 3>;
> + dma-names = "mmc";
> + status = "disabled";
> + };
> +
> + mmc2: mmc@e0218000 {
> + compatible = "actions,s700-mmc", "actions,owl-mmc";
> + reg = <0x0 0xe0218000 0x0 0x4000>;
> + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cmu CLK_SD2>;
> + resets = <&cmu RESET_SD2>;
> + dmas = <&dma 4>;
> + dma-names = "mmc";
> + status = "disabled";
> + };
> };
> };
> --
> 2.7.4
>
On Thu, Jul 02, 2020 at 08:22:56PM +0530, Amit Singh Tomar wrote:
> This commit adds uSD support for Cubieboard7 board based on Actions Semi
> S700 SoC. SD0 is connected to uSD slot. Since there is no PMIC support
> added yet, fixed regulator has been used as a regulator node.
>
> Signed-off-by: Amit Singh Tomar <[email protected]>
> ---
> Changes since v4:
> * No change.
> Changes since v3:
> * No change.
> Changes since v2:
> * No change.
> Changes since v1:
> * No change.
> Changes since RFC:
> * No change.
> ---
> arch/arm64/boot/dts/actions/s700-cubieboard7.dts | 41 ++++++++++++++++++++++++
> arch/arm64/boot/dts/actions/s700.dtsi | 1 +
> 2 files changed, 42 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/actions/s700-cubieboard7.dts b/arch/arm64/boot/dts/actions/s700-cubieboard7.dts
> index 63e375cd9eb4..ec117eb12f3a 100644
> --- a/arch/arm64/boot/dts/actions/s700-cubieboard7.dts
> +++ b/arch/arm64/boot/dts/actions/s700-cubieboard7.dts
> @@ -13,6 +13,7 @@
>
> aliases {
> serial3 = &uart3;
> + mmc0 = &mmc0;
> };
>
> chosen {
> @@ -28,6 +29,23 @@
> device_type = "memory";
> reg = <0x1 0xe0000000 0x0 0x0>;
> };
> +
> + /* Fixed regulator used in the absence of PMIC */
> + vcc_3v1: vcc-3v1 {
> + compatible = "regulator-fixed";
> + regulator-name = "fixed-3.1V";
> + regulator-min-microvolt = <3100000>;
> + regulator-max-microvolt = <3100000>;
> + };
Is this regulator used somewhere?
Thanks,
Mani
> +
> + /* Fixed regulator used in the absence of PMIC */
> + sd_vcc: sd-vcc {
> + compatible = "regulator-fixed";
> + regulator-name = "fixed-3.1V";
> + regulator-min-microvolt = <3100000>;
> + regulator-max-microvolt = <3100000>;
> + regulator-always-on;
> + };
> };
>
> &i2c0 {
> @@ -81,6 +99,14 @@
> bias-pull-up;
> };
> };
> +
> + mmc0_default: mmc0_default {
> + pinmux {
> + groups = "sd0_d0_mfp", "sd0_d1_mfp", "sd0_d2_d3_mfp",
> + "sd0_cmd_mfp", "sd0_clk_mfp";
> + function = "sd0";
> + };
> + };
> };
>
> &timer {
> @@ -90,3 +116,18 @@
> &uart3 {
> status = "okay";
> };
> +
> +/* uSD */
> +&mmc0 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc0_default>;
> + cd-gpios = <&pinctrl 120 GPIO_ACTIVE_LOW>;
> + no-sdio;
> + no-mmc;
> + no-1-8-v;
> + bus-width = <4>;
> + vmmc-supply = <&sd_vcc>;
> + vqmmc-supply = <&sd_vcc>;
> +};
> +
> diff --git a/arch/arm64/boot/dts/actions/s700.dtsi b/arch/arm64/boot/dts/actions/s700.dtsi
> index 9ed88aafc2da..ba498cf9217d 100644
> --- a/arch/arm64/boot/dts/actions/s700.dtsi
> +++ b/arch/arm64/boot/dts/actions/s700.dtsi
> @@ -4,6 +4,7 @@
> */
>
> #include <dt-bindings/clock/actions,s700-cmu.h>
> +#include <dt-bindings/gpio/gpio.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/power/owl-s700-powergate.h>
> #include <dt-bindings/reset/actions,s700-reset.h>
> --
> 2.7.4
>
Hi,
On Sun, Jul 12, 2020 at 11:00 PM Manivannan Sadhasivam
<[email protected]> wrote:
>
> On Thu, Jul 02, 2020 at 08:22:56PM +0530, Amit Singh Tomar wrote:
> > This commit adds uSD support for Cubieboard7 board based on Actions Semi
> > S700 SoC. SD0 is connected to uSD slot. Since there is no PMIC support
> > added yet, fixed regulator has been used as a regulator node.
> >
> > Signed-off-by: Amit Singh Tomar <[email protected]>
> > ---
> > Changes since v4:
> > * No change.
> > Changes since v3:
> > * No change.
> > Changes since v2:
> > * No change.
> > Changes since v1:
> > * No change.
> > Changes since RFC:
> > * No change.
> > ---
> > arch/arm64/boot/dts/actions/s700-cubieboard7.dts | 41 ++++++++++++++++++++++++
> > arch/arm64/boot/dts/actions/s700.dtsi | 1 +
> > 2 files changed, 42 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/actions/s700-cubieboard7.dts b/arch/arm64/boot/dts/actions/s700-cubieboard7.dts
> > index 63e375cd9eb4..ec117eb12f3a 100644
> > --- a/arch/arm64/boot/dts/actions/s700-cubieboard7.dts
> > +++ b/arch/arm64/boot/dts/actions/s700-cubieboard7.dts
> > @@ -13,6 +13,7 @@
> >
> > aliases {
> > serial3 = &uart3;
> > + mmc0 = &mmc0;
> > };
> >
> > chosen {
> > @@ -28,6 +29,23 @@
> > device_type = "memory";
> > reg = <0x1 0xe0000000 0x0 0x0>;
> > };
> > +
> > + /* Fixed regulator used in the absence of PMIC */
> > + vcc_3v1: vcc-3v1 {
> > + compatible = "regulator-fixed";
> > + regulator-name = "fixed-3.1V";
> > + regulator-min-microvolt = <3100000>;
> > + regulator-max-microvolt = <3100000>;
> > + };
>
> Is this regulator used somewhere?
This is something I copied from bubblegum dts as I wasn't sure what is right way
to include these regulators.
Also, another day tested it without having these regulators in , and
still it seems to
work. So should these be removed ?
Thanks
-Amit
On 12/07/2020 19:45, Amit Tomer wrote:
Hi,
> On Sun, Jul 12, 2020 at 11:00 PM Manivannan Sadhasivam
> <[email protected]> wrote:
>>
>> On Thu, Jul 02, 2020 at 08:22:56PM +0530, Amit Singh Tomar wrote:
>>> This commit adds uSD support for Cubieboard7 board based on Actions Semi
>>> S700 SoC. SD0 is connected to uSD slot. Since there is no PMIC support
>>> added yet, fixed regulator has been used as a regulator node.
>>>
>>> Signed-off-by: Amit Singh Tomar <[email protected]>
>>> ---
>>> Changes since v4:
>>> * No change.
>>> Changes since v3:
>>> * No change.
>>> Changes since v2:
>>> * No change.
>>> Changes since v1:
>>> * No change.
>>> Changes since RFC:
>>> * No change.
>>> ---
>>> arch/arm64/boot/dts/actions/s700-cubieboard7.dts | 41 ++++++++++++++++++++++++
>>> arch/arm64/boot/dts/actions/s700.dtsi | 1 +
>>> 2 files changed, 42 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/actions/s700-cubieboard7.dts b/arch/arm64/boot/dts/actions/s700-cubieboard7.dts
>>> index 63e375cd9eb4..ec117eb12f3a 100644
>>> --- a/arch/arm64/boot/dts/actions/s700-cubieboard7.dts
>>> +++ b/arch/arm64/boot/dts/actions/s700-cubieboard7.dts
>>> @@ -13,6 +13,7 @@
>>>
>>> aliases {
>>> serial3 = &uart3;
>>> + mmc0 = &mmc0;
>>> };
>>>
>>> chosen {
>>> @@ -28,6 +29,23 @@
>>> device_type = "memory";
>>> reg = <0x1 0xe0000000 0x0 0x0>;
>>> };
>>> +
>>> + /* Fixed regulator used in the absence of PMIC */
>>> + vcc_3v1: vcc-3v1 {
>>> + compatible = "regulator-fixed";
>>> + regulator-name = "fixed-3.1V";
>>> + regulator-min-microvolt = <3100000>;
>>> + regulator-max-microvolt = <3100000>;
>>> + };
>>
>> Is this regulator used somewhere?
>
> This is something I copied from bubblegum dts as I wasn't sure what is right way
> to include these regulators.
But this regulator is only used for the eMMC there, which we apparently
don't have on the Cubieboard 7?
> Also, another day tested it without having these regulators in , and
> still it seems to
> work. So should these be removed ?
If there are not even referenced in the .dts, then fixed regulators are
rather pointless. So yes, please remove this vcc-3v1 one.
What is the story with the other regulator? Is there a PMIC or a power
switch for the SD card? Or is the power supply actually hardwired?
Cheers,
Andre
On Mon, Jul 13, 2020 at 12:15:28AM +0530, Amit Tomer wrote:
> Hi,
>
> On Sun, Jul 12, 2020 at 11:00 PM Manivannan Sadhasivam
> <[email protected]> wrote:
> >
> > On Thu, Jul 02, 2020 at 08:22:56PM +0530, Amit Singh Tomar wrote:
> > > This commit adds uSD support for Cubieboard7 board based on Actions Semi
> > > S700 SoC. SD0 is connected to uSD slot. Since there is no PMIC support
> > > added yet, fixed regulator has been used as a regulator node.
> > >
> > > Signed-off-by: Amit Singh Tomar <[email protected]>
> > > ---
> > > Changes since v4:
> > > * No change.
> > > Changes since v3:
> > > * No change.
> > > Changes since v2:
> > > * No change.
> > > Changes since v1:
> > > * No change.
> > > Changes since RFC:
> > > * No change.
> > > ---
> > > arch/arm64/boot/dts/actions/s700-cubieboard7.dts | 41 ++++++++++++++++++++++++
> > > arch/arm64/boot/dts/actions/s700.dtsi | 1 +
> > > 2 files changed, 42 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/actions/s700-cubieboard7.dts b/arch/arm64/boot/dts/actions/s700-cubieboard7.dts
> > > index 63e375cd9eb4..ec117eb12f3a 100644
> > > --- a/arch/arm64/boot/dts/actions/s700-cubieboard7.dts
> > > +++ b/arch/arm64/boot/dts/actions/s700-cubieboard7.dts
> > > @@ -13,6 +13,7 @@
> > >
> > > aliases {
> > > serial3 = &uart3;
> > > + mmc0 = &mmc0;
> > > };
> > >
> > > chosen {
> > > @@ -28,6 +29,23 @@
> > > device_type = "memory";
> > > reg = <0x1 0xe0000000 0x0 0x0>;
> > > };
> > > +
> > > + /* Fixed regulator used in the absence of PMIC */
> > > + vcc_3v1: vcc-3v1 {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "fixed-3.1V";
> > > + regulator-min-microvolt = <3100000>;
> > > + regulator-max-microvolt = <3100000>;
> > > + };
> >
> > Is this regulator used somewhere?
>
> This is something I copied from bubblegum dts as I wasn't sure what is right way
> to include these regulators.
>
> Also, another day tested it without having these regulators in , and
> still it seems to
> work. So should these be removed ?
>
Fixed regulators are used to nicely model the regulators which aren't tied to
any PMIC. But for some cases we use them to represent supplies when there is
no support for the specific PMIC present in the kernel and they are turned
on/configured by the bootloader (this is what happening here).
And there is no use of declaring fixed regulators when there is no consumer.
Even if you don't define these, the corresponding supplies in the board will
always be in the same state configured by the bootloader. So I'd suggest you
to remove this for now.
Since I don't have the schematics to check, please make sure you name the
regulators as mentioned in the schematics (this could vary from board to board,
so don't just copy from others).
Thanks,
Mani
> Thanks
> -Amit
Hi,
> But this regulator is only used for the eMMC there, which we apparently
> don't have on the Cubieboard 7?
We do have eMMC present on Cubieboard 7 (both the versions of Cubieboard7), and
the regulator name is similar to what is used in
"s900-bubblegum-96.dts" .i.e. "vcc_3v1".
But Since this patch doesn't enable eMMC, it does make sense to remove this
"vcc_3v1" regulator and keep the other one.
> > Also, another day tested it without having these regulators in , and
> > still it seems to
> > work. So should these be removed ?
>
> If there are not even referenced in the .dts, then fixed regulators are
> rather pointless. So yes, please remove this vcc-3v1 one.
Sure, I would do this.
> What is the story with the other regulator? Is there a PMIC or a power
> switch for the SD card? Or is the power supply actually hardwired?
SD_VCC is connected to SWITCH/LDO which gets input from ATM2603C PMIC.
This seems to be enabled by default ( in early bootloaders I guess).
Thanks
-Amit.
Hi,
> Fixed regulators are used to nicely model the regulators which aren't tied to
> any PMIC. But for some cases we use them to represent supplies when there is
> no support for the specific PMIC present in the kernel and they are turned
> on/configured by the bootloader (this is what happening here).
>
> And there is no use of declaring fixed regulators when there is no consumer.
> Even if you don't define these, the corresponding supplies in the board will
> always be in the same state configured by the bootloader. So I'd suggest you
> to remove this for now.
Checked the schematics and regulator name is the same for both eMMC and uSD
Shall we keep uSD regulator sd_vcc to be consistent across ACTIONS platform?
> Since I don't have the schematics to check, please make sure you name the
> regulators as mentioned in the schematics (this could vary from board to board,
> so don't just copy from others).
>
Sure, point noted.
Thanks
-Amit.
On Mon, Jul 13, 2020 at 02:38:55PM +0530, Amit Tomer wrote:
> Hi,
>
> > Fixed regulators are used to nicely model the regulators which aren't tied to
> > any PMIC. But for some cases we use them to represent supplies when there is
> > no support for the specific PMIC present in the kernel and they are turned
> > on/configured by the bootloader (this is what happening here).
> >
> > And there is no use of declaring fixed regulators when there is no consumer.
> > Even if you don't define these, the corresponding supplies in the board will
> > always be in the same state configured by the bootloader. So I'd suggest you
> > to remove this for now.
>
> Checked the schematics and regulator name is the same for both eMMC and uSD
Okay, fine.
> Shall we keep uSD regulator sd_vcc to be consistent across ACTIONS platform?
>
No. As I said before it depends on the individual board schematics.
Thanks,
Mani
> > Since I don't have the schematics to check, please make sure you name the
> > regulators as mentioned in the schematics (this could vary from board to board,
> > so don't just copy from others).
> >
>
> Sure, point noted.
>
> Thanks
> -Amit.